Fix support for the aic7850 by looking only at the relavent bits of the
QINCNT. The 7850 puts random garbage in the high bits and all my attempts
to determine the cause of this failed. This approach does seem to work
around the problem.
Don't trust SCSIPERR to tell us when there is a parity error. On
some revs of the 7870 and the 7880, this bit follows the parity of
the current byte. Instead of using a SEQINT to tell the kernel,
re-enable the standard parity error interrupt since it seems to pause
the sequencer right at the time of the error which is the effect we were
looking for anyway.
aic7xxx_reg.h:
Remove PARITY_ERROR seqeuncer interrupt type, its no longer used.
Define QCOUNTMASK as the SRAM location for the mask to use on the
QINCNT register. QCOUNTMASK is determined by the number of SCBs
supported by the device we're working on.
aic7xxx_asm.c
Properly check the return value of fopen, and define the arg list
in getopt correctly.
Submitted by: Pete Bentley <pete@demon.net>
1) Use cpp to preprocess the sequencer code.
2) Convert all "magic numbers" to #defines shared by the sequencer and
kernel driver via the aic7xxx_reg.h file. (The assembler still needs
to be re-written in lex/yacc to allow ~|& type constructions).
3) Raise ATN on parity errors for "in" phases and send an initiator detected
error or message-in parity error message as appropriate.
4) Turn off the reselection hardware from the time or a (re)connection to
busfree. It seems that some fast targets were able to reconnect before
the sequencer was able to see busfree.
5) The message buffer is considered "in-use" when there is a positive length
count. The ACTIVE_MSG flag was unnecesary.
6) Properly set SCB_NEXT_WAITING to SCB_LIST_HEAD in scbs being added to
the waiting scb list. This is a change in how the list code works to
facilitate some planned work in the reset code.
7) The fields in the SCB have be re-arranged to be quad-word aligned.
8) The inb code has been rewritten to catch phasemisses and be more efficient.
9) Go back to "snooping the bus" to determine if the incomming identify
message will be followed by a simple queue message. Its much faster than
doing a search through the SCBs.
10) Implement better tag range checking for incomming tags.
11) Make sdtr_to_rate more accurate (use 25 instead of 24 in calculations -
must have been asleep that night).
12) Rearrange some routines to reduce code complexity and size.
13) Update comments and formatting.
14) Fixed bugs I've forgotten about??
Reviewed by: David Greenman <davidg@FreeBSD.org>
is identical to the older version, just the copyright has changed. Many
thanks go to Dean Gehnert of the Linux camp who went the extra mile to make
this happen.
Other changes:
Update assembler man page to include the -v and -D options
Merge in Dean's latest changes to the assembler
Have the sequencer do a MSG_REJECT when the negotiated syncronous rate
is lower than the adapter supports. This forces asyncronous mode which
is faster at these rates anyway.
This code will be moved shortly to the non-gpld portion of the tree.
- Report valid residual byte counts. We actually pause the sequencer
when the residual is non-zero. I thought about using DMA to do this,
bus sequencer program space is tight.
- Fix embarassing off by one error in the computation of a 2's
compliment variable. This was most likely the cause of the
many problems reported with the tagged queuing code.
- Handle "MAX_SYNC" as a special case (ie we are the ones starting
the sync negotiation sequence). This was done so that the target
scratch area can be initialed to 0 offset (asyncronous transfers)
safely. The initialization to 0 (was 15) is necessary since in
some cases a Wide negotiation could run into problems if SCSIRATE
was set wrong and we went into data(in/out).
- Trim the DMA routines a little by using some procedures. Net
effect is more functionality with 3 less instructions after this
update.
- Toggle the WIDEODD bit of the DFCNTRL whenever this is not the
last SG block. It has no effect in the 8bit bus configuration,
but in the Wide configuration ensures that the overlap byte is
held in the SCSI block if the transfer is odd so it will end
up in the next SG (the correct behavior).
Print out the length of the compiled sequencer program.
aic7xxx.seq:
More optimizations. Replace generic bcopy routine with bcopy_3
and bcopy_4 (ie unroll the loops) since these are the only two cases used.
Initialize SIMODE1 and SXFRCTL1 from the kernel in ahc_init instead of
at each selection/reselection since this is expensive and only needs to
be done once. Condense function returns into previous instruction if possible.
Reorder some sections to kill superflous jumps. These optimizations kill
the ~150k/s penalty adding support for Twin/Wide cards was costing since
the last place in the commaon path of execution where we had to do ugly,
convoluted testing for the type of card in the sequencer has gone away.
Next stop tagged queuing and target mode.
(SCSI control block) instead of having the host PIO it down. Also
reimplement WDTR and SDTR optimization to remove code in the sequencer
and place the responsibility of knowing when to initiate SDTR or WDTR
on the kernel driver. This vastly shortens the sequencer program yet
yeilds the same performance.
a discussion going on about removing this code from the burden of the
GPL, but it won't happen before Beta, and this code should be tested
before release.
Supports 27/2842 class adaptec cards and is almost capable of supporting
aic7870 based adapters (294X series cards). It does not support Wide
controllers or the second channel on Twin boards although I have work in
progress on getting both channels and running.
I have also added a few performance improvements to this version that give
us approximately a 25% boost over the original driver. These patches have
been submitted to the author.
Obtained from: Linux aic7770 driver (John Aycock - aycock@cpsc.ucalgary.ca)
