Commit Graph

763 Commits

Author SHA1 Message Date
Mitchell Horne
609cdb12b9 ofw: convert boolean_t to bool
Most of these already treat it as a proper bool, i.e. using true/false.
Also fix-up callers of OF_install().

No functional change intended.

Reviewed by:	andrew, emaste
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D45733
2024-06-26 11:14:36 -03:00
Ruslan Bukin
44d4ee7f3d riscv: add FPE code.
Add floating point extension (FPE) code needed for bhyve and world switch.

Reviewed by:	mhorne
Sponsored by:	UKRI
Differential Revision:	https://reviews.freebsd.org/D45697
2024-06-25 12:35:35 +01:00
Ruslan Bukin
d5963606f0 riscv: add SBI implementation IDs.
Add new SBI implementation IDs including recently allocated one for bhyve.

Reviewed by:	mhorne
Sponsored by:	UKRI
Differential Revision:	https://reviews.freebsd.org/D45696
2024-06-25 12:25:26 +01:00
Mitchell Horne
18051cc694 riscv: drop l1pt argument from pmap_bootstrap()
And from struct riscv_bootparams. It is no longer needed.

Reviewed by:	br, markj
MFC after:	1 month
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D45470
2024-06-20 15:33:19 -03:00
Mitchell Horne
762a3224cd riscv: smarter DMAP construction
Currently we create the DMAP by mapping the entire range between the
smallest and largest physical memory addresses with L1 superpages. This
is obviously overkill, and we may end up mapping all kinds of ranges that
are not real memory.

In the case of the HiFive Unmatched (obsolete hardware), there is an
errata resulting in faults when a TLB mapping spans PMP (firmware)
protection regions. So, when our DMAP mapping spans into the memory
reserved by OpenSBI, we get a fatal fault. This highlights the need to
be smarter here.

Therefore, let's attempt to build the DMAP a little more correctly by
walking the physmap array and mapping each range individually. It is not
perfect in that we still only respect the range to a 2MB granularity,
but this could be improved in the future.

Reviewed by:	markj
MFC after:	1 month
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D45328
2024-06-20 15:33:19 -03:00
Mitchell Horne
de09dcebd7 riscv: rework page table bootstrap
The overall goal of the change is to reduce the amount of work done in
locore assembly, and defer as much as possible until pmap_bootstrap().
Currently, half the setup is done in assembly, and then we pass the l1pt
address to pmap_bootstrap() where it is amended with other mappings.

Inspiration and understanding has been taken from amd64's
create_pagetables() routine, and I try to present the page table
construction in the same way: a linear procedure with commentary
explaining what we are doing and why. Thus the core of the new
implementation is contained in pmap_create_pagetables().

Once pmap_create_pagetables() has finished, we switch to the new
pagetable root and leave the bootstrap ones created by locore behind,
resulting in a minimal 8kB of wasted space.

Having the whole procedure in one place, in C code, allows it to be more
easily understood, while also making it more amenable to future changes
which depend on CPU feature/errata detection.

Note that with this change the size of the early devmap is bumped up
from one to four L2 pages (8MB).

Reviewed by:	markj
MFC after:	1 month
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D45327
2024-06-20 15:33:19 -03:00
Mitchell Horne
bfb8575469 riscv: Construct an identity map in locore.S
This is useful for two reasons. Within this change, it allows the
early DTB mapping to be eliminated, as we can now just dereference the
physical address provided by FW and copy the DTB contents into KVA.

It will also aid in an upcoming change: the larger reworking of page
table bootstrapping on this platform.

Reviewed by:	markj, jhb
MFC after:	1 month
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D45324
2024-06-20 15:33:19 -03:00
Mark Johnston
ddf0ed09bd sdt: Implement SDT probes using hot-patching
The idea here is to avoid a memory access and conditional branch per
probe site.  Instead, the probe is represented by an "unreachable"
unconditional function call.  asm goto is used to store the address of
the probe site (represented by a no-op sled) and the address of the
function call into a tracepoint record.  Each SDT probe carries a list
of tracepoints.

When the probe is enabled, the no-op sled corresponding to each
tracepoint is overwritten with a jmp to the corresponding label.  The
implementation uses smp_rendezvous() to park all other CPUs while the
instruction is being overwritten, as this can't be done atomically in
general.  The compiler moves argument marshalling code and the
sdt_probe() function call out-of-line, i.e., to the end of the function.

Per gallatin@ in D43504, this approach has less overhead when probes are
disabled.  To make the implementation a bit simpler, I removed support
for probes with 7 arguments; nothing makes use of this except a
regression test case.  It could be re-added later if need be.

The approach taken in this patch enables some more improvements:
1. We can now automatically fill out the "function" field of SDT probe
   names.  The SDT macros let the programmer specify the function and
   module names, but this is really a bug and shouldn't have been
   allowed.  The intent was to be able to have the same probe in
   multiple functions and to let the user restrict which probes actually
   get enabled by specifying a function name or glob.
2. We can avoid branching on SDT_PROBES_ENABLED() by adding the ability
   to include blocks of code in the out-of-line path.  For example:

	if (SDT_PROBES_ENABLED()) {
		int reason = CLD_EXITED;

		if (WCOREDUMP(signo))
			reason = CLD_DUMPED;
		else if (WIFSIGNALED(signo))
			reason = CLD_KILLED;
		SDT_PROBE1(proc, , , exit, reason);
	}

could be written

	SDT_PROBE1_EXT(proc, , , exit, reason,
		int reason;

		reason = CLD_EXITED;
		if (WCOREDUMP(signo))
			reason = CLD_DUMPED;
		else if (WIFSIGNALED(signo))
			reason = CLD_KILLED;
	);

In the future I would like to use this mechanism more generally, e.g.,
to remove branches and marshalling code used by hwpmc, and generally to
make it easier to add new tracepoint consumers without having to add
more conditional branches to hot code paths.

Reviewed by:	Domagoj Stolfa, avg
MFC after:	2 months
Differential Revision:	https://reviews.freebsd.org/D44483
2024-06-19 16:57:41 -04:00
Bojan Novković
774549fe06 riscv pmap: Release PTP reference on leaf ptpage allocation failure
d0941ed fixed an edge case invloving mlock() and superpage creation
by creating and inserting a leaf pagetable page for mlock'd superpages.
However, the code does not properly release the reference to the
pagetable page in the error handling path.
This commit fixes the issue by adding calls to 'pmap_abort_ptp'
in the error handling path.

Reported by: alc
Approved by: markj (mentor)
Fixes: d0941ed
Differential Revision: https://reviews.freebsd.org/D45580
2024-06-16 18:19:27 +02:00
Bojan Novković
e8816b4b66 riscv pmap: Introduce 'pmap_abort_ptp'
This commit moves code for releasing pagetable page references
into a separate function. No functional change intended.

Approved by: markj (mentor)
Differential Revision: https://reviews.freebsd.org/D45579
2024-06-16 18:19:27 +02:00
Mitchell Horne
134f7b5fa9 riscv: improve commentary around initial stvec
Make it explicit why we must set the trap vector before enabling virtual
memory.

Reviewed by:	br, jhb, markj
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D45474
2024-06-14 15:02:05 -03:00
Mitchell Horne
3ff981587f riscv: Don't handle missing kernel L3 pages
This code path should never be hit, if it does it means we did not
bootstrap correctly. Turn it into a panic like we do on amd64 and arm64.

Reviewed by:	markj, jhb
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D45326
2024-06-14 15:02:05 -03:00
Mitchell Horne
0e4e77072f riscv: adjust physmem reservation
Make sure we do this BEFORE pmap_bootstrap().

Reviewed by:	markj, jhb
MFC after:	3 days
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D45325
2024-06-14 15:02:05 -03:00
Ruslan Bukin
62cb671705 riscv: include ahci device to GENERIC.
This is needed for bhyve guest VM.

Reviewed by:	mhorne
Sponsored by:	UKRI
Differential Revision:	https://reviews.freebsd.org/D45497
2024-06-12 13:40:50 +01:00
Ruslan Bukin
03b330e191 riscv: add stage 2 translation to pmap.
Add basic stage 2 translation support (guest-physical to host-physical).

RISC-V hypervisor spec[1] introduces new translation schemes: Sv32x4,
Sv39x4, Sv48x4 and Sv57x4.
In each case, the size of the incoming address is widened by 2 bits (e.g.
Sv39 becomes 41-bit system).
To accommodate the 2 extra bits, the root page table (only) is expanded
by a factor of four to be 16 KiB instead of the usual 4 KiB. The rest of
page table system (including PTE format) is similar.
This gives us 4x of memory space in each scheme, but it does not make sense
to support all that memory for now.
Allocate required amount of pages for the top directory in case of stage 2,
but leave it unused.

1. https://github.com/riscv/riscv-isa-manual/blob/main/src/hypervisor.adoc

Reviewed by:	mhorne
Sponsored by:	UKRI
Differential Revision:	https://reviews.freebsd.org/D45481
2024-06-05 14:36:57 +01:00
Mitchell Horne
65a33120c3 riscv: fix vm.pmap.kernel_maps with Sv48
With 4-level paging enabled, the layout of KVA is identical, but we need
to step through an extra level to find the L1 table.

Reviewed by:	markj
MFC after:	1 week
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D45473
2024-06-04 20:18:54 -03:00
Mitchell Horne
191bf63da2 riscv: Move sigcode out of locore.S
It really doesn't fit here anymore as locore is all about early startup
code. Thus, move it to its own file.

Reviewed by:	br
MFC after:	1 week
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D45320
2024-06-04 20:18:05 -03:00
Mitchell Horne
5df74441b3 devmap: eliminate unused arguments
The optional 'table' pointer is a legacy part of the interface, which
has been replaced by devmap_register_table()/devmap_add_entry(). The few
in-tree callers have already adapted to this, so it can be removed.

The 'l1pt' argument is already entirely unused within the function.

Reviewed by:	andrew, markj
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D45319
2024-06-04 20:17:47 -03:00
Alan Cox
f1d73aacdc pmap: Skip some superpage promotion attempts that will fail
Implement a simple heuristic to skip pointless promotion attempts by
pmap_enter_quick_locked() and moea64_enter().  Specifically, when
vm_fault() calls pmap_enter_quick() to map neighboring pages at the end
of a copy-on-write fault, there is no point in attempting promotion in
pmap_enter_quick_locked() and moea64_enter().  Promotion will fail
because the base pages have differing protection.

Reviewed by:	kib
Differential Revision:	https://reviews.freebsd.org/D45431
MFC after:	1 week
2024-06-04 00:38:05 -05:00
Jessica Clarke
28aaa58fa6 fu740_pci_dw: Fix PERST delay and keep asserted for rest of reset sequence
DELAY takes microseconds not milliseconds, so 100 was too low. Moreover,
when enabling hw.pci.clear_pcib, PCI emeration would still stop at one
of the first bridges, but by asserting PERST for the rest of the reset
sequence that appears to be reliably addressed.

Fixes:	896e217a0e ("fu740_pci_dw: Add SiFive FU740 PCIe controller driver")
2024-06-02 21:42:18 +01:00
Mitchell Horne
deab57178f Adjust comments referencing vm_mem_init()
I cannot find a time where the function was not named this.

Reviewed by:	kib, markj
MFC after:	3 days
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D45383
2024-05-27 18:37:40 -03:00
Bojan Novković
0a44b8a56d vm: Simplify startup page dumping conditional
This commit introduces the MINIDUMP_STARTUP_PAGE_TRACKING symbol and
uses it to simplify several instances of a complex preprocessor conditional
for adding pages allocated when bootstraping the kernel to minidumps.

Reviewed by:	markj, mhorne
Approved by:	markj (mentor)
Differential Revision: https://reviews.freebsd.org/D45085
2024-05-25 19:24:55 +02:00
Bojan Novković
da76d349b6 uma: Deduplicate uma_small_alloc
This commit refactors the UMA small alloc code and
removes most UMA machine-dependent code.
The existing machine-dependent uma_small_alloc code is almost identical
across all architectures, except for powerpc where using the direct
map addresses involved extra steps in some cases.

The MI/MD split was replaced by a default uma_small_alloc
implementation that can be overridden by architecture-specific code by
defining the UMA_MD_SMALL_ALLOC symbol. Furthermore, UMA_USE_DMAP was
introduced to replace most UMA_MD_SMALL_ALLOC uses.

Reviewed by: markj, kib
Approved by: markj (mentor)
Differential Revision:	https://reviews.freebsd.org/D45084
2024-05-25 19:24:46 +02:00
Mitchell Horne
1d3c23676d arm64, riscv: remove unused declaration
It is inherited from arm, where the global exists and is used. No
functional change.

Reviewed by:	markj
MFC after:	3 days
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D45323
2024-05-24 10:55:24 -03:00
Mitchell Horne
b5e17840de arm64, riscv: removed unused struct pv_addr
No functional change.

Reviewed by:	markj
MFC after:	3 days
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D45322
2024-05-24 10:55:24 -03:00
Ruslan Bukin
2183004e14 riscv: Implement atomic operations
Implement atomic_load_acq_16, atomic_store_rel_16.

These are needed by bhyve(8) PCIe bus emulation code.

Group 16-bit atomic functions similarly to 32 and 64-bit.

Reviewed by:	mhorne
Differential Revision:	https://reviews.freebsd.org/D45228
2024-05-22 16:45:11 +01:00
Ruslan Bukin
ddd0d4f4cd riscv: Fix SSTC extension support
From the SSTC spec:
"If the stimecmp (supervisor-mode timer compare) register is implemented,
then STIP is read-only in mip and reflects the supervisor-level timer
interrupt signal resulting from stimecmp. This timer interrupt signal
is cleared by writing stimecmp with a value greater than the current time
value."

This fixes operation in Spike with sstc extension enabled.
Example:
  spike --isa RV64IMAFDCH_zicntr_zihpm_sstc

Reviewed by:	mhorne
Differential Revision:	https://reviews.freebsd.org/D45226
2024-05-22 16:44:03 +01:00
Mitchell Horne
d7adf3b47a riscv: fix L0 PTE setup (Sv48)
Per the Privilege Spec, the Accessed (A) or Dirty (D) bits must only be
set for a leaf PTE.

It seems newer versions of QEMU have started to enforce this
requirement, and without this change, pmap_bootstrap() hangs when
switching to Sv48 mode.

Reviewed by:	jrtc27, markj
MFC after:	3 days
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D45210
2024-05-15 14:07:33 -03:00
John Baldwin
473c90ac04 uio: Use switch statements when handling UIO_READ vs UIO_WRITE
This is mostly to reduce the diff with CheriBSD which adds additional
constants to enum uio_rw, but also matches the normal style used for
uio_segflg.

Reviewed by:	kib, emaste
Obtained from:	CheriBSD
Differential Revision:	https://reviews.freebsd.org/D45142
2024-05-10 13:43:36 -07:00
Jari Sihvola
0612538e3a jh7110: Add StarFive JH7110 clock/reset generator drivers
Implement a core clknode driver for the JH7110 (StarFive VisionFive v2)
platform.

Add clock/reset generator drivers for the PLL, SYS, and AON clock
groupings.

Co-authored-by: mhorne
Reviewed by:    mhorne
Sponsored by:   The FreeBSD Foundation (mhorne's contributions)
Differential Revision:  https://reviews.freebsd.org/D43037
2024-05-07 13:07:36 -03:00
Mitchell Horne
6ea05fce8e Revert "jh7110: Add StarFive JH7110 clock/reset generator drivers"
I did not set the author field properly; revert to fix this.

This reverts commit 5d6d627897.
2024-05-07 13:05:31 -03:00
Mitchell Horne
c8b472aa4b jh7110: enable MMC driver
Add a variant of the existing dwmmc driver, and enable it in the GENERIC
kernel.

Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D44026
2024-05-07 13:02:57 -03:00
Mitchell Horne
5d6d627897 jh7110: Add StarFive JH7110 clock/reset generator drivers
Implement a core clknode driver for the JH7110 (StarFive VisionFive v2)
platform.

Add clock/reset generator drivers for the PLL, SYS, and AON clock
groupings.

Co-authored-by:	mhorne
Reviewed by:	mhorne
Sponsored by:	The FreeBSD Foundation (mhorne's contributions)
Differential Revision:	https://reviews.freebsd.org/D43037
2024-05-07 13:02:57 -03:00
Mitchell Horne
cf08768207 starfive: add a syscon driver
It serves the purpose of attaching syscon devices as early as possible;
this is required for early attachment of the PLL clock driver.

Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D44270
2024-05-07 13:02:57 -03:00
Mitchell Horne
a77e1f0f81 busdma: better handling of small segment bouncing
Typically, when a DMA transaction requires bouncing, we will break up
the request into segments that are, at maximum, page-sized.

However, in the atypical case of a driver whose maximum segment size is
smaller than PAGE_SIZE, we end up inefficiently assigning each segment
its own bounce page. For example, the dwmmc driver has a maximum segment
size of 2048 (PAGE_SIZE / 2); a 4-page transfer ends up requiring 8
bounce pages in the current scheme.

We should attempt to batch segments into bounce pages more efficiently.
This is achieved by pushing all considerations of the maximum segment
size into the new _bus_dmamap_addsegs() function, which wraps
_bus_dmamap_addseg(). Thus we allocate the minimal number of bounce
pages required to complete the entire transfer, while still performing
the transfer with smaller-sized transactions.

For most drivers with a segment size >= PAGE_SIZE, this will have no
impact. For drivers like dwmmc mentioned above, this improves the memory
and performance efficiency when bouncing a large transfer.

Co-authored-by:	jhb
Reviewed by:	jhb
MFC after:	1 month
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D45048
2024-05-07 13:02:57 -03:00
Mitchell Horne
5604069824 busdma: deduplicate _bus_dmamap_addseg() function
It is functionally identical in all implementations, so move the
function to subr_busdma_bounce.c. The KASSERT present in the x86 version
is now enabled for all architectures. It should be universally
applicable.

Reviewed by:	jhb
MFC after:	1 month
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D45047
2024-05-07 13:02:57 -03:00
Lexi Winter
8a8daeafaf sys/*/conf: do not use "../../conf/" when including std.*
Since config(8) searches sys/conf by default, there's no need to specify
the full relative path here; replace it by the filename alone.

Reviewed by: imp
Pull Request: https://github.com/freebsd/freebsd-src/pull/1124
2024-04-23 15:13:31 -06:00
Lexi Winter
4f8f9d708e sys: add conf/std.debug, generic debugging options
The new sys/conf/std.debug contains the list of debugging options
enabled by default in -CURRENT, so they don't need to be listed
individually in every kernel config.

The enabled options are the set of all debug options which were enabled
for the GENERIC kernel on any platform.  This means some architectures
now have debugging options enabled in GENERIC which weren't previously
enabled:

- amd64: [1]
- arm64: [2]
- arm: [2]. [3]
- i386: [1], [2]
- powerpc: [1], [2], [3]
- riscv: [2]

[1] ALT_BREAK_TO_DEBUGGER is now enabled.
[2] BUF_TRACKING, FULL_BUF_TRACKING, and QUEUE_MACRO_DEBUG_TRASH are now
    enabled.
[3] DEADLKRES is now enabled.

While here, move the documentation for the (commented out) K*SAN options
for amd64 from GENERIC to NOTES.

Reviewed by: imp
Pull Request: https://github.com/freebsd/freebsd-src/pull/1124
2024-04-23 15:13:31 -06:00
Doug Moore
dd03eafacb riscv: create a convenience composite macro
Define PTE_TO_VM_PAGE to compose the PHYS_TO_VM_PAGE and PTE_TO_PHYS
macros. Use it where appropriate, and drop some variables that it
makes unnecessary.

Reviewed by:	jhb (previous version)
Differential Revision:	https://reviews.freebsd.org/D44700
2024-04-21 18:36:00 -05:00
John Baldwin
1f678b6ba2 NOTES: Move the VirtIO entries to the MI NOTES file
While here, add virtio_gpu

Reviewed by:	imp, emaste
Differential Revision:	https://reviews.freebsd.org/D44782
2024-04-13 19:10:27 -07:00
John Baldwin
8f7105a206 NOTES: Move NVMe entries to MI file
While here, adjust the sample setting for NVME_USE_NVD to use a
non-default setting as is typical in entries in NOTES.

Discussed with:	imp
Reviewed by:	manu
Sponsored by:	Chelsio Communications
Differential Revision:	https://reviews.freebsd.org/D44691
2024-04-09 15:02:58 -07:00
John Baldwin
2baed46e85 new-bus: Remove the 'rid' and 'type' arguments from BUS_*ACTIVATE_RESOURCE
The public bus_activate/deactivate_resource() API still accepts both
forms, but the internal kobj methods no longer pass the arguments.
Implementations which need the rid or type now use rman_get_rid() or
rman_get_type() to fetch the value from the allocated resource.

Reviewed by:	imp
Differential Revision:	https://reviews.freebsd.org/D44130
2024-03-13 15:05:54 -07:00
John Baldwin
d77f2092ce new-bus: Remove the 'type' argument from BUS_MAP/UNMAP_RESOURCE
The public bus_map/unmap_resource() API still accepts both forms, but
the internal kobj methods no longer pass the argument.
Implementations which need the type now use rman_get_type() to fetch
the value from the allocated resource.

Reviewed by:	imp
Differential Revision:	https://reviews.freebsd.org/D44129
2024-03-13 15:05:54 -07:00
Mitchell Horne
da48ddbf7c riscv: catch up with EARLY_PRINTF changes
On this platform early console access is possible via SBI. Follow recent
changes to EARLY_PRINTF option and give it a named constant.

Update the commented option in GENERIC so that it compiles.

Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D44100
2024-03-04 14:45:17 -04:00
Mitchell Horne
749e318da3 riscv: add starfive kernelconf template
Enable the Synopsis UART driver. Other drivers will be added in the
future.

Reviewed by:	jrtc27
Sponsored by:	The FreeBSD Foundatino
Differential Revision:	https://reviews.freebsd.org/D44105
2024-02-27 18:10:14 -04:00
Mitchell Horne
036ce936a5 riscv: add dwc, dwmmc to NOTES
In the future these drivers will be enabled in GENERIC. For now, ensure
they build with LINT.

Sponsored by:	The FreeBSD Foundation
2024-02-27 18:10:14 -04:00
Mitchell Horne
b134c10d65 busdma: fix page miscount for small segment sizes
For small segments (< PAGE_SIZE) there is a mismatch between how
required bounce pages are counted in _bus_dmamap_count_pages() and
bounce_bus_dmamap_load_buffer().

This problem has been observed on the RISC-V VisionFive v2 SoC (and
earlier revisions of the hardware) which has memory physically addressed
above 4GB. This requires some bouncing for the dwmmc driver, which has
has a maximum segment size of 2048 bytes. When attempting to load a
page-aligned 4-page buffer that requires bouncing, we can end up
counting 4 bounce pages for an 8-segment transfer. These pages will be
incorrectly configured to cover only the first half of the transfer (4 x
2048 bytes).

Fix the immediate issue by adding the maxsegsz check to
_bus_dmamap_count_pages(); this is what _bus_dmamap_count_phys() does
already. The result is that we will inefficiently allocate a separate
bounce page for each segment (8 pages for the example above), but the
transfer will proceed in its entirety.

The more complete fix is to address the shortcomings in how small
segments are assigned to bounce pages, so that we opportunistically
batch multiple segments to a page whenever they fit (e.g. two 2048 bytes
segments per 4096 page). This will be addressed more holistically in the
future. For now this change will prevent the (silent) incomplete
transfers that have been observed.

PR:		273694
Reported by:	Jari Sihvola <jsihv@gmx.com>
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D34118
2024-02-16 14:38:48 -04:00
John Baldwin
962b0bcbd9 riscv: Add missing includes for DDB
The #ifdef DDB code in parse_metadata was dead code without opt_ddb.h.
While here, update the call to db_fetch_ksymtab for changes in commit
02bc014a20.

Reviewed by:	mhorne
Obtained from:	CheriBSD
Differential Revision:	https://reviews.freebsd.org/D43919
2024-02-15 12:20:30 -08:00
Himanshu Chauhan
ee91dae43d riscv: Introduce support for APLIC interrupt controller
This patch introduces support for the RISC-V APLIC interrupt controller
[1]. Currently, it is only supports direct mode, i.e. without an IMSIC
and functionally replacing the legacy RISC-V PLIC. Work on IMSIC support
is in progress.

[1] https://github.com/riscv/riscv-aia/releases/tag/1.0

Reviewed by:	mhorne
Discussed with:	jrtc27
MFC after:	1 month
Differential Revision:	https://reviews.freebsd.org/D43293
2024-02-14 11:42:29 -04:00
John Baldwin
1f1b2286fd pmap: Convert boolean_t to bool.
Reviewed by:	kib (older version)
Differential Revision:	https://reviews.freebsd.org/D39921
2024-01-31 14:48:26 -08:00