6 commits

Author	SHA1	Message	Date
Neel Natu	1ff856dbd7	Allow the 'bhyve' process to control whether or not the virtual machine sees an ... ioapic. Obtained from: NetApp	2012-08-04 22:46:29 +00:00
Neel Natu	90d4b48f60	API to map an apic id to the vcpu. ... At the moment this is a simple mapping because the numerical values are identical.	2012-08-04 02:38:05 +00:00
Neel Natu	32c96bc813	There is no need to explicitly specify the CR4_VMXE bit when writing to guest ... CR4. This bit is specific to the Intel VTX and removing it makes the library more portable to AMD/SVM. In the Intel VTX implementation, the hypervisor will ensure that this bit is always set. See vmx_fix_cr4() for details. Suggested by: grehan	2012-08-04 02:14:27 +00:00
Peter Grehan	cd942e0f25	MSI-x interrupt support for PCI pass-thru devices. ... Includes instruction emulation for memory r/w access. This opens the door for io-apic, local apic, hpet timer, and legacy device emulation. Submitted by: ryan dot berryhill at sandvine dot com Reviewed by: grehan Obtained from: Sandvine	2012-04-28 16:28:00 +00:00
John Baldwin	b67e81db43	First cut to port bhyve, vmmctl, and libvmmapi to HEAD.	2011-05-15 04:03:11 +00:00
Peter Grehan	366f60834f	Import of bhyve hypervisor and utilities, part 1. ... vmm.ko - kernel module for VT-x, VT-d and hypervisor control bhyve - user-space sequencer and i/o emulation vmmctl - dump of hypervisor register state libvmm - front-end to vmm.ko chardev interface bhyve was designed and implemented by Neel Natu. Thanks to the following folk from NetApp who helped to make this available: Joe CaraDonna Peter Snyder Jeff Heller Sandeep Mann Steve Miller Brian Pawlowski	2011-05-13 04:54:01 +00:00