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UART: Remove ingenic xburst (mips) code from ns8250 driver

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Since ingenic JZ4780 SOC support has been removed there is no need
to support ingenic quirks in the UART driver.
Invert of commit b192bae67e

Reviewed by:    imp, manu
Approved by:    imp, manu (mentor)
Differential Revision:  https://reviews.freebsd.org/D42497
This commit is contained in:
Oskar Holmlund 2023-11-08 09:03:55 +01:00
parent d6e457328d
commit f25b0d6dd7
2 changed files with 6 additions and 40 deletions
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3
sys/dev/ic/ns16550.h
View file

@ -162,9 +162,6 @@
#define FIFO_XMT_RST FCR_XMT_RST
#define FCR_DMA 0x08
#define FIFO_DMA_MODE FCR_DMA
#ifdef CPU_XBURST
#define FCR_UART_ON 0x10
#endif
#define FCR_RX_LOW 0x00
#define FIFO_RX_LOW FCR_RX_LOW
#define FCR_RX_MEDL 0x40

43
sys/dev/uart/uart_dev_ns8250.c
View file

@ -233,9 +233,6 @@ ns8250_flush(struct uart_bas *bas, int what)
int drain = 0;
fcr = FCR_ENABLE;
#ifdef CPU_XBURST
fcr |= FCR_UART_ON;
#endif
if (what & UART_FLUSH_TRANSMITTER)
fcr |= FCR_XMT_RST;
if (what & UART_FLUSH_RECEIVER)
@ -327,10 +324,6 @@ ns8250_probe(struct uart_bas *bas)
{
u_char val;
#ifdef CPU_XBURST
uart_setreg(bas, REG_FCR, FCR_UART_ON);
#endif
/* Check known 0 bits that don't depend on DLAB. */
val = uart_getreg(bas, REG_IIR);
if (val & 0x30)
@ -352,7 +345,7 @@ static void
ns8250_init(struct uart_bas *bas, int baudrate, int databits, int stopbits,
int parity)
{
u_char ier, val;
u_char ier;
if (bas->rclk == 0)
bas->rclk = DEFAULT_RCLK;
@ -369,11 +362,7 @@ ns8250_init(struct uart_bas *bas, int baudrate, int databits, int stopbits,
uart_barrier(bas);
/* Disable the FIFO (if present). */
val = 0;
#ifdef CPU_XBURST
val |= FCR_UART_ON;
#endif
uart_setreg(bas, REG_FCR, val);
uart_setreg(bas, REG_FCR, 0);
uart_barrier(bas);
/* Set RTS & DTR. */
@ -552,9 +541,6 @@ ns8250_bus_attach(struct uart_softc *sc)
ns8250->busy_detect = bas->busy_detect;
ns8250->mcr = uart_getreg(bas, REG_MCR);
ns8250->fcr = FCR_ENABLE;
#ifdef CPU_XBURST
ns8250->fcr |= FCR_UART_ON;
#endif
if (!resource_int_value("uart", device_get_unit(sc->sc_dev), "flags",
&ivar)) {
if (UART_FLAGS_FCR_RX_LOW(ivar))
@ -847,7 +833,6 @@ ns8250_bus_probe(struct uart_softc *sc)
struct uart_bas *bas;
int count, delay, error, limit;
uint8_t lsr, mcr, ier;
uint8_t val;
bas = &sc->sc_bas;
@ -880,11 +865,7 @@ ns8250_bus_probe(struct uart_softc *sc)
* done. Since this is the first time we enable the FIFOs, we reset
* them.
*/
val = FCR_ENABLE;
#ifdef CPU_XBURST
val |= FCR_UART_ON;
#endif
uart_setreg(bas, REG_FCR, val);
uart_setreg(bas, REG_FCR, FCR_ENABLE);
uart_barrier(bas);
if (!(uart_getreg(bas, REG_IIR) & IIR_FIFO_MASK)) {
/*
@ -898,11 +879,7 @@ ns8250_bus_probe(struct uart_softc *sc)
return (0);
}
val = FCR_ENABLE | FCR_XMT_RST | FCR_RCV_RST;
#ifdef CPU_XBURST
val |= FCR_UART_ON;
#endif
uart_setreg(bas, REG_FCR, val);
uart_setreg(bas, REG_FCR, FCR_ENABLE | FCR_XMT_RST | FCR_RCV_RST);
uart_barrier(bas);
count = 0;
@ -912,11 +889,7 @@ ns8250_bus_probe(struct uart_softc *sc)
error = ns8250_drain(bas, UART_DRAIN_RECEIVER|UART_DRAIN_TRANSMITTER);
if (error) {
uart_setreg(bas, REG_MCR, mcr);
val = 0;
#ifdef CPU_XBURST
val |= FCR_UART_ON;
#endif
uart_setreg(bas, REG_FCR, val);
uart_setreg(bas, REG_FCR, 0);
uart_barrier(bas);
goto describe;
}
@ -947,11 +920,7 @@ ns8250_bus_probe(struct uart_softc *sc)
ier = uart_getreg(bas, REG_IER) & 0xe0;
uart_setreg(bas, REG_IER, ier);
uart_setreg(bas, REG_MCR, mcr);
val = 0;
#ifdef CPU_XBURST
val |= FCR_UART_ON;
#endif
uart_setreg(bas, REG_FCR, val);
uart_setreg(bas, REG_FCR, 0);
uart_barrier(bas);
count = 0;
goto describe;