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gdtoa: Regenerate configuration headers for 32-bit arm.

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These configuration headers were only guessed, but unfortunately not exactly
correctly. Therefore, re-generate them on real HW.

Generated on CA15, verified on CA9, CA7(with VFP lite) and on 32-bit ARMv9.

PR:	272229
Reported by:	Robert Clausecker <fuz@FreeBSD.org>
MFC after:	2 weeks
This commit is contained in:
Michal Meloun 2023-08-13 07:51:56 +02:00
parent f80a33ea41
commit e59b6e48f4
2 changed files with 9 additions and 11 deletions
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9
lib/libc/arm/arith.h
View file

@ -1,16 +1,15 @@
/*
* MD header for contrib/gdtoa
*
* $FreeBSD$
*/
/*
* NOTE: The definitions in this file must be correct or strtod(3) and
* floating point formats in printf(3) will break! The file can be
* generated by running contrib/gdtoa/arithchk.c on the target
* architecture. See contrib/gdtoa/gdtoaimp.h for details.
*
* Generated on CA15, verified on CA9, CA7(with VFP lite) and on 32-bit ARMv9.
*
*/
#define IEEE_8087
#define Arith_Kind_ASL 1
#define Sudden_Underflow
#define Double_Align

11
lib/libc/arm/gd_qnan.h
View file

@ -4,20 +4,19 @@
* This file can be generated by compiling and running contrib/gdtoa/qnan.c
* on the target architecture after arith.h has been generated.
*
* XXX I don't have ARM hardware, so I just guessed. --das
* Generated on CA15, verified on CA9, CA7(with VFP lite) and on 32-bit ARMv9.
*
* $FreeBSD$
*/
#define f_QNAN 0x7fc00000
#define d_QNAN0 0x0
#define d_QNAN1 0x7ff80000
#define ld_QNAN0 0x0
#define ld_QNAN1 0xc0000000
#define ld_QNAN2 0x7fff
#define ld_QNAN1 0x7ff80000
#define ld_QNAN2 0x0
#define ld_QNAN3 0x0
#define ldus_QNAN0 0x0
#define ldus_QNAN1 0x0
#define ldus_QNAN2 0x0
#define ldus_QNAN3 0xc000
#define ldus_QNAN4 0x7fff
#define ldus_QNAN3 0x7ff8
#define ldus_QNAN4 0x0