mirror of
https://github.com/freebsd/freebsd-src
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Split user trap processing out into a separate routine so that traps which
never result in user traps don't have to plow through it.
This commit is contained in:
Jake Burkholder
parent
587edcdc95
commit
e191c83fd4
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=103897
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@ -431,7 +431,7 @@ END(rsf_fatal)
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.macro tl0_setup type
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tl0_split
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b %xcc, tl0_trap
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ba %xcc, tl0_utrap
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mov \type, %o0
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.endm
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@ -504,7 +504,7 @@ ENTRY(tl0_sfsr_trap)
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tl0_split
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mov %g3, %o4
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mov %g4, %o5
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b %xcc, tl0_trap
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ba %xcc, tl0_utrap
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mov %g2, %o0
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END(tl0_sfsr_trap)
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@ -1036,7 +1036,7 @@ ENTRY(tl0_dmmu_prot_trap)
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mov %g2, %o3
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mov %g3, %o4
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mov %g4, %o5
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b %xcc, tl0_trap
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ba %xcc, tl0_utrap
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mov T_DATA_PROTECTION, %o0
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END(tl0_dmmu_prot_trap)
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@ -2189,6 +2189,110 @@ tl1_breakpoint:
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/*
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* User trap entry point.
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*
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* void tl0_utrap(u_long type, u_long o1, u_long o2, u_long tar, u_long sfar,
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* u_long sfsr)
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*
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* This handles redirecting a trap back to usermode as a user trap. The user
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* program must have first registered a trap handler with the kernel using
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* sysarch(SPARC_UTRAP_INSTALL). The trap handler is passed enough state
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* for it to return to the trapping code directly, it will not return through
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* the kernel. The trap type is passed in %o0, all out registers must be
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* passed through to tl0_trap or to usermode untouched. Note that the
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* parameters passed in out registers may be used by the user trap handler.
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* Do not change the registers they are passed in or you will break the ABI.
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*
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* If the trap type allows user traps, setup state to execute the user trap
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* handler and bounce back to usermode, otherwise branch to tl0_trap.
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*/
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ENTRY(tl0_utrap)
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/*
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* Check if the trap type allows user traps.
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*/
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cmp %o0, UT_MAX
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bge,a,pt %xcc, tl0_trap
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nop
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/*
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* Load the user trap handler from the utrap table.
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*/
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ldx [PCPU(CURTHREAD)], %l0
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ldx [%l0 + TD_PROC], %l0
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ldx [%l0 + P_MD + MD_UTRAP], %l0
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brz,pt %l0, tl0_trap
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sllx %o0, PTR_SHIFT, %l1
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ldx [%l0 + %l1], %l0
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brz,a,pt %l0, tl0_trap
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nop
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/*
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* If the save we did on entry to the kernel had to spill a window
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* to the pcb, pretend we took a spill trap instead. Any windows
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* that are in the pcb must be copied out or the fill handler will
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* not be able to find them, since the user trap handler returns
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* directly to the trapping code. Note that we only support precise
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* user traps, which implies that the condition that caused the trap
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* in the first place is still valid, so it will occur again when we
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* re-execute the trapping instruction.
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*/
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ldx [PCB_REG + PCB_NSAVED], %l1
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brnz,a,pn %l1, tl0_trap
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mov T_SPILL, %o0
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/*
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* Pass %fsr in %l4, %tstate in %l5, %tpc in %l6 and %tnpc in %l7.
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* The ABI specifies only %l6 and %l7, but we need to pass %fsr or
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* it may be clobbered by an interrupt before the user trap code
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* can read it, and we must pass %tstate in order to restore %ccr
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* and %asi. The %fsr must be stored to memory, so we use the
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* temporary stack for that.
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*/
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rd %fprs, %l1
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or %l1, FPRS_FEF, %l2
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wr %l2, 0, %fprs
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dec 8, ASP_REG
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stx %fsr, [ASP_REG]
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ldx [ASP_REG], %l4
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inc 8, ASP_REG
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wr %l1, 0, %fprs
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rdpr %tstate, %l5
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rdpr %tpc, %l6
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rdpr %tnpc, %l7
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/*
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* Setup %tnpc to return to.
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*/
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wrpr %l0, 0, %tnpc
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/*
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* Setup %wstate for return, clear WSTATE_TRANSITION.
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*/
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rdpr %wstate, %l1
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and %l1, WSTATE_NORMAL_MASK, %l1
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wrpr %l1, 0, %wstate
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/*
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* Setup %tstate for return, change the saved cwp to point to the
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* current window instead of the window at the time of the trap.
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*/
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andn %l5, TSTATE_CWP_MASK, %l1
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rdpr %cwp, %l2
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wrpr %l1, %l2, %tstate
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/*
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* Setup %sp. Userland processes will crash if this is not setup.
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*/
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sub %fp, CCFSZ, %sp
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/*
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* Execute the user trap handler.
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*/
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done
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END(tl0_utrap)
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/*
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* (Real) User trap entry point.
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*
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* void tl0_trap(u_int type, u_long o1, u_long o2, u_long tar, u_long sfar,
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* u_int sfsr)
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*
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@ -2233,70 +2337,8 @@ ENTRY(tl0_trap)
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9:
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#endif
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and %l5, WSTATE_NORMAL_MASK, %l5
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cmp %o0, UT_MAX
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bge,a,pt %xcc, 2f
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nop
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ldx [PCPU(CURTHREAD)], %l6
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ldx [%l6 + TD_PROC], %l6
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ldx [%l6 + P_MD + MD_UTRAP], %l6
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brz,pt %l6, 2f
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sllx %o0, PTR_SHIFT, %l7
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ldx [%l6 + %l7], %l6
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brz,pt %l6, 2f
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andn %l0, TSTATE_CWP_MASK, %l7
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ldx [PCB_REG + PCB_NSAVED], %g1
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brnz,a,pn %g1, 1f
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mov T_SPILL, %o0
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#if KTR_COMPILE & KTR_TRAP
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CATR(KTR_TRAP, "tl0_trap: user trap npc=%#lx"
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, %g1, %g2, %g3, 7, 8, 9)
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stx %l6, [%g1 + KTR_PARM1]
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9:
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#endif
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wrpr %l5, %wstate
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wrpr %l6, %tnpc
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rdpr %cwp, %l6
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wrpr %l6, %l7, %tstate
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sub %fp, CCFSZ, %sp
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/*
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* Need to store %fsr to pass it to the user trap handler. Otherwise,
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* the ftt field might be zeoed out in a store in another trap or
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* interrupt. Use the temporary stack for that.
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*/
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rd %fprs, %l3
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or %l3, FPRS_FEF, %l4
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wr %l4, 0, %fprs
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dec 8, ASP_REG
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stx %fsr, [ASP_REG]
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ldx [ASP_REG], %l4
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inc 8, ASP_REG
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wr %l3, 0, %fprs
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mov %l0, %l5
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mov %l1, %l6
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mov %l2, %l7
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done
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1:
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#if KTR_COMPILE & KTR_TRAP
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CATR(KTR_TRAP, "tl0_trap: defer user trap npc=%#lx nsaved=%#lx"
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, %g1, %g2, %g3, 7, 8, 9)
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stx %l6, [%g1 + KTR_PARM1]
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ldx [PCB_REG + PCB_NSAVED], %g2
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stx %g2, [%g1 + KTR_PARM2]
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9:
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#endif
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2: sllx %l5, WSTATE_OTHER_SHIFT, %l5
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1: and %l5, WSTATE_NORMAL_MASK, %l5
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sllx %l5, WSTATE_OTHER_SHIFT, %l5
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wrpr %l5, WSTATE_KERNEL, %wstate
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rdpr %canrestore, %l6
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wrpr %l6, 0, %otherwin
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