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snd_hdspe(4): One pcm device per physical ADAT port.
ADAT connections transport 8, 4 or 2 audio channels depending on the sample rate. Instead of splitting each physical ADAT port into 4 (potentially unmapped) stereo pcm devices, create just one pcm device of variable channel width for every ADAT port. Depending on the sample rate and channel width selected, the pcm channels may be only partially mapped to ADAT channels and vice versa. Added flexibility of the new channel mapping is also prerequisite to introduce more pcm device layouts in follow-up commits. Reviewed by: br Differential Revision: https://reviews.freebsd.org/D43393
This commit is contained in:
Florian Walpen
Ruslan Bukin
parent
787cb30d20
commit
d7fde2c9ec
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@ -22,7 +22,7 @@
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.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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.\" SUCH DAMAGE.
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.\"
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.Dd December 30, 2023
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.Dd January 8, 2024
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.Dt SND_HDSPE 4
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.Os
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.Sh NAME
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@ -59,6 +59,13 @@ RME HDSPe AIO
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.It
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RME HDSPe RayDAT
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.El
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.Pp
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By default, each
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.Xr pcm 4
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device corresponds to a physical port on the sound card.
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For ADAT ports, 8 channel, 4 channel and 2 channel formats are supported.
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Depending on sample rate and channel format selected, not all pcm channels can
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be mapped to ADAT channels and vice versa.
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.Sh SYSCTL TUNABLES
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These settings and informational values can be accessed at runtime with the
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.Xr sysctl 8
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@ -111,3 +118,5 @@ The
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.Nm
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driver was written by
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.An Ruslan Bukin <br@bsdpad.com> .
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.An Florian Walpen <dev@submerge.ch>
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contributed clock source settings and restructured the pcm device mapping.
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@ -2,6 +2,7 @@
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2012-2021 Ruslan Bukin <br@bsdpad.com>
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* Copyright (c) 2023-2024 Florian Walpen <dev@submerge.ch>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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@ -78,6 +79,152 @@ static struct hdspe_rate rate_map[] = {
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{ 0, 0 },
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};
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static uint32_t
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hdspe_channel_play_ports(struct hdspe_channel *hc)
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{
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return (hc->ports & (HDSPE_CHAN_AIO_ALL | HDSPE_CHAN_RAY_ALL));
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}
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static uint32_t
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hdspe_channel_rec_ports(struct hdspe_channel *hc)
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{
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return (hc->ports & (HDSPE_CHAN_AIO_ALL_REC | HDSPE_CHAN_RAY_ALL));
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}
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static unsigned int
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hdspe_adat_width(uint32_t speed)
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{
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if (speed > 96000)
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return (2);
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if (speed > 48000)
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return (4);
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return (8);
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}
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static uint32_t
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hdspe_port_first(uint32_t ports)
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{
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return (ports & (~(ports - 1))); /* Extract first bit set. */
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}
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static uint32_t
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hdspe_port_first_row(uint32_t ports)
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{
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uint32_t ends;
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/* Restrict ports to one set with contiguous slots. */
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if (ports & HDSPE_CHAN_AIO_LINE)
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ports = HDSPE_CHAN_AIO_LINE; /* Gap in the AIO slots here. */
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else if (ports & HDSPE_CHAN_AIO_ALL)
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ports &= HDSPE_CHAN_AIO_ALL; /* Rest of the AIO slots. */
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else if (ports & HDSPE_CHAN_RAY_ALL)
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ports &= HDSPE_CHAN_RAY_ALL; /* All RayDAT slots. */
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/* Ends of port rows are followed by a port which is not in the set. */
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ends = ports & (~(ports >> 1));
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/* First row of contiguous ports ends in the first row end. */
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return (ports & (ends ^ (ends - 1)));
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}
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static unsigned int
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hdspe_channel_count(uint32_t ports, uint32_t adat_width)
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{
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unsigned int count = 0;
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if (ports & HDSPE_CHAN_AIO_ALL) {
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/* AIO ports. */
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if (ports & HDSPE_CHAN_AIO_LINE)
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count += 2;
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if (ports & HDSPE_CHAN_AIO_PHONE)
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count += 2;
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if (ports & HDSPE_CHAN_AIO_AES)
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count += 2;
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if (ports & HDSPE_CHAN_AIO_SPDIF)
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count += 2;
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if (ports & HDSPE_CHAN_AIO_ADAT)
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count += adat_width;
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} else if (ports & HDSPE_CHAN_RAY_ALL) {
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/* RayDAT ports. */
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if (ports & HDSPE_CHAN_RAY_AES)
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count += 2;
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if (ports & HDSPE_CHAN_RAY_SPDIF)
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count += 2;
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if (ports & HDSPE_CHAN_RAY_ADAT1)
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count += adat_width;
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if (ports & HDSPE_CHAN_RAY_ADAT2)
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count += adat_width;
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if (ports & HDSPE_CHAN_RAY_ADAT3)
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count += adat_width;
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if (ports & HDSPE_CHAN_RAY_ADAT4)
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count += adat_width;
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}
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return (count);
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}
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static unsigned int
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hdspe_channel_offset(uint32_t subset, uint32_t ports, unsigned int adat_width)
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{
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uint32_t preceding;
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/* Make sure we have a subset of ports. */
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subset &= ports;
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/* Include all ports preceding the first one of the subset. */
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preceding = ports & (~subset & (subset - 1));
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if (preceding & HDSPE_CHAN_AIO_ALL)
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preceding &= HDSPE_CHAN_AIO_ALL; /* Contiguous AIO slots. */
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else if (preceding & HDSPE_CHAN_RAY_ALL)
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preceding &= HDSPE_CHAN_RAY_ALL; /* Contiguous RayDAT slots. */
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return (hdspe_channel_count(preceding, adat_width));
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}
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static unsigned int
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hdspe_port_slot_offset(uint32_t port, unsigned int adat_width)
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{
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/* Exctract the first port (lowest bit) if set of ports. */
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switch (hdspe_port_first(port)) {
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/* AIO ports */
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case HDSPE_CHAN_AIO_LINE:
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return (0);
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case HDSPE_CHAN_AIO_PHONE:
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return (6);
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case HDSPE_CHAN_AIO_AES:
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return (8);
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case HDSPE_CHAN_AIO_SPDIF:
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return (10);
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case HDSPE_CHAN_AIO_ADAT:
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return (12);
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/* RayDAT ports */
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case HDSPE_CHAN_RAY_AES:
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return (0);
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case HDSPE_CHAN_RAY_SPDIF:
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return (2);
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case HDSPE_CHAN_RAY_ADAT1:
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return (4);
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case HDSPE_CHAN_RAY_ADAT2:
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return (4 + adat_width);
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case HDSPE_CHAN_RAY_ADAT3:
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return (4 + 2 * adat_width);
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case HDSPE_CHAN_RAY_ADAT4:
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return (4 + 3 * adat_width);
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default:
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return (0);
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}
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}
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static unsigned int
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hdspe_port_slot_width(uint32_t ports, unsigned int adat_width)
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{
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uint32_t row;
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/* Count number of contiguous slots from the first physical port. */
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row = hdspe_port_first_row(ports);
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return (hdspe_channel_count(row, adat_width));
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}
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static int
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hdspe_hw_mixer(struct sc_chinfo *ch, unsigned int dst,
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unsigned int src, unsigned short data)
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@ -103,11 +250,34 @@ hdspe_hw_mixer(struct sc_chinfo *ch, unsigned int dst,
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static int
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hdspechan_setgain(struct sc_chinfo *ch)
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{
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struct sc_info *sc;
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uint32_t port, ports;
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unsigned int slot, end_slot;
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unsigned short volume;
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hdspe_hw_mixer(ch, ch->lslot, ch->lslot,
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ch->lvol * HDSPE_MAX_GAIN / 100);
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hdspe_hw_mixer(ch, ch->rslot, ch->rslot,
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ch->rvol * HDSPE_MAX_GAIN / 100);
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sc = ch->parent->sc;
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/* Iterate through all physical ports of the channel. */
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ports = ch->ports;
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port = hdspe_port_first(ports);
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while (port != 0) {
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/* Get slot range of the physical port. */
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slot =
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hdspe_port_slot_offset(port, hdspe_adat_width(sc->speed));
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end_slot = slot +
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hdspe_port_slot_width(port, hdspe_adat_width(sc->speed));
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/* Treat first slot as left channel. */
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volume = ch->lvol * HDSPE_MAX_GAIN / 100;
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for (; slot < end_slot; slot++) {
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hdspe_hw_mixer(ch, slot, slot, volume);
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/* Subsequent slots all get the right channel volume. */
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volume = ch->rvol * HDSPE_MAX_GAIN / 100;
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}
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ports &= ~port;
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port = hdspe_port_first(ports);
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}
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return (0);
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}
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@ -126,10 +296,10 @@ hdspemixer_init(struct snd_mixer *m)
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mask = SOUND_MASK_PCM;
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if (scp->hc->play)
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if (hdspe_channel_play_ports(scp->hc))
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mask |= SOUND_MASK_VOLUME;
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if (scp->hc->rec)
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if (hdspe_channel_rec_ports(scp->hc))
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mask |= SOUND_MASK_RECLEV;
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snd_mtxlock(sc->lock);
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@ -181,7 +351,9 @@ hdspechan_enable(struct sc_chinfo *ch, int value)
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{
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struct sc_pcminfo *scp;
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struct sc_info *sc;
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uint32_t row, ports;
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int reg;
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unsigned int slot, end_slot;
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scp = ch->parent;
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sc = scp->sc;
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@ -193,9 +365,22 @@ hdspechan_enable(struct sc_chinfo *ch, int value)
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ch->run = value;
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hdspe_write_1(sc, reg + (4 * ch->lslot), value);
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if (AFMT_CHANNEL(ch->format) == 2)
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hdspe_write_1(sc, reg + (4 * ch->rslot), value);
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/* Iterate through rows of ports with contiguous slots. */
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ports = ch->ports;
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row = hdspe_port_first_row(ports);
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while (row != 0) {
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slot =
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hdspe_port_slot_offset(row, hdspe_adat_width(sc->speed));
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end_slot = slot +
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hdspe_port_slot_width(row, hdspe_adat_width(sc->speed));
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for (; slot < end_slot; slot++) {
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hdspe_write_1(sc, reg + (4 * slot), value);
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}
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ports &= ~row;
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row = hdspe_port_first_row(ports);
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}
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}
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static int
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@ -253,56 +438,152 @@ hdspe_stop_audio(struct sc_info *sc)
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hdspe_write_4(sc, HDSPE_CONTROL_REG, sc->ctrl_register);
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}
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/* Multiplex / demultiplex: 2.0 <-> 2 x 1.0. */
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static void
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buffer_mux_write(uint32_t *dma, uint32_t *pcm, unsigned int pos,
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unsigned int samples, unsigned int slots, unsigned int channels)
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{
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int slot;
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for (; samples > 0; samples--) {
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for (slot = 0; slot < slots; slot++) {
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dma[slot * HDSPE_CHANBUF_SAMPLES + pos] =
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pcm[pos * channels + slot];
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}
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pos = (pos + 1) % HDSPE_CHANBUF_SAMPLES;
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}
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}
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static void
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buffer_mux_port(uint32_t *dma, uint32_t *pcm, uint32_t subset, uint32_t ports,
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unsigned int pos, unsigned int samples, unsigned int adat_width,
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unsigned int pcm_width)
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{
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unsigned int slot_offset, slots;
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unsigned int channels, chan_pos;
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/* Translate DMA slot offset to DMA buffer offset. */
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slot_offset = hdspe_port_slot_offset(subset, adat_width);
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dma += slot_offset * HDSPE_CHANBUF_SAMPLES;
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/* Channel position of the port subset and total number of channels. */
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chan_pos = hdspe_channel_offset(subset, ports, pcm_width);
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pcm += chan_pos;
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channels = hdspe_channel_count(ports, pcm_width);
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/* Only copy as much as supported by both hardware and pcm channel. */
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slots = hdspe_port_slot_width(subset, MIN(adat_width, pcm_width));
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/* Let the compiler inline and loop unroll common cases. */
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if (slots == 2)
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buffer_mux_write(dma, pcm, pos, samples, 2, channels);
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else if (slots == 4)
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buffer_mux_write(dma, pcm, pos, samples, 4, channels);
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else if (slots == 8)
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buffer_mux_write(dma, pcm, pos, samples, 8, channels);
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else
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buffer_mux_write(dma, pcm, pos, samples, slots, channels);
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}
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static void
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buffer_demux_read(uint32_t *dma, uint32_t *pcm, unsigned int pos,
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unsigned int samples, unsigned int slots, unsigned int channels)
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{
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int slot;
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for (; samples > 0; samples--) {
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for (slot = 0; slot < slots; slot++) {
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pcm[pos * channels + slot] =
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dma[slot * HDSPE_CHANBUF_SAMPLES + pos];
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}
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pos = (pos + 1) % HDSPE_CHANBUF_SAMPLES;
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}
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}
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static void
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buffer_demux_port(uint32_t *dma, uint32_t *pcm, uint32_t subset, uint32_t ports,
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unsigned int pos, unsigned int samples, unsigned int adat_width,
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unsigned int pcm_width)
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{
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unsigned int slot_offset, slots;
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unsigned int channels, chan_pos;
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/* Translate port slot offset to DMA buffer offset. */
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slot_offset = hdspe_port_slot_offset(subset, adat_width);
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dma += slot_offset * HDSPE_CHANBUF_SAMPLES;
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/* Channel position of the port subset and total number of channels. */
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chan_pos = hdspe_channel_offset(subset, ports, pcm_width);
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pcm += chan_pos;
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channels = hdspe_channel_count(ports, pcm_width);
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/* Only copy as much as supported by both hardware and pcm channel. */
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slots = hdspe_port_slot_width(subset, MIN(adat_width, pcm_width));
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/* Let the compiler inline and loop unroll common cases. */
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if (slots == 2)
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buffer_demux_read(dma, pcm, pos, samples, 2, channels);
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else if (slots == 4)
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buffer_demux_read(dma, pcm, pos, samples, 4, channels);
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else if (slots == 8)
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buffer_demux_read(dma, pcm, pos, samples, 8, channels);
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else
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buffer_demux_read(dma, pcm, pos, samples, slots, channels);
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}
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/* Copy data between DMA and PCM buffers. */
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static void
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buffer_copy(struct sc_chinfo *ch)
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{
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struct sc_pcminfo *scp;
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struct sc_info *sc;
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int ssize, dsize;
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int src, dst;
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int n;
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int i;
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uint32_t row, ports;
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unsigned int pos;
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unsigned int n;
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unsigned int adat_width, pcm_width;
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scp = ch->parent;
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sc = scp->sc;
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n = AFMT_CHANNEL(ch->format); /* n channels */
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if (ch->dir == PCMDIR_PLAY) {
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src = sndbuf_getreadyptr(ch->buffer);
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} else {
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src = sndbuf_getfreeptr(ch->buffer);
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}
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/* Let pcm formats differ from current hardware ADAT width. */
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adat_width = hdspe_adat_width(sc->speed);
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if (n == hdspe_channel_count(ch->ports, 2))
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pcm_width = 2;
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else if (n == hdspe_channel_count(ch->ports, 4))
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pcm_width = 4;
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else
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pcm_width = 8;
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src /= 4; /* Bytes per sample. */
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dst = src / n; /* Destination buffer n-times smaller. */
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if (ch->dir == PCMDIR_PLAY)
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pos = sndbuf_getreadyptr(ch->buffer);
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else
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pos = sndbuf_getfreeptr(ch->buffer);
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ssize = ch->size / 4;
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dsize = ch->size / (4 * n);
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pos /= 4; /* Bytes per sample. */
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pos /= n; /* Destination buffer n-times smaller. */
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/*
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* Use two fragment buffer to avoid sound clipping.
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*/
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/* Iterate through rows of ports with contiguous slots. */
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ports = ch->ports;
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if (pcm_width == adat_width)
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row = hdspe_port_first_row(ports);
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else
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row = hdspe_port_first(ports);
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for (i = 0; i < sc->period * 2 /* fragments */; i++) {
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if (ch->dir == PCMDIR_PLAY) {
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sc->pbuf[dst + HDSPE_CHANBUF_SAMPLES * ch->lslot] =
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ch->data[src];
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sc->pbuf[dst + HDSPE_CHANBUF_SAMPLES * ch->rslot] =
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ch->data[src + 1];
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while (row != 0) {
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if (ch->dir == PCMDIR_PLAY)
|
||||
buffer_mux_port(sc->pbuf, ch->data, row, ch->ports, pos,
|
||||
sc->period * 2, adat_width, pcm_width);
|
||||
else
|
||||
buffer_demux_port(sc->rbuf, ch->data, row, ch->ports,
|
||||
pos, sc->period * 2, adat_width, pcm_width);
|
||||
|
||||
} else {
|
||||
ch->data[src] =
|
||||
sc->rbuf[dst + HDSPE_CHANBUF_SAMPLES * ch->lslot];
|
||||
ch->data[src+1] =
|
||||
sc->rbuf[dst + HDSPE_CHANBUF_SAMPLES * ch->rslot];
|
||||
}
|
||||
|
||||
dst+=1;
|
||||
dst %= dsize;
|
||||
src += n;
|
||||
src %= ssize;
|
||||
ports &= ~row;
|
||||
if (pcm_width == adat_width)
|
||||
row = hdspe_port_first_row(ports);
|
||||
else
|
||||
row = hdspe_port_first(ports);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -312,17 +593,30 @@ clean(struct sc_chinfo *ch)
|
|||
struct sc_pcminfo *scp;
|
||||
struct sc_info *sc;
|
||||
uint32_t *buf;
|
||||
uint32_t row, ports;
|
||||
unsigned int offset, slots;
|
||||
|
||||
scp = ch->parent;
|
||||
sc = scp->sc;
|
||||
buf = sc->rbuf;
|
||||
|
||||
if (ch->dir == PCMDIR_PLAY) {
|
||||
if (ch->dir == PCMDIR_PLAY)
|
||||
buf = sc->pbuf;
|
||||
}
|
||||
|
||||
bzero(buf + HDSPE_CHANBUF_SAMPLES * ch->lslot, HDSPE_CHANBUF_SIZE);
|
||||
bzero(buf + HDSPE_CHANBUF_SAMPLES * ch->rslot, HDSPE_CHANBUF_SIZE);
|
||||
/* Iterate through rows of ports with contiguous slots. */
|
||||
ports = ch->ports;
|
||||
row = hdspe_port_first_row(ports);
|
||||
while (row != 0) {
|
||||
offset = hdspe_port_slot_offset(row,
|
||||
hdspe_adat_width(sc->speed));
|
||||
slots = hdspe_port_slot_width(row, hdspe_adat_width(sc->speed));
|
||||
|
||||
bzero(buf + offset * HDSPE_CHANBUF_SAMPLES,
|
||||
slots * HDSPE_CHANBUF_SIZE);
|
||||
|
||||
ports &= ~row;
|
||||
row = hdspe_port_first_row(ports);
|
||||
}
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
|
@ -344,13 +638,29 @@ hdspechan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b,
|
|||
num = scp->chnum;
|
||||
|
||||
ch = &scp->chan[num];
|
||||
ch->lslot = scp->hc->left;
|
||||
ch->rslot = scp->hc->right;
|
||||
|
||||
if (dir == PCMDIR_PLAY)
|
||||
ch->ports = hdspe_channel_play_ports(scp->hc);
|
||||
else
|
||||
ch->ports = hdspe_channel_rec_ports(scp->hc);
|
||||
|
||||
ch->run = 0;
|
||||
ch->lvol = 0;
|
||||
ch->rvol = 0;
|
||||
|
||||
ch->size = HDSPE_CHANBUF_SIZE * 2; /* max size */
|
||||
/* Support all possible ADAT widths as channel formats. */
|
||||
ch->cap_fmts[0] =
|
||||
SND_FORMAT(AFMT_S32_LE, hdspe_channel_count(ch->ports, 2), 0);
|
||||
ch->cap_fmts[1] =
|
||||
SND_FORMAT(AFMT_S32_LE, hdspe_channel_count(ch->ports, 4), 0);
|
||||
ch->cap_fmts[2] =
|
||||
SND_FORMAT(AFMT_S32_LE, hdspe_channel_count(ch->ports, 8), 0);
|
||||
ch->cap_fmts[3] = 0;
|
||||
ch->caps = malloc(sizeof(struct pcmchan_caps), M_HDSPE, M_NOWAIT);
|
||||
*(ch->caps) = (struct pcmchan_caps) {32000, 192000, ch->cap_fmts, 0};
|
||||
|
||||
/* Allocate maximum buffer size. */
|
||||
ch->size = HDSPE_CHANBUF_SIZE * hdspe_channel_count(ch->ports, 8);
|
||||
ch->data = malloc(ch->size, M_HDSPE, M_NOWAIT);
|
||||
|
||||
ch->buffer = b;
|
||||
|
|
@ -430,8 +740,7 @@ hdspechan_getptr(kobj_t obj, void *data)
|
|||
snd_mtxunlock(sc->lock);
|
||||
|
||||
pos = ret & HDSPE_BUF_POSITION_MASK;
|
||||
if (AFMT_CHANNEL(ch->format) == 2)
|
||||
pos *= 2; /* Hardbuf twice bigger. */
|
||||
pos *= AFMT_CHANNEL(ch->format); /* Hardbuf with multiple channels. */
|
||||
|
||||
return (pos);
|
||||
}
|
||||
|
|
@ -456,6 +765,10 @@ hdspechan_free(kobj_t obj, void *data)
|
|||
free(ch->data, M_HDSPE);
|
||||
ch->data = NULL;
|
||||
}
|
||||
if (ch->caps != NULL) {
|
||||
free(ch->caps, M_HDSPE);
|
||||
ch->caps = NULL;
|
||||
}
|
||||
snd_mtxunlock(sc->lock);
|
||||
|
||||
return (0);
|
||||
|
|
@ -580,9 +893,8 @@ hdspechan_setblocksize(kobj_t obj, void *data, uint32_t blocksize)
|
|||
|
||||
/* First look for equal latency. */
|
||||
for (i = 0; latency_map[i].period != 0; i++) {
|
||||
if (latency_map[i].period == blocksize) {
|
||||
if (latency_map[i].period == blocksize)
|
||||
hl = &latency_map[i];
|
||||
}
|
||||
}
|
||||
|
||||
/* If no match, just find nearest. */
|
||||
|
|
@ -615,20 +927,12 @@ hdspechan_setblocksize(kobj_t obj, void *data, uint32_t blocksize)
|
|||
return (sndbuf_getblksz(ch->buffer));
|
||||
}
|
||||
|
||||
static uint32_t hdspe_rfmt[] = {
|
||||
static uint32_t hdspe_bkp_fmt[] = {
|
||||
SND_FORMAT(AFMT_S32_LE, 2, 0),
|
||||
0
|
||||
};
|
||||
|
||||
static struct pcmchan_caps hdspe_rcaps = {32000, 192000, hdspe_rfmt, 0};
|
||||
|
||||
static uint32_t hdspe_pfmt[] = {
|
||||
SND_FORMAT(AFMT_S32_LE, 1, 0),
|
||||
SND_FORMAT(AFMT_S32_LE, 2, 0),
|
||||
0
|
||||
};
|
||||
|
||||
static struct pcmchan_caps hdspe_pcaps = {32000, 192000, hdspe_pfmt, 0};
|
||||
static struct pcmchan_caps hdspe_bkp_caps = {32000, 192000, hdspe_bkp_fmt, 0};
|
||||
|
||||
static struct pcmchan_caps *
|
||||
hdspechan_getcaps(kobj_t obj, void *data)
|
||||
|
|
@ -642,8 +946,10 @@ hdspechan_getcaps(kobj_t obj, void *data)
|
|||
device_printf(scp->dev, "hdspechan_getcaps()\n");
|
||||
#endif
|
||||
|
||||
return ((ch->dir == PCMDIR_PLAY) ?
|
||||
&hdspe_pcaps : &hdspe_rcaps);
|
||||
if (ch->caps != NULL)
|
||||
return (ch->caps);
|
||||
|
||||
return (&hdspe_bkp_caps);
|
||||
}
|
||||
|
||||
static kobj_method_t hdspechan_methods[] = {
|
||||
|
|
@ -695,13 +1001,21 @@ hdspe_pcm_attach(device_t dev)
|
|||
char status[SND_STATUSLEN];
|
||||
struct sc_pcminfo *scp;
|
||||
char desc[64];
|
||||
int i, err;
|
||||
int err;
|
||||
int play, rec;
|
||||
|
||||
scp = device_get_ivars(dev);
|
||||
scp->ih = &hdspe_pcm_intr;
|
||||
|
||||
bzero(desc, sizeof(desc));
|
||||
snprintf(desc, sizeof(desc), "HDSPe AIO [%s]", scp->hc->descr);
|
||||
if (scp->hc->ports & HDSPE_CHAN_AIO_ALL)
|
||||
snprintf(desc, sizeof(desc), "HDSPe AIO [%s]",
|
||||
scp->hc->descr);
|
||||
else if (scp->hc->ports & HDSPE_CHAN_RAY_ALL)
|
||||
snprintf(desc, sizeof(desc), "HDSPe RayDAT [%s]",
|
||||
scp->hc->descr);
|
||||
else
|
||||
snprintf(desc, sizeof(desc), "HDSPe ? [%s]", scp->hc->descr);
|
||||
device_set_desc_copy(dev, desc);
|
||||
|
||||
/*
|
||||
|
|
@ -710,19 +1024,21 @@ hdspe_pcm_attach(device_t dev)
|
|||
*/
|
||||
pcm_setflags(dev, pcm_getflags(dev) | SD_F_MPSAFE);
|
||||
|
||||
err = pcm_register(dev, scp, scp->hc->play, scp->hc->rec);
|
||||
play = (hdspe_channel_play_ports(scp->hc)) ? 1 : 0;
|
||||
rec = (hdspe_channel_rec_ports(scp->hc)) ? 1 : 0;
|
||||
err = pcm_register(dev, scp, play, rec);
|
||||
if (err) {
|
||||
device_printf(dev, "Can't register pcm.\n");
|
||||
return (ENXIO);
|
||||
}
|
||||
|
||||
scp->chnum = 0;
|
||||
for (i = 0; i < scp->hc->play; i++) {
|
||||
if (play) {
|
||||
pcm_addchan(dev, PCMDIR_PLAY, &hdspechan_class, scp);
|
||||
scp->chnum++;
|
||||
}
|
||||
|
||||
for (i = 0; i < scp->hc->rec; i++) {
|
||||
if (rec) {
|
||||
pcm_addchan(dev, PCMDIR_REC, &hdspechan_class, scp);
|
||||
scp->chnum++;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -2,6 +2,7 @@
|
|||
* SPDX-License-Identifier: BSD-2-Clause
|
||||
*
|
||||
* Copyright (c) 2012-2016 Ruslan Bukin <br@bsdpad.com>
|
||||
* Copyright (c) 2023-2024 Florian Walpen <dev@submerge.ch>
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
|
|
@ -69,47 +70,22 @@ static struct hdspe_clock_source hdspe_clock_source_table_aio[] = {
|
|||
};
|
||||
|
||||
static struct hdspe_channel chan_map_aio[] = {
|
||||
{ 0, 1, "line", 1, 1 },
|
||||
{ 6, 7, "phone", 1, 0 },
|
||||
{ 8, 9, "aes", 1, 1 },
|
||||
{ 10, 11, "s/pdif", 1, 1 },
|
||||
{ 12, 16, "adat", 1, 1 },
|
||||
|
||||
/* Single or double speed. */
|
||||
{ 14, 18, "adat", 1, 1 },
|
||||
|
||||
/* Single speed only. */
|
||||
{ 13, 15, "adat", 1, 1 },
|
||||
{ 17, 19, "adat", 1, 1 },
|
||||
|
||||
{ 0, 0, NULL, 0, 0 },
|
||||
{ HDSPE_CHAN_AIO_LINE, "line" },
|
||||
{ HDSPE_CHAN_AIO_PHONE, "phone" },
|
||||
{ HDSPE_CHAN_AIO_AES, "aes" },
|
||||
{ HDSPE_CHAN_AIO_SPDIF, "s/pdif" },
|
||||
{ HDSPE_CHAN_AIO_ADAT, "adat" },
|
||||
{ 0, NULL },
|
||||
};
|
||||
|
||||
static struct hdspe_channel chan_map_rd[] = {
|
||||
{ 0, 1, "aes", 1, 1 },
|
||||
{ 2, 3, "s/pdif", 1, 1 },
|
||||
{ 4, 5, "adat", 1, 1 },
|
||||
{ 6, 7, "adat", 1, 1 },
|
||||
{ 8, 9, "adat", 1, 1 },
|
||||
{ 10, 11, "adat", 1, 1 },
|
||||
|
||||
/* Single or double speed. */
|
||||
{ 12, 13, "adat", 1, 1 },
|
||||
{ 14, 15, "adat", 1, 1 },
|
||||
{ 16, 17, "adat", 1, 1 },
|
||||
{ 18, 19, "adat", 1, 1 },
|
||||
|
||||
/* Single speed only. */
|
||||
{ 20, 21, "adat", 1, 1 },
|
||||
{ 22, 23, "adat", 1, 1 },
|
||||
{ 24, 25, "adat", 1, 1 },
|
||||
{ 26, 27, "adat", 1, 1 },
|
||||
{ 28, 29, "adat", 1, 1 },
|
||||
{ 30, 31, "adat", 1, 1 },
|
||||
{ 32, 33, "adat", 1, 1 },
|
||||
{ 34, 35, "adat", 1, 1 },
|
||||
|
||||
{ 0, 0, NULL, 0, 0 },
|
||||
{ HDSPE_CHAN_RAY_AES, "aes" },
|
||||
{ HDSPE_CHAN_RAY_SPDIF, "s/pdif" },
|
||||
{ HDSPE_CHAN_RAY_ADAT1, "adat1" },
|
||||
{ HDSPE_CHAN_RAY_ADAT2, "adat2" },
|
||||
{ HDSPE_CHAN_RAY_ADAT3, "adat3" },
|
||||
{ HDSPE_CHAN_RAY_ADAT4, "adat4" },
|
||||
{ 0, NULL },
|
||||
};
|
||||
|
||||
static void
|
||||
|
|
|
|||
|
|
@ -2,6 +2,7 @@
|
|||
* SPDX-License-Identifier: BSD-2-Clause
|
||||
*
|
||||
* Copyright (c) 2012-2016 Ruslan Bukin <br@bsdpad.com>
|
||||
* Copyright (c) 2023-2024 Florian Walpen <dev@submerge.ch>
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
|
|
@ -116,12 +117,34 @@
|
|||
#define HDSPE_CHANBUF_SIZE (4 * HDSPE_CHANBUF_SAMPLES)
|
||||
#define HDSPE_DMASEGSIZE (HDSPE_CHANBUF_SIZE * HDSPE_MAX_SLOTS)
|
||||
|
||||
#define HDSPE_CHAN_AIO_LINE (1 << 0)
|
||||
#define HDSPE_CHAN_AIO_PHONE (1 << 1)
|
||||
#define HDSPE_CHAN_AIO_AES (1 << 2)
|
||||
#define HDSPE_CHAN_AIO_SPDIF (1 << 3)
|
||||
#define HDSPE_CHAN_AIO_ADAT (1 << 4)
|
||||
#define HDSPE_CHAN_AIO_ALL_REC (HDSPE_CHAN_AIO_LINE | \
|
||||
HDSPE_CHAN_AIO_AES | \
|
||||
HDSPE_CHAN_AIO_SPDIF | \
|
||||
HDSPE_CHAN_AIO_ADAT)
|
||||
#define HDSPE_CHAN_AIO_ALL (HDSPE_CHAN_AIO_ALL_REC | \
|
||||
HDSPE_CHAN_AIO_PHONE) \
|
||||
|
||||
#define HDSPE_CHAN_RAY_AES (1 << 5)
|
||||
#define HDSPE_CHAN_RAY_SPDIF (1 << 6)
|
||||
#define HDSPE_CHAN_RAY_ADAT1 (1 << 7)
|
||||
#define HDSPE_CHAN_RAY_ADAT2 (1 << 8)
|
||||
#define HDSPE_CHAN_RAY_ADAT3 (1 << 9)
|
||||
#define HDSPE_CHAN_RAY_ADAT4 (1 << 10)
|
||||
#define HDSPE_CHAN_RAY_ALL (HDSPE_CHAN_RAY_AES | \
|
||||
HDSPE_CHAN_RAY_SPDIF | \
|
||||
HDSPE_CHAN_RAY_ADAT1 | \
|
||||
HDSPE_CHAN_RAY_ADAT2 | \
|
||||
HDSPE_CHAN_RAY_ADAT3 | \
|
||||
HDSPE_CHAN_RAY_ADAT4)
|
||||
|
||||
struct hdspe_channel {
|
||||
uint32_t left;
|
||||
uint32_t right;
|
||||
uint32_t ports;
|
||||
char *descr;
|
||||
uint32_t play;
|
||||
uint32_t rec;
|
||||
};
|
||||
|
||||
/* Clock sources */
|
||||
|
|
@ -150,10 +173,11 @@ struct sc_chinfo {
|
|||
struct sc_pcminfo *parent;
|
||||
|
||||
/* Channel information */
|
||||
struct pcmchan_caps *caps;
|
||||
uint32_t cap_fmts[4];
|
||||
uint32_t dir;
|
||||
uint32_t format;
|
||||
uint32_t lslot;
|
||||
uint32_t rslot;
|
||||
uint32_t ports;
|
||||
uint32_t lvol;
|
||||
uint32_t rvol;
|
||||
|
||||
|
|
|
|||
Loading…
Reference in a new issue