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riscv: fix L0 PTE setup (Sv48)

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Per the Privilege Spec, the Accessed (A) or Dirty (D) bits must only be
set for a leaf PTE.

It seems newer versions of QEMU have started to enforce this
requirement, and without this change, pmap_bootstrap() hangs when
switching to Sv48 mode.

Reviewed by:	jrtc27, markj
MFC after:	3 days
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D45210
This commit is contained in:
Mitchell Horne 2024-05-15 14:07:33 -03:00
parent fc59fc3c1f
commit d7adf3b47a
1 changed files with 1 additions and 1 deletions
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2
sys/riscv/riscv/pmap.c
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@ -714,7 +714,7 @@ pmap_bootstrap(vm_offset_t l1pt, vm_paddr_t kernstart, vm_size_t kernlen)
alloc_pages(l0pv, 1);
l0p = (void *)l0pv;
l1pa = pmap_early_vtophys(l1pt, l1pt);
l0p[pmap_l0_index(KERNBASE)] = PTE_V | PTE_A | PTE_D |
l0p[pmap_l0_index(KERNBASE)] = PTE_V |
((l1pa >> PAGE_SHIFT) << PTE_PPN0_S);
l0pa = pmap_early_vtophys(l1pt, l0pv);