mirror of
https://github.com/freebsd/freebsd-src
synced 2024-09-29 21:26:51 +00:00
Converted the TEST_LOPRIO code to default.
removed PEND_INTS 1st try direct call to MPtrylock
This commit is contained in:
Steve Passe
parent
2e6a5b15a9
commit
d1283d9c9d
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=27779
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@ -1,6 +1,6 @@
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/*
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* from: vector.s, 386BSD 0.1 unknown origin
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* $Id: apic_vector.s,v 1.17 1997/07/28 03:51:01 smp Exp smp $
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* $Id: apic_vector.s,v 1.18 1997/07/30 22:46:49 smp Exp smp $
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*/
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@ -20,37 +20,6 @@
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#ifdef PEND_INTS
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#ifdef FIRST_TRY
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#define MAYBE_MASK_IRQ(irq_num) \
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lock ; /* MP-safe */ \
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btsl $(irq_num),iactive ; /* lazy masking */ \
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jnc 8f ; /* NOT active */ \
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7: ; \
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IMASK_LOCK ; /* enter critical reg */\
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orl $IRQ_BIT(irq_num),_apic_imen ; /* set the mask bit */ \
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movl _ioapic,%ecx ; /* ioapic[0] addr */ \
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movl $REDTBL_IDX(irq_num),(%ecx) ; /* write the index */ \
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movl IOAPIC_WINDOW(%ecx),%eax ; /* current value */ \
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orl $IOART_INTMASK,%eax ; /* set the mask */ \
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movl %eax,IOAPIC_WINDOW(%ecx) ; /* new value */ \
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orl $IRQ_BIT(irq_num), _ipending ; /* set _ipending bit */ \
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IMASK_UNLOCK ; /* exit critical reg */ \
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movl $0, lapic_eoi ; /* do the EOI */ \
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popl %es ; \
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popl %ds ; \
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popal ; \
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addl $4+4,%esp ; \
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iret ; \
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; \
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ALIGN_TEXT ; \
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8: ; \
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call _try_mplock ; \
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testl %eax, %eax ; \
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jz 7b /* can't enter kernel */
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#else /** FIRST_TRY */
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/*
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* the 1st version fails because masked edge-triggered INTs are lost
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* by the IO APIC. This version tests to see whether we are handling
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@ -62,7 +31,7 @@
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lock ; /* MP-safe */ \
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btsl $(irq_num),iactive ; /* lazy masking */ \
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jc 6f ; /* already active */ \
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call _try_mplock ; /* try to get lock */ \
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TRY_ISRLOCK(irq_num) ; /* try to get lock */ \
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testl %eax, %eax ; /* did we get it? */ \
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jnz 8f ; /* yes, enter kernel */ \
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6: ; /* active or locked */ \
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@ -88,8 +57,6 @@
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ALIGN_TEXT ; \
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8:
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#endif /** FIRST_TRY */
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#else /* PEND_INTS */
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#define MAYBE_MASK_IRQ(irq_num) \
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@ -154,7 +121,7 @@ IDTVEC(vec_name) ; \
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movl %ax,%ds ; \
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MAYBE_MOVW_AX_ES ; \
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FAKE_MCOUNT((4+ACTUALLY_PUSHED)*4(%esp)) ; \
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GET_MPLOCK ; \
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GET_ISRLOCK(irq_num) ; \
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pushl _intr_unit + (irq_num) * 4 ; \
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call *_intr_handler + (irq_num) * 4 ; /* do the work ASAP */ \
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movl $0, lapic_eoi ; \
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@ -168,7 +135,7 @@ IDTVEC(vec_name) ; \
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jne 2f ; /* yes, maybe handle them */ \
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1: ; \
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MEXITCOUNT ; \
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REL_MPLOCK ; /* SMP release global lock */ \
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REL_ISRLOCK(irq_num) ; \
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MAYBE_POPL_ES ; \
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popl %ds ; \
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popl %edx ; \
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@ -240,7 +207,7 @@ __CONCAT(Xresume,irq_num): ; \
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3: ; \
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/* XXX skip mcounting here to avoid double count */ \
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orl $IRQ_BIT(irq_num), _ipending ; \
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REL_MPLOCK ; /* SMP release global lock */ \
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REL_ISRLOCK(irq_num) ; \
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popl %es ; \
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popl %ds ; \
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popal ; \
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@ -1,6 +1,6 @@
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/*
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* from: vector.s, 386BSD 0.1 unknown origin
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* $Id: apic_vector.s,v 1.17 1997/07/28 03:51:01 smp Exp smp $
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* $Id: apic_vector.s,v 1.18 1997/07/30 22:46:49 smp Exp smp $
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*/
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@ -20,37 +20,6 @@
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#ifdef PEND_INTS
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#ifdef FIRST_TRY
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#define MAYBE_MASK_IRQ(irq_num) \
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lock ; /* MP-safe */ \
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btsl $(irq_num),iactive ; /* lazy masking */ \
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jnc 8f ; /* NOT active */ \
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7: ; \
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IMASK_LOCK ; /* enter critical reg */\
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orl $IRQ_BIT(irq_num),_apic_imen ; /* set the mask bit */ \
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movl _ioapic,%ecx ; /* ioapic[0] addr */ \
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movl $REDTBL_IDX(irq_num),(%ecx) ; /* write the index */ \
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movl IOAPIC_WINDOW(%ecx),%eax ; /* current value */ \
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orl $IOART_INTMASK,%eax ; /* set the mask */ \
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movl %eax,IOAPIC_WINDOW(%ecx) ; /* new value */ \
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orl $IRQ_BIT(irq_num), _ipending ; /* set _ipending bit */ \
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IMASK_UNLOCK ; /* exit critical reg */ \
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movl $0, lapic_eoi ; /* do the EOI */ \
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popl %es ; \
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popl %ds ; \
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popal ; \
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addl $4+4,%esp ; \
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iret ; \
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; \
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ALIGN_TEXT ; \
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8: ; \
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call _try_mplock ; \
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testl %eax, %eax ; \
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jz 7b /* can't enter kernel */
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#else /** FIRST_TRY */
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/*
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* the 1st version fails because masked edge-triggered INTs are lost
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* by the IO APIC. This version tests to see whether we are handling
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@ -62,7 +31,7 @@
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lock ; /* MP-safe */ \
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btsl $(irq_num),iactive ; /* lazy masking */ \
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jc 6f ; /* already active */ \
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call _try_mplock ; /* try to get lock */ \
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TRY_ISRLOCK(irq_num) ; /* try to get lock */ \
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testl %eax, %eax ; /* did we get it? */ \
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jnz 8f ; /* yes, enter kernel */ \
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6: ; /* active or locked */ \
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@ -88,8 +57,6 @@
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ALIGN_TEXT ; \
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8:
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#endif /** FIRST_TRY */
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#else /* PEND_INTS */
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#define MAYBE_MASK_IRQ(irq_num) \
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@ -154,7 +121,7 @@ IDTVEC(vec_name) ; \
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movl %ax,%ds ; \
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MAYBE_MOVW_AX_ES ; \
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FAKE_MCOUNT((4+ACTUALLY_PUSHED)*4(%esp)) ; \
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GET_MPLOCK ; \
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GET_ISRLOCK(irq_num) ; \
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pushl _intr_unit + (irq_num) * 4 ; \
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call *_intr_handler + (irq_num) * 4 ; /* do the work ASAP */ \
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movl $0, lapic_eoi ; \
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@ -168,7 +135,7 @@ IDTVEC(vec_name) ; \
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jne 2f ; /* yes, maybe handle them */ \
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1: ; \
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MEXITCOUNT ; \
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REL_MPLOCK ; /* SMP release global lock */ \
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REL_ISRLOCK(irq_num) ; \
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MAYBE_POPL_ES ; \
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popl %ds ; \
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popl %edx ; \
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@ -240,7 +207,7 @@ __CONCAT(Xresume,irq_num): ; \
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3: ; \
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/* XXX skip mcounting here to avoid double count */ \
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orl $IRQ_BIT(irq_num), _ipending ; \
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REL_MPLOCK ; /* SMP release global lock */ \
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REL_ISRLOCK(irq_num) ; \
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popl %es ; \
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popl %ds ; \
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popal ; \
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@ -1,6 +1,6 @@
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/*
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* from: vector.s, 386BSD 0.1 unknown origin
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* $Id: apic_vector.s,v 1.17 1997/07/28 03:51:01 smp Exp smp $
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* $Id: apic_vector.s,v 1.18 1997/07/30 22:46:49 smp Exp smp $
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*/
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@ -20,37 +20,6 @@
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#ifdef PEND_INTS
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#ifdef FIRST_TRY
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#define MAYBE_MASK_IRQ(irq_num) \
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lock ; /* MP-safe */ \
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btsl $(irq_num),iactive ; /* lazy masking */ \
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jnc 8f ; /* NOT active */ \
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7: ; \
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IMASK_LOCK ; /* enter critical reg */\
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orl $IRQ_BIT(irq_num),_apic_imen ; /* set the mask bit */ \
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movl _ioapic,%ecx ; /* ioapic[0] addr */ \
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movl $REDTBL_IDX(irq_num),(%ecx) ; /* write the index */ \
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movl IOAPIC_WINDOW(%ecx),%eax ; /* current value */ \
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orl $IOART_INTMASK,%eax ; /* set the mask */ \
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movl %eax,IOAPIC_WINDOW(%ecx) ; /* new value */ \
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orl $IRQ_BIT(irq_num), _ipending ; /* set _ipending bit */ \
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IMASK_UNLOCK ; /* exit critical reg */ \
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movl $0, lapic_eoi ; /* do the EOI */ \
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popl %es ; \
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popl %ds ; \
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popal ; \
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addl $4+4,%esp ; \
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iret ; \
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; \
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ALIGN_TEXT ; \
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8: ; \
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call _try_mplock ; \
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testl %eax, %eax ; \
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jz 7b /* can't enter kernel */
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#else /** FIRST_TRY */
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/*
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* the 1st version fails because masked edge-triggered INTs are lost
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* by the IO APIC. This version tests to see whether we are handling
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@ -62,7 +31,7 @@
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lock ; /* MP-safe */ \
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btsl $(irq_num),iactive ; /* lazy masking */ \
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jc 6f ; /* already active */ \
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call _try_mplock ; /* try to get lock */ \
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TRY_ISRLOCK(irq_num) ; /* try to get lock */ \
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testl %eax, %eax ; /* did we get it? */ \
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jnz 8f ; /* yes, enter kernel */ \
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6: ; /* active or locked */ \
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@ -88,8 +57,6 @@
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ALIGN_TEXT ; \
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8:
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#endif /** FIRST_TRY */
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#else /* PEND_INTS */
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#define MAYBE_MASK_IRQ(irq_num) \
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@ -154,7 +121,7 @@ IDTVEC(vec_name) ; \
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movl %ax,%ds ; \
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MAYBE_MOVW_AX_ES ; \
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FAKE_MCOUNT((4+ACTUALLY_PUSHED)*4(%esp)) ; \
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GET_MPLOCK ; \
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GET_ISRLOCK(irq_num) ; \
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pushl _intr_unit + (irq_num) * 4 ; \
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call *_intr_handler + (irq_num) * 4 ; /* do the work ASAP */ \
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movl $0, lapic_eoi ; \
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@ -168,7 +135,7 @@ IDTVEC(vec_name) ; \
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jne 2f ; /* yes, maybe handle them */ \
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1: ; \
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MEXITCOUNT ; \
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REL_MPLOCK ; /* SMP release global lock */ \
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REL_ISRLOCK(irq_num) ; \
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MAYBE_POPL_ES ; \
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popl %ds ; \
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popl %edx ; \
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@ -240,7 +207,7 @@ __CONCAT(Xresume,irq_num): ; \
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3: ; \
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/* XXX skip mcounting here to avoid double count */ \
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orl $IRQ_BIT(irq_num), _ipending ; \
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REL_MPLOCK ; /* SMP release global lock */ \
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REL_ISRLOCK(irq_num) ; \
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popl %es ; \
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popl %ds ; \
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popal ; \
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@ -36,7 +36,7 @@
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*
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* @(#)ipl.s
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*
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* $Id: ipl.s,v 1.2 1997/07/23 18:41:25 smp Exp smp $
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* $Id: ipl.s,v 1.3 1997/07/30 22:46:49 smp Exp smp $
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*/
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@ -120,7 +120,11 @@ doreti_exit:
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movl %eax,_cpl
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decb _intr_nesting_level
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MEXITCOUNT
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#if 0
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REL_MPLOCK
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#else
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REL_ISRLOCK(-1)
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#endif
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.globl doreti_popl_es
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doreti_popl_es:
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popl %es
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