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Introduce explicit break statements in the various chipsets'
foo_pcib_[read|write]_config() functions rather than relying on a break or return being in the CFG macro. This fixes a panic later in the boot process on a UP1000. From inspection, it looks like this fixes a similar problem in the tsunami code. Approved by: dfr
This commit is contained in:
parent
2d47df31fb
commit
cae70b8d4c
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=65297
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@ -140,8 +140,10 @@ apecs_pcib_read_config(device_t dev, int b, int s, int f,
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switch (width) {
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case 1:
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SWIZ_CFGREAD(b, s, f, reg, BYTE, u_int8_t);
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break;
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case 2:
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SWIZ_CFGREAD(b, s, f, reg, WORD, u_int16_t);
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break;
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case 4:
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SWIZ_CFGREAD(b, s, f, reg, LONG, u_int32_t);
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}
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@ -155,8 +157,10 @@ apecs_pcib_write_config(device_t dev, int b, int s, int f,
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switch (width) {
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case 1:
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SWIZ_CFGWRITE(b, s, f, reg, val, BYTE, u_int8_t);
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break;
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case 2:
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SWIZ_CFGWRITE(b, s, f, reg, val, WORD, u_int16_t);
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break;
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case 4:
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SWIZ_CFGWRITE(b, s, f, reg, val, LONG, u_int32_t);
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}
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@ -303,8 +303,10 @@ cia_pcib_swiz_read_config(int b, int s, int f, int reg, int width)
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switch (width) {
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case 1:
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SWIZ_CFGREAD(b, s, f, reg, BYTE, u_int8_t);
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break;
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case 2:
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SWIZ_CFGREAD(b, s, f, reg, WORD, u_int16_t);
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break;
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case 4:
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SWIZ_CFGREAD(b, s, f, reg, LONG, u_int32_t);
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}
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@ -318,8 +320,10 @@ cia_pcib_swiz_write_config(int b, int s, int f, int reg,
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switch (width) {
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case 1:
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SWIZ_CFGWRITE(b, s, f, reg, val, BYTE, u_int8_t);
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break;
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case 2:
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SWIZ_CFGWRITE(b, s, f, reg, val, WORD, u_int16_t);
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break;
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case 4:
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SWIZ_CFGWRITE(b, s, f, reg, val, LONG, u_int32_t);
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}
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@ -331,8 +335,10 @@ cia_pcib_bwx_read_config(int b, int s, int f, int reg, int width)
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switch (width) {
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case 1:
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BWX_CFGREAD(b, s, f, reg, 1, u_int8_t, ldbu);
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break;
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case 2:
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BWX_CFGREAD(b, s, f, reg, 2, u_int16_t, ldwu);
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break;
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case 4:
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BWX_CFGREAD(b, s, f, reg, 4, u_int32_t, ldl);
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}
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@ -346,8 +352,10 @@ cia_pcib_bwx_write_config(int b, int s, int f, int reg,
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switch (width) {
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case 1:
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BWX_CFGWRITE(b, s, f, reg, val, 1, u_int8_t, stb);
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break;
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case 2:
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BWX_CFGWRITE(b, s, f, reg, val, 2, u_int16_t, stw);
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break;
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case 4:
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BWX_CFGWRITE(b, s, f, reg, val, 4, u_int32_t, stl);
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}
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@ -153,8 +153,10 @@ irongate_pcib_read_config(device_t dev, int b, int s, int f,
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switch (width) {
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case 1:
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CFGREAD(b, s, f, reg, 1, u_int8_t, ldbu);
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break;
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case 2:
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CFGREAD(b, s, f, reg, 2, u_int16_t, ldwu);
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break;
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case 4:
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CFGREAD(b, s, f, reg, 4, u_int32_t, ldl);
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}
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@ -168,8 +170,10 @@ irongate_pcib_write_config(device_t dev, int b, int s, int f,
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switch (width) {
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case 1:
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CFGWRITE(b, s, f, reg, val, 1, stb);
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break;
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case 2:
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CFGWRITE(b, s, f, reg, val, 2, stw);
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break;
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case 4:
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CFGWRITE(b, s, f, reg, val, 4, stl);
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}
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@ -136,8 +136,10 @@ lca_pcib_read_config(device_t dev, int b, int s, int f,
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switch (width) {
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case 1:
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CFGREAD(b, s, f, reg, BYTE, u_int8_t);
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break;
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case 2:
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CFGREAD(b, s, f, reg, WORD, u_int16_t);
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break;
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case 4:
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CFGREAD(b, s, f, reg, LONG, u_int32_t);
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}
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@ -151,8 +153,10 @@ lca_pcib_write_config(device_t dev, int b, int s, int f,
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switch (width) {
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case 1:
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CFGWRITE(b, s, f, reg, val, BYTE, u_int8_t);
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break;
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case 2:
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CFGWRITE(b, s, f, reg, val, WORD, u_int16_t);
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break;
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case 4:
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CFGWRITE(b, s, f, reg, val, LONG, u_int32_t);
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}
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@ -142,8 +142,10 @@ t2_pcib_read_config(device_t dev, int b, int s, int f,
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switch (width) {
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case 1:
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SWIZ_CFGREAD(b, s, f, reg, BYTE, u_int8_t);
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break;
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case 2:
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SWIZ_CFGREAD(b, s, f, reg, WORD, u_int16_t);
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break;
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case 4:
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SWIZ_CFGREAD(b, s, f, reg, LONG, u_int32_t);
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}
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@ -157,8 +159,10 @@ t2_pcib_write_config(device_t dev, int b, int s, int f,
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switch (width) {
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case 1:
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SWIZ_CFGWRITE(b, s, f, reg, val, BYTE, u_int8_t);
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break;
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case 2:
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SWIZ_CFGWRITE(b, s, f, reg, val, WORD, u_int16_t);
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break;
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case 4:
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SWIZ_CFGWRITE(b, s, f, reg, val, LONG, u_int32_t);
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}
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@ -224,8 +224,10 @@ tsunami_pcib_read_config(device_t dev, int b, int s, int f,
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switch (width) {
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case 1:
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CFGREAD(h, b, s, f, reg, ldbu, 1, u_int8_t);
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break;
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case 2:
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CFGREAD(h, b, s, f, reg, ldwu, 2, u_int16_t);
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break;
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case 4:
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CFGREAD(h, b, s, f, reg, ldl, 4, u_int32_t);
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}
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@ -240,8 +242,10 @@ tsunami_pcib_write_config(device_t dev, int b, int s, int f,
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switch (width) {
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case 1:
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CFGWRITE(h, b, s, f, reg, val, stb, 1);
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break;
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case 2:
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CFGWRITE(h, b, s, f, reg, val, stw, 2);
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break;
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case 4:
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CFGWRITE(h, b, s, f, reg, val, stl, 4);
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}
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