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Whitespace fixes for sys/mips/nlm/dev
Clean up whitespace issues under sys/mips/nlm/dev. No functional change in this commit.
This commit is contained in:
Jayachandran C.
parent
72e64728c9
commit
c483877531
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=279388
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@ -12,7 +12,7 @@
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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*
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*
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* THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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@ -48,14 +48,14 @@ nlm_int_gmac_mdio_read(uint64_t nae_base, int bus, int block,
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uint32_t mdio_ld_cmd;
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uint32_t ctrlval;
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ctrlval = INT_MDIO_CTRL_SMP |
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ctrlval = INT_MDIO_CTRL_SMP |
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(phyaddr << INT_MDIO_CTRL_PHYADDR_POS) |
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(regidx << INT_MDIO_CTRL_DEVTYPE_POS) |
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(2 << INT_MDIO_CTRL_OP_POS) |
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(1 << INT_MDIO_CTRL_ST_POS) |
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(7 << INT_MDIO_CTRL_XDIV_POS) |
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(7 << INT_MDIO_CTRL_XDIV_POS) |
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(2 << INT_MDIO_CTRL_TA_POS) |
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(2 << INT_MDIO_CTRL_MIIM_POS) |
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(2 << INT_MDIO_CTRL_MIIM_POS) |
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(1 << INT_MDIO_CTRL_MCDIV_POS);
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mdio_ld_cmd = nlm_read_nae_reg(nae_base,
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@ -148,16 +148,16 @@ nlm_int_gmac_mdio_reset(uint64_t nae_base, int bus, int block,
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{
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uint32_t val;
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val = (7 << INT_MDIO_CTRL_XDIV_POS) |
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val = (7 << INT_MDIO_CTRL_XDIV_POS) |
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(1 << INT_MDIO_CTRL_MCDIV_POS) |
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(INT_MDIO_CTRL_SMP);
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nlm_write_nae_reg(nae_base,
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NAE_REG(block, intf_type, (INT_MDIO_CTRL + bus * 4)),
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NAE_REG(block, intf_type, (INT_MDIO_CTRL + bus * 4)),
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val | INT_MDIO_CTRL_RST);
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nlm_write_nae_reg(nae_base,
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NAE_REG(block, intf_type, (INT_MDIO_CTRL + bus * 4)),
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NAE_REG(block, intf_type, (INT_MDIO_CTRL + bus * 4)),
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val);
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return (0);
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@ -185,7 +185,7 @@ nlm_gmac_mdio_read(uint64_t nae_base, int bus, int block,
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(EXT_G0_MDIO_CTRL + bus * 4)));
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if (mdio_ld_cmd & EXT_G_MDIO_CMD_LCD) {
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nlm_write_nae_reg(nae_base,
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NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL+bus*4)),
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NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL+bus*4)),
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(mdio_ld_cmd & ~EXT_G_MDIO_CMD_LCD));
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while(nlm_read_nae_reg(nae_base,
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NAE_REG(block, intf_type,
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@ -197,16 +197,16 @@ nlm_gmac_mdio_read(uint64_t nae_base, int bus, int block,
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(phyaddr << EXT_G_MDIO_PHYADDR_POS) |
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(regidx << EXT_G_MDIO_REGADDR_POS);
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if (nlm_is_xlp8xx_ax() || nlm_is_xlp8xx_b0() || nlm_is_xlp3xx_ax())
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ctrlval |= EXT_G_MDIO_DIV;
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ctrlval |= EXT_G_MDIO_DIV;
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else
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ctrlval |= EXT_G_MDIO_DIV_WITH_HW_DIV64;
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nlm_write_nae_reg(nae_base,
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NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL+bus*4)),
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nlm_write_nae_reg(nae_base,
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NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL+bus*4)),
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ctrlval);
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nlm_write_nae_reg(nae_base,
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NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL+bus*4)),
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NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL+bus*4)),
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ctrlval | (1<<18));
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DELAY(1000);
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/* poll master busy bit until it is not busy */
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@ -215,7 +215,7 @@ nlm_gmac_mdio_read(uint64_t nae_base, int bus, int block,
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EXT_G_MDIO_STAT_MBSY);
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nlm_write_nae_reg(nae_base,
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NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL+bus*4)),
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NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL+bus*4)),
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ctrlval);
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/* Read the data back */
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@ -246,7 +246,7 @@ nlm_gmac_mdio_write(uint64_t nae_base, int bus, int block,
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(EXT_G0_MDIO_CTRL + bus * 4)));
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if (mdio_ld_cmd & EXT_G_MDIO_CMD_LCD) {
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nlm_write_nae_reg(nae_base,
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NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL+bus*4)),
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NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL+bus*4)),
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(mdio_ld_cmd & ~EXT_G_MDIO_CMD_LCD));
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while(nlm_read_nae_reg(nae_base,
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NAE_REG(block, intf_type,
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@ -256,23 +256,23 @@ nlm_gmac_mdio_write(uint64_t nae_base, int bus, int block,
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/* load data into ctrl data reg */
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nlm_write_nae_reg(nae_base,
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NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL_DATA+bus*4)),
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NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL_DATA+bus*4)),
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val);
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ctrlval = EXT_G_MDIO_CMD_SP |
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(phyaddr << EXT_G_MDIO_PHYADDR_POS) |
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(regidx << EXT_G_MDIO_REGADDR_POS);
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if (nlm_is_xlp8xx_ax() || nlm_is_xlp8xx_b0() || nlm_is_xlp3xx_ax())
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ctrlval |= EXT_G_MDIO_DIV;
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ctrlval |= EXT_G_MDIO_DIV;
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else
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ctrlval |= EXT_G_MDIO_DIV_WITH_HW_DIV64;
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nlm_write_nae_reg(nae_base,
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NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL+bus*4)),
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NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL+bus*4)),
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ctrlval);
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nlm_write_nae_reg(nae_base,
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NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL+bus*4)),
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NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL+bus*4)),
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ctrlval | EXT_G_MDIO_CMD_LCD);
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DELAY(1000);
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@ -282,7 +282,7 @@ nlm_gmac_mdio_write(uint64_t nae_base, int bus, int block,
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(EXT_G0_MDIO_RD_STAT + bus * 4))) & EXT_G_MDIO_STAT_MBSY);
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nlm_write_nae_reg(nae_base,
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NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL+bus*4)),
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NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL+bus*4)),
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ctrlval);
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return (0);
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@ -312,7 +312,7 @@ nlm_gmac_mdio_reset(uint64_t nae_base, int bus, int block,
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ctrlval |= EXT_G_MDIO_DIV_WITH_HW_DIV64;
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nlm_write_nae_reg(nae_base,
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NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL + bus * 4)),
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NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL + bus * 4)),
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EXT_G_MDIO_MMRST | ctrlval);
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nlm_write_nae_reg(nae_base,
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NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL + bus * 4)), ctrlval);
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@ -12,7 +12,7 @@
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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*
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*
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* THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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@ -419,7 +419,7 @@ xlp_ax_nae_lane_reset_txpll(uint64_t nae_base, int block, int lane_ctrl,
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| val );
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while (((val = nlm_read_nae_reg(nae_base,
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NAE_REG(block, PHY, lane_ctrl))) &
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NAE_REG(block, PHY, lane_ctrl))) &
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PHY_LANE_CTRL_CMD_PENDING));
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val &= 0xFF;
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@ -447,7 +447,7 @@ xlp_ax_nae_lane_reset_txpll(uint64_t nae_base, int block, int lane_ctrl,
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| val );
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while (!((val = nlm_read_nae_reg(nae_base,
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NAE_REG(block, PHY, (lane_ctrl - PHY_LANE_0_CTRL)))) &
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NAE_REG(block, PHY, (lane_ctrl - PHY_LANE_0_CTRL)))) &
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PHY_LANE_STAT_PCR));
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/* Clear the Power Down bit */
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@ -585,8 +585,8 @@ config_egress_fifo_carvings(uint64_t nae_base, int hwport, int start_ctxt,
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offset = size;
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if (offset > cfg[hwport].max_stg2_offset)
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offset = cfg[hwport].max_stg2_offset;
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data = offset << 23 |
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start << 11 |
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data = offset << 23 |
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start << 11 |
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i << 1 |
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1;
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nlm_write_nae_reg(nae_base, NAE_STG2_PMEM_PROG, data);
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@ -595,7 +595,7 @@ config_egress_fifo_carvings(uint64_t nae_base, int hwport, int start_ctxt,
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cur_start[0] = start;
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/* EH FIFO */
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start = cur_start[1];
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start = cur_start[1];
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for (i = start_ctxt; i < limit; i++) {
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size = cfg[hwport].eh_fifo_size / max_ctxts;
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if (size)
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@ -604,7 +604,7 @@ config_egress_fifo_carvings(uint64_t nae_base, int hwport, int start_ctxt,
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offset = size ;
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if (offset > cfg[hwport].max_eh_offset)
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offset = cfg[hwport].max_eh_offset;
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data = offset << 23 |
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data = offset << 23 |
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start << 11 |
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i << 1 |
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1;
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@ -614,7 +614,7 @@ config_egress_fifo_carvings(uint64_t nae_base, int hwport, int start_ctxt,
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cur_start[1] = start;
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/* FROUT FIFO */
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start = cur_start[2];
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start = cur_start[2];
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for (i = start_ctxt; i < limit; i++) {
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size = cfg[hwport].frout_fifo_size / max_ctxts;
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if (size)
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@ -623,8 +623,8 @@ config_egress_fifo_carvings(uint64_t nae_base, int hwport, int start_ctxt,
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offset = size ;
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if (offset > cfg[hwport].max_frout_offset)
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offset = cfg[hwport].max_frout_offset;
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data = offset << 23 |
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start << 11 |
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data = offset << 23 |
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start << 11 |
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i << 1 |
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1;
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nlm_write_nae_reg(nae_base, NAE_FREE_PMEM_PROG, data);
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@ -633,7 +633,7 @@ config_egress_fifo_carvings(uint64_t nae_base, int hwport, int start_ctxt,
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cur_start[2] = start;
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/* MS FIFO */
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start = cur_start[3];
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start = cur_start[3];
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for (i = start_ctxt; i < limit; i++) {
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size = cfg[hwport].ms_fifo_size / max_ctxts;
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if (size)
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@ -643,7 +643,7 @@ config_egress_fifo_carvings(uint64_t nae_base, int hwport, int start_ctxt,
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if (offset > cfg[hwport].max_ms_offset)
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offset = cfg[hwport].max_ms_offset;
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data = offset << 22 | /* FIXME in PRM */
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start << 11 |
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start << 11 |
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i << 1 |
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1;
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nlm_write_nae_reg(nae_base, NAE_STR_PMEM_CMD, data);
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@ -652,7 +652,7 @@ config_egress_fifo_carvings(uint64_t nae_base, int hwport, int start_ctxt,
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cur_start[3] = start;
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/* PKT FIFO */
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start = cur_start[4];
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start = cur_start[4];
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for (i = start_ctxt; i < limit; i++) {
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size = cfg[hwport].pkt_fifo_size / max_ctxts;
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if (size)
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@ -663,7 +663,7 @@ config_egress_fifo_carvings(uint64_t nae_base, int hwport, int start_ctxt,
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offset = cfg[hwport].max_pmem_offset;
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nlm_write_nae_reg(nae_base, NAE_TX_PKT_PMEM_CMD1, offset);
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data = start << 11 |
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data = start << 11 |
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i << 1 |
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1;
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nlm_write_nae_reg(nae_base, NAE_TX_PKT_PMEM_CMD0, data);
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@ -672,15 +672,15 @@ config_egress_fifo_carvings(uint64_t nae_base, int hwport, int start_ctxt,
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cur_start[4] = start;
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/* PKT LEN FIFO */
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start = cur_start[5];
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start = cur_start[5];
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for (i = start_ctxt; i < limit; i++) {
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size = cfg[hwport].pktlen_fifo_size / max_ctxts;
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if (size)
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offset = size - 1;
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else
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offset = size ;
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data = offset << 22 |
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start << 11 |
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data = offset << 22 |
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start << 11 |
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i << 1 |
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1;
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nlm_write_nae_reg(nae_base, NAE_TX_PKTLEN_PMEM_CMD, data);
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@ -703,7 +703,7 @@ config_egress_fifo_credits(uint64_t nae_base, int hwport, int start_ctxt,
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credit = cfg[hwport].stg1_2_credit / max_ctxts;
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if (credit > max_credit)
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credit = max_credit;
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data = credit << 16 |
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data = credit << 16 |
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i << 4 |
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1;
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nlm_write_nae_reg(nae_base, NAE_STG1_STG2CRDT_CMD, data);
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@ -715,7 +715,7 @@ config_egress_fifo_credits(uint64_t nae_base, int hwport, int start_ctxt,
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credit = cfg[hwport].stg2_eh_credit / max_ctxts;
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if (credit > max_credit)
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credit = max_credit;
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data = credit << 16 |
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data = credit << 16 |
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i << 4 |
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1;
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nlm_write_nae_reg(nae_base, NAE_STG2_EHCRDT_CMD, data);
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@ -727,7 +727,7 @@ config_egress_fifo_credits(uint64_t nae_base, int hwport, int start_ctxt,
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credit = cfg[hwport].stg2_frout_credit / max_ctxts;
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if (credit > max_credit)
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credit = max_credit;
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data = credit << 16 |
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data = credit << 16 |
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i << 4 |
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1;
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nlm_write_nae_reg(nae_base, NAE_EH_FREECRDT_CMD, data);
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@ -739,7 +739,7 @@ config_egress_fifo_credits(uint64_t nae_base, int hwport, int start_ctxt,
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credit = cfg[hwport].stg2_ms_credit / max_ctxts;
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if (credit > max_credit)
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credit = max_credit;
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data = credit << 16 |
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data = credit << 16 |
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i << 4 |
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1;
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nlm_write_nae_reg(nae_base, NAE_STG2_STRCRDT_CMD, data);
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@ -970,12 +970,12 @@ nlm_enable_hardware_parser(uint64_t nae_base)
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val |= (1 << 12); /* hardware parser enable */
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nlm_write_nae_reg(nae_base, NAE_RX_CONFIG, val);
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/***********************************************
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/***********************************************
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* program L3 CAM table
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***********************************************/
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/*
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* entry-0 is ipv4 MPLS type 1 label
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* entry-0 is ipv4 MPLS type 1 label
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*/
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/* l3hdroff = 4 bytes, ether_type = 0x8847 for MPLS_type1 */
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nlm_setup_l3ctable_even(nae_base, 0, 4, 1, 9, 1, 0x8847);
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@ -1018,11 +1018,11 @@ nlm_enable_hardware_parser(uint64_t nae_base)
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nlm_setup_l3ctable_even(nae_base, 4, 0, 0, 9, 1, 0x8906);
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/* FCoE packet consists of 4 byte start-of-frame,
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* and 24 bytes of frame header, followed by
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* 64 bytes of optional-header (ESP, network..),
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* 64 bytes of optional-header (ESP, network..),
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* 2048 bytes of payload, 36 bytes of optional
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* "fill bytes" or ESP trailer, 4 bytes of CRC,
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* and 4 bytes of end-of-frame
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* We extract the first 4 + 24 = 28 bytes
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* We extract the first 4 + 24 = 28 bytes
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*/
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nlm_setup_l3ctable_odd(nae_base, 4, 0, 28, 0, 0, 0, 0);
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@ -1116,7 +1116,7 @@ nlm_enable_hardware_parser(uint64_t nae_base)
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/* We extract 31 bytes from packet start */
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nlm_setup_l3ctable_odd(nae_base, 15, 0, 31, 0, 0, 0, 0);
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/***********************************************
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/***********************************************
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* program L4 CAM table
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***********************************************/
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@ -1124,7 +1124,7 @@ nlm_enable_hardware_parser(uint64_t nae_base)
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* entry-0 - tcp packets (0x6)
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*/
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nlm_setup_l4ctable_even(nae_base, 0, 0, 0, 1, 0, 0, 0x6);
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/* tcp header is 20 bytes without tcp options
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/* tcp header is 20 bytes without tcp options
|
||||
* We extract 20 bytes from tcp start */
|
||||
nlm_setup_l4ctable_odd(nae_base, 0, 0, 15, 15, 5);
|
||||
|
||||
|
|
@ -1149,7 +1149,7 @@ nlm_enable_hardware_parser(uint64_t nae_base)
|
|||
* entry-3 - RDP packets (0x1b)
|
||||
*/
|
||||
nlm_setup_l4ctable_even(nae_base, 3, 0, 0, 1, 0, 0, 0x1b);
|
||||
/* RDP packets have 18 bytes of generic header
|
||||
/* RDP packets have 18 bytes of generic header
|
||||
* before variable header starts.
|
||||
* We extract 18 bytes from rdp start */
|
||||
nlm_setup_l4ctable_odd(nae_base, 3, 0, 15, 15, 3);
|
||||
|
|
@ -1407,7 +1407,7 @@ nlm_nae_open_if(uint64_t nae_base, int nblock, int port_type,
|
|||
|
||||
/* default to 1G */
|
||||
nlm_write_nae_reg(nae_base,
|
||||
conf2_reg,
|
||||
conf2_reg,
|
||||
(0x7 << 12) | /* interface preamble length */
|
||||
(0x2 << 8) | /* interface mode */
|
||||
(0x1 << 2) | /* pad crc enable */
|
||||
|
|
@ -1444,7 +1444,7 @@ nlm_nae_open_if(uint64_t nae_base, int nblock, int port_type,
|
|||
mac_cfg1 = nlm_read_nae_reg(nae_base, conf1_reg);
|
||||
nlm_write_nae_reg(nae_base, conf1_reg,
|
||||
mac_cfg1 | (0x3 << 4));
|
||||
break;
|
||||
break;
|
||||
}
|
||||
|
||||
nlm_nae_init_ingress(nae_base, desc_size);
|
||||
|
|
|
|||
|
|
@ -12,7 +12,7 @@
|
|||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
*
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
|
|
|
|||
|
|
@ -12,7 +12,7 @@
|
|||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
*
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
|
|
@ -37,7 +37,7 @@
|
|||
_start:
|
||||
.set noreorder
|
||||
la gp, _gp
|
||||
.end _start
|
||||
.end _start
|
||||
|
||||
.globl __stack
|
||||
|
||||
|
|
|
|||
|
|
@ -12,7 +12,7 @@
|
|||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
*
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
|
|
@ -96,7 +96,7 @@ SECTIONS
|
|||
|
||||
/* ----------------------------------------- */
|
||||
|
||||
. = 0x18000 ;
|
||||
. = 0x18000 ;
|
||||
shmemstart = . ;
|
||||
.sharedmem : {
|
||||
*(.sharedmem)
|
||||
|
|
@ -145,10 +145,10 @@ SECTIONS
|
|||
|
||||
PROVIDE(__stackmarker = .) ;
|
||||
|
||||
. = 0xFFA00 ;
|
||||
. = 0xFFA00 ;
|
||||
|
||||
/* 32 + 4(argc) + 4(argv), aligned to 64 */
|
||||
PROVIDE(__stack = . - 64);
|
||||
PROVIDE(__stack = . - 64);
|
||||
|
||||
/* ----------------------------------------- */
|
||||
|
||||
|
|
|
|||
|
|
@ -12,7 +12,7 @@
|
|||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
*
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
|
|
@ -118,10 +118,10 @@ NLM_DEFINE_UCORE(pktdistr, UCORE_PKT_DISTR);
|
|||
* fsv - 0 : use interface-id for selecting the free fifo pool
|
||||
* 1 : use free fifo pool selected by FFS field
|
||||
* ffs - selects which free fifo pool to use to take a free fifo
|
||||
* prepad_en - If this field is set to 1, part or all of the
|
||||
* prepad_en - If this field is set to 1, part or all of the
|
||||
* 64 byte prepad seen by micro engines, is written
|
||||
* infront of every packet.
|
||||
* prepad_ovride - If this field is 1, the ucore system uses
|
||||
* prepad_ovride - If this field is 1, the ucore system uses
|
||||
* prepad configuration defined in this register,
|
||||
* 0 means that it uses the configuration defined
|
||||
* in NAE RX_CONFIG register
|
||||
|
|
@ -167,7 +167,7 @@ nlm_ucore_pkt_done(int l3cachelines, int fsv, int ffs, int prepad_en,
|
|||
nlm_write_ucore_obufdone(val);
|
||||
}
|
||||
|
||||
/* Get the class full vector field from POE.
|
||||
/* Get the class full vector field from POE.
|
||||
* The POE maintains a threshold for each class.
|
||||
* A bit in this field will be set corresponding to the class approaching
|
||||
* class full status.
|
||||
|
|
@ -188,7 +188,7 @@ nlm_ucore_get_rxpkt_hwparsererr(unsigned int pktrdy)
|
|||
}
|
||||
|
||||
/* This function returns the context number assigned to incoming
|
||||
* packet
|
||||
* packet
|
||||
*/
|
||||
static __inline__ int
|
||||
nlm_ucore_get_rxpkt_context(unsigned int pktrdy)
|
||||
|
|
@ -214,8 +214,8 @@ nlm_ucore_get_rxpkt_interface(unsigned int pktrdy)
|
|||
return (pktrdy & 0x1f);
|
||||
}
|
||||
|
||||
/* This function returns 1 if end of packet (EOP) is set in
|
||||
* packet data.
|
||||
/* This function returns 1 if end of packet (EOP) is set in
|
||||
* packet data.
|
||||
*/
|
||||
static __inline__ int
|
||||
nlm_ucore_get_rxpkt_eop(unsigned int rxpkt_info)
|
||||
|
|
@ -256,7 +256,7 @@ nlm_ucore_get_cam_result(unsigned int cam_result)
|
|||
/* This function sets up the csum in ucore.
|
||||
* iphdr_start - defines the start of ip header (to check - is this byte
|
||||
* position???)
|
||||
* iphdr_len - This field is auto filled by h/w parser if zero, else
|
||||
* iphdr_len - This field is auto filled by h/w parser if zero, else
|
||||
* the value defined will be used.
|
||||
*/
|
||||
static __inline__ void
|
||||
|
|
@ -270,7 +270,7 @@ nlm_ucore_csum_setup(int iphdr_start, int iphdr_len)
|
|||
}
|
||||
|
||||
/* crcpos - position of crc in pkt. If crc position is within startcrc and
|
||||
* endcrc, zero out these bytes in the packet before computing crc. This
|
||||
* endcrc, zero out these bytes in the packet before computing crc. This
|
||||
* field is not needed for FCoE.
|
||||
* cps - If 1, uses the polynomial in RX_CRC_POLY1 of NAE register.
|
||||
* if 0, uses the polynomial in RX_CRC_POLY0 of NAE register.
|
||||
|
|
@ -281,7 +281,7 @@ nlm_ucore_csum_setup(int iphdr_start, int iphdr_len)
|
|||
* cfi - If 1, performs a final inversion of crc before comarison is done during
|
||||
* pkt reception.
|
||||
* startcrc - This field is always required for both FCoE and SCTP crc.
|
||||
* endcrc - This information needs to be setup only for SCTP. For FCoE this
|
||||
* endcrc - This information needs to be setup only for SCTP. For FCoE this
|
||||
* information is provided by hardware.
|
||||
* valid - if set to 1, CRC status is placed into bit 2 of rx descriptor
|
||||
* if set to 0, TCP checksum status is placed into bit 2 of rx descriptor
|
||||
|
|
@ -310,7 +310,7 @@ nlm_ucore_crc_setup(int crcpos, int cps, int cfi, int cbm, int fcoe,
|
|||
nlm_write_ucore_crcinfo(val);
|
||||
}
|
||||
|
||||
/* This function returns a fifo empty vector, where each bit provides
|
||||
/* This function returns a fifo empty vector, where each bit provides
|
||||
* the status of a fifo pool, where if the pool is empty the bit gets
|
||||
* set to 1.
|
||||
*/
|
||||
|
|
@ -333,7 +333,7 @@ nlm_ucore_get_fifoempty(unsigned int fifoempty)
|
|||
* from context->class_table
|
||||
* pdl - poe distribution list
|
||||
* dest - fixed destination setup
|
||||
* hash - if 1, use hash based destination
|
||||
* hash - if 1, use hash based destination
|
||||
*/
|
||||
static __inline__ void
|
||||
nlm_ucore_setup_poepktdistr(int pdm, int mc3, int pdl, int dest, int hash)
|
||||
|
|
|
|||
|
|
@ -12,7 +12,7 @@
|
|||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
*
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
|
|
@ -32,11 +32,6 @@
|
|||
|
||||
int main(void)
|
||||
{
|
||||
#if 0
|
||||
volatile unsigned int *pkt =
|
||||
(volatile unsigned int *) (PACKET_MEMORY + PACKET_DATA_OFFSET);
|
||||
int intf, hw_parser_error, context;
|
||||
#endif
|
||||
unsigned int pktrdy;
|
||||
int num_cachelines = 1518 / 64 ; /* pktsize / L3 cacheline size */
|
||||
|
||||
|
|
@ -44,11 +39,6 @@ int main(void)
|
|||
/* Spray packets to using distribution vector */
|
||||
while (1) {
|
||||
pktrdy = nlm_read_ucore_rxpktrdy();
|
||||
#if 0
|
||||
intf = pktrdy & 0x1f;
|
||||
context = (pktrdy >> 13) & 0x3ff;
|
||||
hw_parser_error = (pktrdy >> 23) & 0x1;
|
||||
#endif
|
||||
nlm_ucore_setup_poepktdistr(FWD_DIST_VEC, 0, 0, 0, 0);
|
||||
nlm_ucore_pkt_done(num_cachelines, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0);
|
||||
|
|
|
|||
|
|
@ -12,7 +12,7 @@
|
|||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
*
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
|
|
|
|||
|
|
@ -12,7 +12,7 @@
|
|||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
*
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
|
|
@ -108,7 +108,7 @@ __FBSDID("$FreeBSD$");
|
|||
static struct nae_port_config nae_port_config[64];
|
||||
|
||||
int poe_cl_tbl[MAX_POE_CLASSES] = {
|
||||
0x0, 0x249249,
|
||||
0x0, 0x249249,
|
||||
0x492492, 0x6db6db,
|
||||
0x924924, 0xb6db6d,
|
||||
0xdb6db6, 0xffffff
|
||||
|
|
@ -116,7 +116,7 @@ int poe_cl_tbl[MAX_POE_CLASSES] = {
|
|||
|
||||
/* #define DUMP_PACKET */
|
||||
|
||||
static uint64_t
|
||||
static uint64_t
|
||||
nlm_paddr_ld(uint64_t paddr)
|
||||
{
|
||||
uint64_t xkaddr = 0x9800000000000000 | paddr;
|
||||
|
|
@ -189,7 +189,7 @@ static device_method_t nlm_xlpge_methods[] = {
|
|||
DEVMETHOD(device_resume, nlm_xlpge_resume),
|
||||
DEVMETHOD(device_shutdown, nlm_xlpge_shutdown),
|
||||
|
||||
/* Methods from the nexus bus needed for explicitly
|
||||
/* Methods from the nexus bus needed for explicitly
|
||||
* probing children when driver is loaded as a kernel module
|
||||
*/
|
||||
DEVMETHOD(miibus_readreg, nlm_xlpge_mii_read),
|
||||
|
|
@ -240,7 +240,7 @@ atomic_incr_long(unsigned long *addr)
|
|||
/*
|
||||
* xlpnae driver implementation
|
||||
*/
|
||||
static int
|
||||
static int
|
||||
nlm_xlpnae_probe(device_t dev)
|
||||
{
|
||||
if (pci_get_vendor(dev) != PCI_VENDOR_NETLOGIC ||
|
||||
|
|
@ -539,7 +539,7 @@ nlm_setup_portcfg(struct nlm_xlpnae_softc *sc, struct xlp_nae_ivars *naep,
|
|||
sc->total_num_ports++;
|
||||
}
|
||||
|
||||
static int
|
||||
static int
|
||||
nlm_xlpnae_attach(device_t dev)
|
||||
{
|
||||
struct xlp_nae_ivars *nae_ivars;
|
||||
|
|
@ -566,14 +566,14 @@ nlm_xlpnae_attach(device_t dev)
|
|||
sc->sgmiimask = nae_ivars->sgmiimask;
|
||||
sc->nblocks = nae_ivars->nblocks;
|
||||
sc->freq = nae_ivars->freq;
|
||||
|
||||
/* flow table generation is done by CRC16 polynomial */
|
||||
sc->flow_crc_poly = nae_ivars->flow_crc_poly;
|
||||
|
||||
sc->hw_parser_en = nae_ivars->hw_parser_en;
|
||||
sc->prepad_en = nae_ivars->prepad_en;
|
||||
sc->prepad_size = nae_ivars->prepad_size;
|
||||
sc->ieee_1588_en = nae_ivars->ieee_1588_en;
|
||||
/* flow table generation is done by CRC16 polynomial */
|
||||
sc->flow_crc_poly = nae_ivars->flow_crc_poly;
|
||||
|
||||
sc->hw_parser_en = nae_ivars->hw_parser_en;
|
||||
sc->prepad_en = nae_ivars->prepad_en;
|
||||
sc->prepad_size = nae_ivars->prepad_size;
|
||||
sc->ieee_1588_en = nae_ivars->ieee_1588_en;
|
||||
|
||||
nae_pcibase = nlm_get_nae_pcibase(sc->node);
|
||||
sc->ncontexts = nlm_read_reg(nae_pcibase, XLP_PCI_DEVINFO_REG5);
|
||||
|
|
@ -692,26 +692,26 @@ nlm_xlpnae_attach(device_t dev)
|
|||
return (0);
|
||||
}
|
||||
|
||||
static int
|
||||
static int
|
||||
nlm_xlpnae_detach(device_t dev)
|
||||
{
|
||||
/* TODO - free zone here */
|
||||
return (0);
|
||||
}
|
||||
|
||||
static int
|
||||
static int
|
||||
nlm_xlpnae_suspend(device_t dev)
|
||||
{
|
||||
return (0);
|
||||
}
|
||||
|
||||
static int
|
||||
static int
|
||||
nlm_xlpnae_resume(device_t dev)
|
||||
{
|
||||
return (0);
|
||||
}
|
||||
|
||||
static int
|
||||
static int
|
||||
nlm_xlpnae_shutdown(device_t dev)
|
||||
{
|
||||
return (0);
|
||||
|
|
@ -745,13 +745,13 @@ nlm_xlpge_mac_set_rx_mode(struct nlm_xlpge_softc *sc)
|
|||
}
|
||||
}
|
||||
|
||||
static int
|
||||
static int
|
||||
nlm_xlpge_ioctl(struct ifnet *ifp, u_long command, caddr_t data)
|
||||
{
|
||||
struct mii_data *mii;
|
||||
struct nlm_xlpge_softc *sc;
|
||||
struct ifreq *ifr;
|
||||
int error;
|
||||
int error;
|
||||
|
||||
sc = ifp->if_softc;
|
||||
error = 0;
|
||||
|
|
@ -819,7 +819,7 @@ xlpge_tx(struct ifnet *ifp, struct mbuf *mbuf_chain)
|
|||
xlp_handle_msg_vc(1 << XLPGE_FB_VC, 2);
|
||||
|
||||
/* vfb id table is setup to map cpu to vc 3 of the cpu */
|
||||
fbid = nlm_cpuid();
|
||||
fbid = nlm_cpuid();
|
||||
dst = sc->txq;
|
||||
|
||||
pos = 0;
|
||||
|
|
@ -943,7 +943,7 @@ nlm_mii_pollstat(void *arg)
|
|||
|
||||
mii_pollstat(mii);
|
||||
|
||||
callout_reset(&sc->xlpge_callout, hz,
|
||||
callout_reset(&sc->xlpge_callout, hz,
|
||||
nlm_mii_pollstat, sc);
|
||||
}
|
||||
}
|
||||
|
|
@ -1033,7 +1033,7 @@ xlpge_mediastatus(struct ifnet *ifp, struct ifmediareq *ifmr)
|
|||
ifmr->ifm_status |= IFM_ACTIVE;
|
||||
}
|
||||
|
||||
static int
|
||||
static int
|
||||
nlm_xlpge_ifinit(struct nlm_xlpge_softc *sc)
|
||||
{
|
||||
struct ifnet *ifp;
|
||||
|
|
@ -1079,7 +1079,7 @@ nlm_xlpge_ifinit(struct nlm_xlpge_softc *sc)
|
|||
return (0);
|
||||
}
|
||||
|
||||
static int
|
||||
static int
|
||||
nlm_xlpge_probe(device_t dev)
|
||||
{
|
||||
return (BUS_PROBE_DEFAULT);
|
||||
|
|
@ -1159,7 +1159,7 @@ nlm_xlpge_setup_stats_sysctl(device_t dev, struct nlm_xlpge_softc *sc)
|
|||
child = SYSCTL_CHILDREN(tree);
|
||||
|
||||
#define XLPGE_STAT(name, offset, desc) \
|
||||
SYSCTL_ADD_PROC(ctx, child, OID_AUTO, name, \
|
||||
SYSCTL_ADD_PROC(ctx, child, OID_AUTO, name, \
|
||||
CTLTYPE_UINT | CTLFLAG_RD, sc, offset, \
|
||||
xlpge_stats_sysctl, "IU", desc)
|
||||
|
||||
|
|
@ -1208,7 +1208,7 @@ nlm_xlpge_setup_stats_sysctl(device_t dev, struct nlm_xlpge_softc *sc)
|
|||
#undef XLPGE_STAT
|
||||
}
|
||||
|
||||
static int
|
||||
static int
|
||||
nlm_xlpge_attach(device_t dev)
|
||||
{
|
||||
struct xlp_port_ivars *pv;
|
||||
|
|
@ -1263,25 +1263,25 @@ nlm_xlpge_attach(device_t dev)
|
|||
return (0);
|
||||
}
|
||||
|
||||
static int
|
||||
static int
|
||||
nlm_xlpge_detach(device_t dev)
|
||||
{
|
||||
return (0);
|
||||
}
|
||||
|
||||
static int
|
||||
static int
|
||||
nlm_xlpge_suspend(device_t dev)
|
||||
{
|
||||
return (0);
|
||||
}
|
||||
|
||||
static int
|
||||
static int
|
||||
nlm_xlpge_resume(device_t dev)
|
||||
{
|
||||
return (0);
|
||||
}
|
||||
|
||||
static int
|
||||
static int
|
||||
nlm_xlpge_shutdown(device_t dev)
|
||||
{
|
||||
return (0);
|
||||
|
|
@ -1290,14 +1290,14 @@ nlm_xlpge_shutdown(device_t dev)
|
|||
/*
|
||||
* miibus function with custom implementation
|
||||
*/
|
||||
static int
|
||||
static int
|
||||
nlm_xlpge_mii_read(struct device *dev, int phyaddr, int regidx)
|
||||
{
|
||||
struct nlm_xlpge_softc *sc;
|
||||
int val;
|
||||
|
||||
sc = device_get_softc(dev);
|
||||
if (sc->type == SGMIIC)
|
||||
if (sc->type == SGMIIC)
|
||||
val = nlm_gmac_mdio_read(sc->base_addr, sc->mdio_bus,
|
||||
BLOCK_7, LANE_CFG, phyaddr, regidx);
|
||||
else
|
||||
|
|
@ -1306,7 +1306,7 @@ nlm_xlpge_mii_read(struct device *dev, int phyaddr, int regidx)
|
|||
return (val);
|
||||
}
|
||||
|
||||
static int
|
||||
static int
|
||||
nlm_xlpge_mii_write(struct device *dev, int phyaddr, int regidx, int val)
|
||||
{
|
||||
struct nlm_xlpge_softc *sc;
|
||||
|
|
@ -1319,7 +1319,7 @@ nlm_xlpge_mii_write(struct device *dev, int phyaddr, int regidx, int val)
|
|||
return (0);
|
||||
}
|
||||
|
||||
static void
|
||||
static void
|
||||
nlm_xlpge_mii_statchg(device_t dev)
|
||||
{
|
||||
struct nlm_xlpge_softc *sc;
|
||||
|
|
|
|||
|
|
@ -12,7 +12,7 @@
|
|||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
*
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
|
|
@ -108,7 +108,7 @@ struct nlm_xlpge_softc {
|
|||
int link; /* Port link status */
|
||||
int flowctrl; /* Port flow control setting */
|
||||
|
||||
unsigned char dev_addr[ETHER_ADDR_LEN];
|
||||
unsigned char dev_addr[ETHER_ADDR_LEN];
|
||||
struct mtx sc_lock;
|
||||
int if_flags;
|
||||
struct nae_port_config *portcfg;
|
||||
|
|
|
|||
|
|
@ -12,7 +12,7 @@
|
|||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
*
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
|
|
@ -135,7 +135,7 @@ print_krp_params(struct cryptkop *krp)
|
|||
}
|
||||
#endif
|
||||
|
||||
static int
|
||||
static int
|
||||
xlp_rsa_init(struct xlp_rsa_softc *sc, int node)
|
||||
{
|
||||
struct xlp_rsa_command *cmd = NULL;
|
||||
|
|
@ -387,7 +387,7 @@ xlp_rsa_freesession(device_t dev, u_int64_t tid)
|
|||
return (0);
|
||||
}
|
||||
|
||||
static void
|
||||
static void
|
||||
xlp_free_cmd_params(struct xlp_rsa_command *cmd)
|
||||
{
|
||||
|
||||
|
|
|
|||
|
|
@ -12,7 +12,7 @@
|
|||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
*
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
|
|
|
|||
|
|
@ -12,7 +12,7 @@
|
|||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
*
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
|
|
@ -114,12 +114,12 @@ DRIVER_MODULE(nlmsec, pci, xlp_sec_driver, xlp_sec_devclass, 0, 0);
|
|||
MODULE_DEPEND(nlmsec, crypto, 1, 1, 1);
|
||||
|
||||
void
|
||||
nlm_xlpsec_msgring_handler(int vc, int size, int code, int src_id,
|
||||
nlm_xlpsec_msgring_handler(int vc, int size, int code, int src_id,
|
||||
struct nlm_fmn_msg *msg, void *data);
|
||||
|
||||
#ifdef NLM_SEC_DEBUG
|
||||
|
||||
#define extract_bits(x, bitshift, bitcnt) \
|
||||
#define extract_bits(x, bitshift, bitcnt) \
|
||||
(((unsigned long long)x >> bitshift) & ((1ULL << bitcnt) - 1))
|
||||
|
||||
void
|
||||
|
|
@ -197,7 +197,7 @@ print_crypto_params(struct xlp_sec_command *cmd, struct nlm_fmn_msg m)
|
|||
return;
|
||||
}
|
||||
|
||||
void
|
||||
void
|
||||
xlp_sec_print_data(struct cryptop *crp)
|
||||
{
|
||||
int i, key_len;
|
||||
|
|
@ -265,7 +265,7 @@ print_cmd(struct xlp_sec_command *cmd)
|
|||
}
|
||||
#endif /* NLM_SEC_DEBUG */
|
||||
|
||||
static int
|
||||
static int
|
||||
xlp_sec_init(struct xlp_sec_softc *sc)
|
||||
{
|
||||
|
||||
|
|
@ -675,7 +675,7 @@ xlp_alloc_cmd_params(struct xlp_sec_command *cmd, unsigned int nsegs)
|
|||
return (err);
|
||||
}
|
||||
|
||||
static void
|
||||
static void
|
||||
xlp_free_cmd_params(struct xlp_sec_command *cmd)
|
||||
{
|
||||
if (cmd->ctrlp != NULL)
|
||||
|
|
@ -754,7 +754,7 @@ xlp_sec_process(device_t dev, struct cryptop *crp, int hint)
|
|||
}
|
||||
if (crd1->crd_flags & CRD_F_IV_EXPLICIT)
|
||||
cmd->cipheroff = cmd->ivlen;
|
||||
else
|
||||
else
|
||||
cmd->cipheroff = cmd->enccrd->crd_skip;
|
||||
cmd->cipherlen = cmd->enccrd->crd_len;
|
||||
if (crd1->crd_flags & CRD_F_IV_PRESENT)
|
||||
|
|
|
|||
|
|
@ -12,7 +12,7 @@
|
|||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
*
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
|
|
|
|||
|
|
@ -12,7 +12,7 @@
|
|||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
*
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
|
|
@ -105,13 +105,13 @@ struct xlp_sec_command {
|
|||
uint32_t hashoff;
|
||||
uint32_t hashlen;
|
||||
uint32_t cipheroff;
|
||||
uint32_t cipherlen;
|
||||
uint32_t cipherlen;
|
||||
uint32_t ivoff;
|
||||
uint32_t ivlen;
|
||||
uint32_t hashalg;
|
||||
uint32_t hashmode;
|
||||
uint32_t cipheralg;
|
||||
uint32_t ciphermode;
|
||||
uint32_t ciphermode;
|
||||
uint32_t nsegs;
|
||||
uint32_t hash_dst_len; /* used to store hash alg dst size */
|
||||
};
|
||||
|
|
|
|||
|
|
@ -12,7 +12,7 @@
|
|||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
*
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
|
|
|
|||
Loading…
Reference in a new issue