diff --git a/sys/sun4v/include/hypervisor_api.h b/sys/sun4v/include/hypervisor_api.h
index f24a468593cb..141f284f05df 100644
--- a/sys/sun4v/include/hypervisor_api.h
+++ b/sys/sun4v/include/hypervisor_api.h
@@ -1,40 +1,10 @@
 /*
- * CDDL HEADER START
- *
- * The contents of this file are subject to the terms of the
- * Common Development and Distribution License (the "License").
- * You may not use this file except in compliance with the License.
- *
- * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
- * or http://www.opensolaris.org/os/licensing.
- * See the License for the specific language governing permissions
- * and limitations under the License.
- *
- * When distributing Covered Code, include this CDDL HEADER in each
- * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
- * If applicable, add the following below this CDDL HEADER, with the
- * fields enclosed by brackets "[]" replaced with your own identifying
- * information: Portions Copyright [yyyy] [name of copyright owner]
- *
- * CDDL HEADER END
  * $FreeBSD$
  */
 
-/*
- * Copyright 2006 Sun Microsystems, Inc.  All rights reserved.
- * Use is subject to license terms.
- */
-
 #ifndef _MACHINE_HYPERVISOR_API_H
 #define	_MACHINE_HYPERVISOR_API_H
 
-/*
- * sun4v Hypervisor API
- *
- * Reference: api.pdf Revision 0.12 dated May 12, 2004.
- *	      io-api.txt version 1.11 dated 10/19/2004
- */
-
 #include <machine/hypervisorvar.h>
 
 #ifndef _ASM
@@ -79,6 +49,15 @@ typedef struct trap_trace_entry {
 	uint64_t	tte_f4;		/* Entry specific. */
 } trap_trace_entry_t;
 
+typedef struct ldc_state_info {
+	uint64_t lsi_head_offset;
+	uint64_t lsi_tail_offset;
+	uint64_t lse_channel_state;
+} ldc_state_info_t;
+
+#define LDC_CHANNEL_DOWN     0
+#define LDC_CHANNEL_UP       1
+
 extern uint64_t hv_mmu_map_perm_addr(void *, int, uint64_t, int);
 extern uint64_t	hv_mmu_unmap_perm_addr(void *, int, int);
 extern uint64_t	hv_set_ctx0(uint64_t, uint64_t);
@@ -136,7 +115,14 @@ extern uint64_t hvio_peek(devhandle_t dev_hdl, uint64_t r_addr, uint64_t size,
 			  uint32_t *err_flag, uint64_t *data);
 extern uint64_t hvio_poke(devhandle_t dev_hdl, uint64_t r_addr, uint64_t size,
 			  uint64_t data, uint64_t pcidev, uint32_t *err_flag);
-
+extern uint64_t hvio_ldc_tx_qconf(uint64_t ldc_id, uint64_t base_raddr, uint64_t nentries);
+extern uint64_t hvio_ldc_tx_qinfo(uint64_t ldc_id, uint64_t *base_raddr, uint64_t *nentries);
+extern uint64_t hvio_ldc_tx_get_state(uint64_t ldc_id, ldc_state_info_t *info); 
+extern uint64_t hvio_ldc_tx_set_qtail(uint64_t ldc_id, uint64_t tail_offset);
+extern uint64_t hvio_ldc_rx_get_state(uint64_t ldc_id, ldc_state_info_t *info); 
+extern uint64_t hvio_ldc_rx_qconf(uint64_t ldc_id, uint64_t base_raddr, uint64_t nentries);
+extern uint64_t hvio_ldc_rx_qinfo(uint64_t ldc_id, uint64_t *base_raddr, uint64_t *nentries);
+extern uint64_t hvio_ldc_rx_set_qhead(uint64_t ldc_id, uint64_t head_offset);
 extern uint64_t hvio_config_get(devhandle_t dev_hdl, pci_device_t pci_device, 
 				pci_config_offset_t off, pci_config_size_t size, pci_cfg_data_t *data);
 extern uint64_t hvio_config_put(devhandle_t dev_hdl, pci_device_t pci_device, 
diff --git a/sys/sun4v/include/hypervisorvar.h b/sys/sun4v/include/hypervisorvar.h
index 3ec7e4dc6fa9..30333e5a2ab9 100644
--- a/sys/sun4v/include/hypervisorvar.h
+++ b/sys/sun4v/include/hypervisorvar.h
@@ -149,6 +149,16 @@
 #define	HVIO_MSG_GETVALID	0xd2
 #define	HVIO_MSG_SETVALID	0xd3
 
+#define HVIO_LDC_TX_QCONF       0xe0
+#define HVIO_LDC_TX_QINFO       0xe1
+#define HVIO_LDC_TX_GET_STATE   0xe2
+#define HVIO_LDC_TX_SET_QTAIL   0xe3
+#define HVIO_LDC_RX_QCONF       0xe4
+#define HVIO_LDC_RX_QINFO       0xe5
+#define HVIO_LDC_RX_GET_STATE   0xe6
+#define HVIO_LDC_RX_SET_QHEAD   0xe7
+
+
 #define HVIO_SIM_READ           0xf0
 #define HVIO_SIM_WRITE          0xf1
 
diff --git a/sys/sun4v/sun4v/hcall.S b/sys/sun4v/sun4v/hcall.S
index d0dd9537fcb4..5e491766957e 100644
--- a/sys/sun4v/sun4v/hcall.S
+++ b/sys/sun4v/sun4v/hcall.S
@@ -156,7 +156,160 @@ ENTRY(hv_cpu_mondo_send)
 	retl
 	  membar	#Sync
 END(hv_cpu_mondo_send)
-		
+
+/*
+ * configure ldc tx queue
+ * arg0 ldc_id     (%o0)
+ * arg1 base_raddr (%o1)
+ * arg2 nentries   (%o2)
+ *
+ * ret0 status     (%o0)
+ *
+ */
+ENTRY(hvio_ldc_tx_qconf)
+	mov	HVIO_LDC_TX_QCONF, %o5
+	ta	FAST_TRAP
+	retl
+	  nop
+END(hvio_ldc_tx_qconf)
+
+/*
+ * return configuration info for ldc tx queue
+ * arg0 ldc_id     (%o0)
+ *
+ * ret0 status     (%o0)
+ * ret1 base_raddr (%o1)
+ * ret2 nentries   (%o2)
+ *
+ */
+ENTRY(hvio_ldc_tx_qinfo)
+	mov	%o1, %o3
+	mov	%o2, %o4
+	mov	HVIO_LDC_TX_QINFO, %o5
+	ta	FAST_TRAP
+	brnz	%o0, 1f
+	  nop
+	stx	%o1, [%o3]
+	stx	%o2, [%o4]
+1:	retl
+	  nop
+END(hvio_ldc_tx_qinfo)
+
+/*
+ * get the state of the ldc tx queue
+ * arg0 ldc_id        (%o0)
+ *
+ * ret0 status        (%o0)
+ * ret1 head_offset   (%o1)
+ * ret2 tail_offset   (%o2)
+ * ret3 channel_state (%o3)
+ * 
+ */
+ENTRY(hvio_ldc_tx_get_state)
+	mov	%o1, %o4
+	mov	HVIO_LDC_TX_GET_STATE, %o5
+	ta	FAST_TRAP
+	brnz	%o0, 1f
+	  nop
+	stx	%o1, [%o4]
+	stx	%o2, [%o4 + 8]
+	stx	%o3, [%o4 + 16]
+1:	retl
+	  nop		
+END(hvio_ldc_tx_get_state)
+
+/*
+ * update the tail pointer of the ldc tx queue
+ * arg0 ldc_id      (%o0)
+ * arg1 tail_offset (%o1)
+ *
+ * ret0 status      (%o0)
+ *
+ */
+ENTRY(hvio_ldc_tx_set_qtail)
+	mov	HVIO_LDC_TX_SET_QTAIL, %o5
+	ta	FAST_TRAP
+	retl
+	  nop
+END(hvio_ldc_tx_set_qtail)
+
+/*
+ * configure ldc rx queue
+ * arg0 ldc_id     (%o0)
+ * arg1 base_raddr (%o1)
+ * arg2 nentries   (%o2)
+ *
+ * ret0 status     (%o0)
+ *
+ */
+ENTRY(hvio_ldc_rx_qconf)
+	mov	HVIO_LDC_RX_QCONF, %o5
+	ta	FAST_TRAP
+	retl
+	  nop	
+END(hvio_ldc_rx_qconf)
+
+/*
+ * return configuration info for ldc rx queue
+ * arg0 ldc_id     (%o0)
+ *
+ * ret0 status     (%o0)
+ * ret1 base_raddr (%o1)
+ * ret2 nentries   (%o2)
+ *
+ */
+ENTRY(hvio_ldc_rx_qinfo)
+	mov	%o1, %o3
+	mov	%o2, %o4
+	mov	HVIO_LDC_RX_QINFO, %o5
+	ta	FAST_TRAP
+	brnz	%o0, 1f
+	  nop
+	stx	%o1, [%o3]
+	stx	%o2, [%o4]
+1:	retl
+	  nop
+END(hvio_ldc_rx_qinfo)
+
+/*
+ * get the state of the ldc rx queue
+ * arg0 ldc_id        (%o0)
+ *
+ * ret0 status        (%o0)
+ * ret1 head_offset   (%o1)
+ * ret2 tail_offset   (%o2)
+ * ret3 channel_state (%o3)
+ * 
+ */
+ENTRY(hvio_ldc_rx_get_state)
+	mov	%o1, %o4
+	mov	HVIO_LDC_RX_GET_STATE, %o5
+	ta	FAST_TRAP
+	brnz	%o0, 1f
+	  nop
+	stx	%o1, [%o4]
+	stx	%o2, [%o4 + 8]
+	stx	%o3, [%o4 + 16]
+1:	retl
+	  nop		
+END(hvio_ldc_rx_get_state)
+
+/*
+ * update the head pointer of the ldc rx queue
+ * arg0 ldc_id      (%o0)
+ * arg1 head_offset (%o1)
+ *
+ * ret0 status      (%o0)
+ *
+ */
+ENTRY(hvio_ldc_rx_set_qhead)
+	mov	HVIO_LDC_RX_SET_QHEAD, %o5
+	ta	FAST_TRAP
+	retl
+	  nop	
+END(hvio_ldc_rx_set_qhead)
+
+	
 /*
  * arg0 - devhandle
  * arg1 - pci_device
@@ -854,8 +1007,8 @@ END(hv_dump_buf_update)
  * For memory scrub
  * int hv_mem_scrub(uint64_t real_addr, uint64_t length,
  * 	uint64_t *scrubbed_len);
- * Retun %o0 -- status
- *       %o1 -- bytes scrubbed
+ * Return %o0 -- status
+ *        %o1 -- bytes scrubbed
  */
 ENTRY(hv_mem_scrub)
 	mov	%o2, %o4
@@ -869,8 +1022,8 @@ END(hv_mem_scrub)
  * Flush ecache 
  * int hv_mem_sync(uint64_t real_addr, uint64_t length,
  * 	uint64_t *flushed_len);
- * Retun %o0 -- status
- *       %o1 -- bytes flushed
+ * Return %o0 -- status
+ *        %o1 -- bytes flushed
  */
 ENTRY(hv_mem_sync)
 	mov	%o2, %o4