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mitigations.7: Document riscv's SM[AE]P equivalents
Its base privileged architecture provides these. Read/write is toggleable via the SUM bit, so use that as its feature name. Execute is always-on so has no name.
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@ -250,6 +250,8 @@ kernel.
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.It amd64 Ta SMEP Ta Execute
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.It arm64 Ta PAN Ta Read / Write
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.It arm64 Ta PXN Ta Execute
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.It riscv Ta SUM Ta Read / Write
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.It riscv Ta - Ta Execute
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.El
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.Pp
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These features are automatically used by the kernel.
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