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gicv3: Define PA masks for the PENDBASR and PROPBASER registers

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Define masks for these registers to find the PA of where these are
pointing.

Sponsored by:		Netflix
Reviewed by:		andrew
Differential Revision:	https://reviews.freebsd.org/D44096
This commit is contained in:
Warner Losh 2024-02-28 07:09:02 -07:00
parent b4368e8389
commit a3f164a0c7
1 changed files with 18 additions and 0 deletions
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18
sys/arm64/arm64/gic_v3_reg.h
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@ -182,6 +182,15 @@
#define GICR_PROPBASER_OUTER_CACHE_MASK \
(0x7UL << GICR_PROPBASER_OUTER_CACHE_SHIFT)
/*
* The PROPBASER LPI Configuration Table is 4k aligned, so bits 51:12 are
* defined to be the PA, for 40 potentially significant bits.
*/
#define GICR_PROPBASER_PA_SHIFT 12
#define GICR_PROPBASER_PA_SIZE 40
#define GICR_PROPBASER_PA_MASK \
(((1UL << GICR_PROPBASER_PA_SIZE) - 1) << GICR_PROPBASER_PA_SHIFT)
#define GICR_PENDBASER 0x0078
/*
* Cacheability
@ -225,6 +234,15 @@
#define GICR_PENDBASER_OUTER_CACHE_MASK \
(0x7UL << GICR_PENDBASER_OUTER_CACHE_SHIFT)
/*
* The LPI Pending Table (PENDBASER) is 64k aligned. So bits 51:16 are defined to be the PA, for 36
* potentially significant bits.
*/
#define GICR_PENDBASER_PA_SHIFT 16
#define GICR_PENDBASER_PA_SIZE 36
#define GICR_PENDBASER_PA_MASK \
(((1UL << GICR_PENDBASER_PA_SIZE) - 1) << GICR_PENDBASER_PA_SHIFT)
#define GICR_INVLPIR 0x00a0
#define GICR_INVALLR 0x00b0
#define GICR_SYNCR 0x00c0