mirror of
https://github.com/freebsd/freebsd-src
synced 2024-10-20 23:35:02 +00:00
- enable multiple transmit queues
- invert sense of hw.cxgb.singleq tunable to hw.cxgb.multiq - don't wake up transmitting thread by default - add per tx queue ifaltq to handle ALTQ - remove several unused functions in cxgb_multiq.c - add several sysctls: multiq_tx_enable, coalesce_tx_enable, and wakeup_tx_thread - this obsoletes the hw.cxgb.snd_queue_len as ifq is replaced by a buf_ring
This commit is contained in:
Kip Macy
parent
aea78d2094
commit
a02573bc06
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=185165
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@ -260,7 +260,9 @@ struct sge_txq {
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*/
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struct mbuf_head cleanq;
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struct buf_ring *txq_mr;
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struct ifaltq *txq_ifq;
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struct mbuf *immpkt;
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uint32_t txq_drops;
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uint32_t txq_skipped;
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uint32_t txq_coalesced;
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@ -604,7 +606,7 @@ static inline int offload_running(adapter_t *adapter)
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}
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int cxgb_pcpu_enqueue_packet(struct ifnet *ifp, struct mbuf *m);
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int cxgb_pcpu_start(struct ifnet *ifp, struct mbuf *m);
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int cxgb_pcpu_transmit(struct ifnet *ifp, struct mbuf *m);
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void cxgb_pcpu_shutdown_threads(struct adapter *sc);
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void cxgb_pcpu_startup_threads(struct adapter *sc);
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@ -32,6 +32,7 @@ POSSIBILITY OF SUCH DAMAGE.
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#ifndef _CXGB_CONFIG_H_
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#define _CXGB_CONFIG_H_
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#define CONFIG_CHELSIO_T3_CORE
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#define CONFIG_CHELSIO_T3_CORE
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#define IFNET_MULTIQUEUE
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#endif
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@ -206,17 +206,17 @@ SYSCTL_UINT(_hw_cxgb, OID_AUTO, ofld_disable, CTLFLAG_RDTUN, &ofld_disable, 0,
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/*
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* The driver uses an auto-queue algorithm by default.
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* To disable it and force a single queue-set per port, use singleq = 1.
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* To disable it and force a single queue-set per port, use multiq = 0
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*/
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static int singleq = 0;
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TUNABLE_INT("hw.cxgb.singleq", &singleq);
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SYSCTL_UINT(_hw_cxgb, OID_AUTO, singleq, CTLFLAG_RDTUN, &singleq, 0,
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"use a single queue-set per port");
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static int multiq = 1;
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TUNABLE_INT("hw.cxgb.multiq", &multiq);
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SYSCTL_UINT(_hw_cxgb, OID_AUTO, multiq, CTLFLAG_RDTUN, &multiq, 0,
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"use min(ncpus/ports, 8) queue-sets per port");
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/*
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* The driver uses an auto-queue algorithm by default.
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* To disable it and force a single queue-set per port, use singleq = 1.
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* By default the driver will not update the firmware unless
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* it was compiled against a newer version
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*
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*/
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static int force_fw_update = 0;
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TUNABLE_INT("hw.cxgb.force_fw_update", &force_fw_update);
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@ -228,15 +228,6 @@ TUNABLE_INT("hw.cxgb.use_16k_clusters", &cxgb_use_16k_clusters);
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SYSCTL_UINT(_hw_cxgb, OID_AUTO, use_16k_clusters, CTLFLAG_RDTUN,
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&cxgb_use_16k_clusters, 0, "use 16kB clusters for the jumbo queue ");
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/*
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* Tune the size of the output queue.
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*/
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int cxgb_snd_queue_len = IFQ_MAXLEN;
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TUNABLE_INT("hw.cxgb.snd_queue_len", &cxgb_snd_queue_len);
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SYSCTL_UINT(_hw_cxgb, OID_AUTO, snd_queue_len, CTLFLAG_RDTUN,
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&cxgb_snd_queue_len, 0, "send queue size ");
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enum {
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MAX_TXQ_ENTRIES = 16384,
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MAX_CTRL_TXQ_ENTRIES = 1024,
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@ -368,8 +359,8 @@ cxgb_controller_probe(device_t dev)
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ports = "ports";
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snprintf(buf, sizeof(buf), "%s %sNIC, rev: %d nports: %d %s",
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ai->desc, is_offload(sc) ? "R" : "",
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sc->params.rev, nports, ports);
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ai->desc, is_offload(sc) ? "R" : "",
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sc->params.rev, nports, ports);
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device_set_desc_copy(dev, buf);
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return (BUS_PROBE_DEFAULT);
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}
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@ -415,8 +406,6 @@ cxgb_controller_attach(device_t dev)
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int msi_needed, reg;
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#endif
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int must_load = 0;
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char buf[80];
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sc = device_get_softc(dev);
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sc->dev = dev;
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sc->msi_count = 0;
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@ -537,7 +526,7 @@ cxgb_controller_attach(device_t dev)
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sc->cxgb_intr = t3b_intr;
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}
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if ((sc->flags & USING_MSIX) && !singleq)
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if ((sc->flags & USING_MSIX) && multiq)
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port_qsets = min((SGE_QSETS/(sc)->params.nports), mp_ncpus);
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/* Create a private taskqueue thread for handling driver events */
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@ -629,11 +618,6 @@ cxgb_controller_attach(device_t dev)
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G_FW_VERSION_MAJOR(vers), G_FW_VERSION_MINOR(vers),
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G_FW_VERSION_MICRO(vers));
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snprintf(buf, sizeof(buf), "%s\t E/C: %s S/N: %s",
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ai->desc,
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sc->params.vpd.ec, sc->params.vpd.sn);
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device_set_desc_copy(dev, buf);
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device_printf(sc->dev, "Firmware Version %s\n", &sc->fw_version[0]);
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callout_reset(&sc->cxgb_tick_ch, CXGB_TICKS(sc), cxgb_tick, sc);
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t3_add_attach_sysctls(sc);
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@ -843,15 +827,18 @@ cxgb_setup_msix(adapter_t *sc, int msix_count)
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device_printf(sc->dev, "Cannot set up "
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"interrupt for message %d\n", rid);
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return (EINVAL);
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}
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#if 0
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#ifdef IFNET_MULTIQUEUE
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if (singleq == 0) {
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if (multiq) {
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int vector = rman_get_start(sc->msix_irq_res[k]);
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if (bootverbose)
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device_printf(sc->dev, "binding vector=%d to cpu=%d\n", vector, k % mp_ncpus);
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intr_bind(vector, k % mp_ncpus);
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}
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#endif
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#endif
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#endif
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}
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}
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@ -941,16 +928,11 @@ cxgb_port_attach(device_t dev)
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ifp->if_ioctl = cxgb_ioctl;
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ifp->if_start = cxgb_start;
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#if 0
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#ifdef IFNET_MULTIQUEUE
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ifp->if_flags |= IFF_MULTIQ;
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ifp->if_mq_start = cxgb_pcpu_start;
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#endif
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#endif
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ifp->if_timer = 0; /* Disable ifnet watchdog */
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ifp->if_watchdog = NULL;
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ifp->if_snd.ifq_drv_maxlen = cxgb_snd_queue_len;
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ifp->if_snd.ifq_drv_maxlen = IFQ_MAXLEN;
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IFQ_SET_MAXLEN(&ifp->if_snd, ifp->if_snd.ifq_drv_maxlen);
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IFQ_SET_READY(&ifp->if_snd);
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@ -968,6 +950,8 @@ cxgb_port_attach(device_t dev)
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}
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ether_ifattach(ifp, p->hw_addr);
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ifp->if_transmit = cxgb_pcpu_transmit;
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/*
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* Only default to jumbo frames on 10GigE
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*/
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@ -27,8 +27,6 @@ POSSIBILITY OF SUCH DAMAGE.
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***************************************************************************/
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#define DEBUG_BUFRING
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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@ -89,12 +87,11 @@ __FBSDID("$FreeBSD$");
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#include <sys/mvec.h>
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extern int txq_fills;
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extern struct sysctl_oid_list sysctl__hw_cxgb_children;
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static int cxgb_pcpu_tx_coalesce = 0;
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TUNABLE_INT("hw.cxgb.tx_coalesce", &cxgb_pcpu_tx_coalesce);
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SYSCTL_UINT(_hw_cxgb, OID_AUTO, tx_coalesce, CTLFLAG_RDTUN, &cxgb_pcpu_tx_coalesce, 0,
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"coalesce small packets into a single work request");
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int multiq_tx_enable = 1;
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int coalesce_tx_enable = 0;
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int wakeup_tx_thread = 0;
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extern struct sysctl_oid_list sysctl__hw_cxgb_children;
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static int sleep_ticks = 1;
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TUNABLE_INT("hw.cxgb.sleep_ticks", &sleep_ticks);
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SYSCTL_UINT(_hw_cxgb, OID_AUTO, sleep_ticks, CTLFLAG_RDTUN, &sleep_ticks, 0,
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@ -106,22 +103,19 @@ SYSCTL_UINT(_hw_cxgb, OID_AUTO, txq_mr_size, CTLFLAG_RDTUN, &cxgb_txq_buf_ring_s
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"size of per-queue mbuf ring");
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static inline int32_t cxgb_pcpu_calc_cookie(struct ifnet *ifp, struct mbuf *immpkt);
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static void cxgb_pcpu_start_proc(void *arg);
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#ifdef IFNET_MULTIQUEUE
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static int cxgb_pcpu_cookie_to_qidx(struct port_info *, uint32_t cookie);
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#endif
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static int cxgb_tx(struct sge_qset *qs, uint32_t txmax);
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#ifdef IFNET_MULTIQUEUE
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static int cxgb_pcpu_cookie_to_qidx(struct port_info *pi, uint32_t cookie);
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#endif
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static inline int
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cxgb_pcpu_enqueue_packet_(struct sge_qset *qs, struct mbuf *m)
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{
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struct sge_txq *txq;
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int err = 0;
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#ifndef IFNET_MULTIQUEUE
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panic("not expecting enqueue without multiqueue");
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#endif
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KASSERT(m != NULL, ("null mbuf"));
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KASSERT(m->m_type == MT_DATA, ("bad mbuf type %d", m->m_type));
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if (qs->qs_flags & QS_EXITING) {
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@ -134,9 +128,9 @@ cxgb_pcpu_enqueue_packet_(struct sge_qset *qs, struct mbuf *m)
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txq->txq_drops++;
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m_freem(m);
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}
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if ((qs->txq[TXQ_ETH].flags & TXQ_TRANSMITTING) == 0)
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if (wakeup_tx_thread && ((txq->flags & TXQ_TRANSMITTING) == 0))
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wakeup(qs);
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return (err);
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}
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@ -149,29 +143,34 @@ cxgb_pcpu_enqueue_packet(struct ifnet *ifp, struct mbuf *m)
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#ifdef IFNET_MULTIQUEUE
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int32_t calc_cookie;
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calc_cookie = m->m_pkthdr.rss_hash;
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calc_cookie = m->m_pkthdr.flowid;
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qidx = cxgb_pcpu_cookie_to_qidx(pi, calc_cookie);
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#else
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qidx = 0;
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#endif
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qs = &pi->adapter->sge.qs[qidx];
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err = cxgb_pcpu_enqueue_packet_(qs, m);
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if (ALTQ_IS_ENABLED(&ifp->if_snd)) {
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IFQ_ENQUEUE(qs->txq[0].txq_ifq, m, err);
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} else {
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err = cxgb_pcpu_enqueue_packet_(qs, m);
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}
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return (err);
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}
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static int
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cxgb_dequeue_packet(struct sge_txq *txq, struct mbuf **m_vec)
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{
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struct mbuf *m;
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struct mbuf *m, *m0;
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struct sge_qset *qs;
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int count, size, coalesced;
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struct adapter *sc;
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#ifndef IFNET_MULTIQUEUE
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struct port_info *pi = txq->port;
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mtx_assert(&txq->lock, MA_OWNED);
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if (txq->immpkt != NULL)
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panic("immediate packet set");
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mtx_assert(&txq->lock, MA_OWNED);
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IFQ_DRV_DEQUEUE(&pi->ifp->if_snd, m);
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if (m == NULL)
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@ -180,7 +179,16 @@ cxgb_dequeue_packet(struct sge_txq *txq, struct mbuf **m_vec)
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m_vec[0] = m;
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return (1);
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#endif
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if (ALTQ_IS_ENABLED(txq->txq_ifq)) {
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IFQ_DRV_DEQUEUE(txq->txq_ifq, m);
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if (m == NULL)
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return (0);
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m_vec[0] = m;
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return (1);
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}
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mtx_assert(&txq->lock, MA_OWNED);
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coalesced = count = size = 0;
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qs = txq_to_qset(txq, TXQ_ETH);
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if (qs->qs_flags & QS_EXITING)
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@ -199,9 +207,10 @@ cxgb_dequeue_packet(struct sge_txq *txq, struct mbuf **m_vec)
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return (0);
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count = 1;
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m_vec[0] = m;
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if (m->m_pkthdr.tso_segsz > 0 || m->m_pkthdr.len > TX_WR_SIZE_MAX ||
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m->m_next != NULL || (cxgb_pcpu_tx_coalesce == 0)) {
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m->m_next != NULL || (coalesce_tx_enable == 0)) {
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return (count);
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}
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@ -213,7 +222,11 @@ cxgb_dequeue_packet(struct sge_txq *txq, struct mbuf **m_vec)
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size + m->m_pkthdr.len > TX_WR_SIZE_MAX || m->m_next != NULL)
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break;
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buf_ring_dequeue_sc(txq->txq_mr);
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m0 = buf_ring_dequeue_sc(txq->txq_mr);
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#ifdef DEBUG_BUFRING
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if (m0 != m)
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panic("peek and dequeue don't match");
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#endif
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size += m->m_pkthdr.len;
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m_vec[count++] = m;
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@ -227,134 +240,6 @@ cxgb_dequeue_packet(struct sge_txq *txq, struct mbuf **m_vec)
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return (count);
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}
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static int32_t
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cxgb_pcpu_get_cookie(struct ifnet *ifp, struct in6_addr *lip, uint16_t lport, struct in6_addr *rip, uint16_t rport, int ipv6)
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{
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uint32_t base;
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uint8_t buf[36];
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int count;
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int32_t cookie;
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critical_enter();
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/*
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* Can definitely bypass bcopy XXX
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*/
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if (ipv6 == 0) {
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count = 12;
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bcopy(rip, &buf[0], 4);
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bcopy(lip, &buf[4], 4);
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bcopy(&rport, &buf[8], 2);
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bcopy(&lport, &buf[10], 2);
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} else {
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count = 36;
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bcopy(rip, &buf[0], 16);
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bcopy(lip, &buf[16], 16);
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bcopy(&rport, &buf[32], 2);
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bcopy(&lport, &buf[34], 2);
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}
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base = 0xffffffff;
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base = update_crc32(base, buf, count);
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base = sctp_csum_finalize(base);
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/*
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* Indirection table is 128 bits
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* -> cookie indexes into indirection table which maps connection to queue
|
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* -> RSS map maps queue to CPU
|
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*/
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cookie = (base & (RSS_TABLE_SIZE-1));
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critical_exit();
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return (cookie);
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}
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|
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static int32_t
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cxgb_pcpu_calc_cookie(struct ifnet *ifp, struct mbuf *immpkt)
|
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{
|
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struct in6_addr lip, rip;
|
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uint16_t lport, rport;
|
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struct ether_header *eh;
|
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int32_t cookie;
|
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struct ip *ip;
|
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struct ip6_hdr *ip6;
|
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struct tcphdr *th;
|
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struct udphdr *uh;
|
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struct sctphdr *sh;
|
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uint8_t *next, proto;
|
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int etype;
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|
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if (immpkt == NULL)
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return -1;
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#if 1
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/*
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* XXX perf test
|
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*/
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return (0);
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#endif
|
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rport = lport = 0;
|
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cookie = -1;
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next = NULL;
|
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eh = mtod(immpkt, struct ether_header *);
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etype = ntohs(eh->ether_type);
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|
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switch (etype) {
|
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case ETHERTYPE_IP:
|
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ip = (struct ip *)(eh + 1);
|
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next = (uint8_t *)(ip + 1);
|
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bcopy(&ip->ip_src, &lip, 4);
|
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bcopy(&ip->ip_dst, &rip, 4);
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proto = ip->ip_p;
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break;
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case ETHERTYPE_IPV6:
|
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ip6 = (struct ip6_hdr *)(eh + 1);
|
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next = (uint8_t *)(ip6 + 1);
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bcopy(&ip6->ip6_src, &lip, sizeof(struct in6_addr));
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bcopy(&ip6->ip6_dst, &rip, sizeof(struct in6_addr));
|
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if (ip6->ip6_nxt == IPPROTO_HOPOPTS) {
|
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struct ip6_hbh *hbh;
|
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|
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hbh = (struct ip6_hbh *)(ip6 + 1);
|
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proto = hbh->ip6h_nxt;
|
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} else
|
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proto = ip6->ip6_nxt;
|
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break;
|
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case ETHERTYPE_ARP:
|
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default:
|
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/*
|
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* Default to queue zero
|
||||
*/
|
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proto = cookie = 0;
|
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}
|
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if (proto) {
|
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switch (proto) {
|
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case IPPROTO_TCP:
|
||||
th = (struct tcphdr *)next;
|
||||
lport = th->th_sport;
|
||||
rport = th->th_dport;
|
||||
break;
|
||||
case IPPROTO_UDP:
|
||||
uh = (struct udphdr *)next;
|
||||
lport = uh->uh_sport;
|
||||
rport = uh->uh_dport;
|
||||
break;
|
||||
case IPPROTO_SCTP:
|
||||
sh = (struct sctphdr *)next;
|
||||
lport = sh->src_port;
|
||||
rport = sh->dest_port;
|
||||
break;
|
||||
default:
|
||||
/* nothing to do */
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (cookie)
|
||||
cookie = cxgb_pcpu_get_cookie(ifp, &lip, lport, &rip, rport, (etype == ETHERTYPE_IPV6));
|
||||
|
||||
return (cookie);
|
||||
}
|
||||
|
||||
static void
|
||||
cxgb_pcpu_free(struct sge_qset *qs)
|
||||
{
|
||||
|
|
@ -377,10 +262,6 @@ cxgb_pcpu_reclaim_tx(struct sge_txq *txq)
|
|||
int reclaimable;
|
||||
struct sge_qset *qs = txq_to_qset(txq, TXQ_ETH);
|
||||
|
||||
#ifdef notyet
|
||||
KASSERT(qs->qs_cpuid == curcpu, ("cpu qset mismatch cpuid=%d curcpu=%d",
|
||||
qs->qs_cpuid, curcpu));
|
||||
#endif
|
||||
mtx_assert(&txq->lock, MA_OWNED);
|
||||
|
||||
reclaimable = desc_reclaimable(txq);
|
||||
|
|
@ -426,7 +307,8 @@ cxgb_pcpu_start_(struct sge_qset *qs, struct mbuf *immpkt, int tx_flush)
|
|||
initerr = ENXIO;
|
||||
else if (immpkt) {
|
||||
|
||||
if (!buf_ring_empty(txq->txq_mr))
|
||||
if (!buf_ring_empty(txq->txq_mr)
|
||||
|| ALTQ_IS_ENABLED(&pi->ifp->if_snd))
|
||||
initerr = cxgb_pcpu_enqueue_packet_(qs, immpkt);
|
||||
else
|
||||
txq->immpkt = immpkt;
|
||||
|
|
@ -491,7 +373,7 @@ cxgb_pcpu_start_(struct sge_qset *qs, struct mbuf *immpkt, int tx_flush)
|
|||
}
|
||||
|
||||
int
|
||||
cxgb_pcpu_start(struct ifnet *ifp, struct mbuf *immpkt)
|
||||
cxgb_pcpu_transmit(struct ifnet *ifp, struct mbuf *immpkt)
|
||||
{
|
||||
uint32_t cookie;
|
||||
int err, qidx, locked, resid;
|
||||
|
|
@ -506,10 +388,10 @@ cxgb_pcpu_start(struct ifnet *ifp, struct mbuf *immpkt)
|
|||
qidx = resid = err = cookie = locked = 0;
|
||||
|
||||
#ifdef IFNET_MULTIQUEUE
|
||||
if (immpkt && (immpkt->m_pkthdr.rss_hash != 0)) {
|
||||
cookie = immpkt->m_pkthdr.rss_hash;
|
||||
if (immpkt && (immpkt->m_pkthdr.flowid != 0)) {
|
||||
cookie = immpkt->m_pkthdr.flowid;
|
||||
qidx = cxgb_pcpu_cookie_to_qidx(pi, cookie);
|
||||
DPRINTF("hash=0x%x qidx=%d cpu=%d\n", immpkt->m_pkthdr.rss_hash, qidx, curcpu);
|
||||
DPRINTF("hash=0x%x qidx=%d cpu=%d\n", immpkt->m_pkthdr.flowid, qidx, curcpu);
|
||||
qs = &pi->adapter->sge.qs[qidx];
|
||||
} else
|
||||
#endif
|
||||
|
|
@ -519,7 +401,7 @@ cxgb_pcpu_start(struct ifnet *ifp, struct mbuf *immpkt)
|
|||
|
||||
if (((sc->tunq_coalesce == 0) ||
|
||||
(buf_ring_count(txq->txq_mr) >= TX_WR_COUNT_MAX) ||
|
||||
(cxgb_pcpu_tx_coalesce == 0)) && mtx_trylock(&txq->lock)) {
|
||||
(coalesce_tx_enable == 0)) && mtx_trylock(&txq->lock)) {
|
||||
if (cxgb_debug)
|
||||
printf("doing immediate transmit\n");
|
||||
|
||||
|
|
@ -534,10 +416,6 @@ cxgb_pcpu_start(struct ifnet *ifp, struct mbuf *immpkt)
|
|||
sc->tunq_coalesce, buf_ring_count(txq->txq_mr), mtx_owned(&txq->lock));
|
||||
err = cxgb_pcpu_enqueue_packet_(qs, immpkt);
|
||||
}
|
||||
|
||||
if (resid && (txq->flags & TXQ_TRANSMITTING) == 0)
|
||||
wakeup(qs);
|
||||
|
||||
return ((err == ENOSPC) ? 0 : err);
|
||||
}
|
||||
|
||||
|
|
@ -552,7 +430,7 @@ cxgb_start(struct ifnet *ifp)
|
|||
if (IFQ_DRV_IS_EMPTY(&ifp->if_snd))
|
||||
return;
|
||||
|
||||
cxgb_pcpu_start(ifp, NULL);
|
||||
cxgb_pcpu_transmit(ifp, NULL);
|
||||
}
|
||||
|
||||
static void
|
||||
|
|
@ -562,11 +440,8 @@ cxgb_pcpu_start_proc(void *arg)
|
|||
struct thread *td;
|
||||
struct sge_txq *txq = &qs->txq[TXQ_ETH];
|
||||
int idleticks, err = 0;
|
||||
#ifdef notyet
|
||||
struct adapter *sc = qs->port->adapter;
|
||||
#endif
|
||||
td = curthread;
|
||||
|
||||
td = curthread;
|
||||
sleep_ticks = max(hz/1000, 1);
|
||||
qs->qs_flags |= QS_RUNNING;
|
||||
thread_lock(td);
|
||||
|
|
@ -642,6 +517,9 @@ cxgb_pcpu_cookie_to_qidx(struct port_info *pi, uint32_t cookie)
|
|||
{
|
||||
int qidx;
|
||||
uint32_t tmp;
|
||||
|
||||
if (multiq_tx_enable == 0)
|
||||
return (pi->first_qset);
|
||||
|
||||
/*
|
||||
* Will probably need to be changed for 4-port XXX
|
||||
|
|
@ -757,7 +635,7 @@ cxgb_tx(struct sge_qset *qs, uint32_t txmax)
|
|||
check_pkt_coalesce(qs);
|
||||
count = cxgb_dequeue_packet(txq, m_vec);
|
||||
if (count == 0) {
|
||||
err = ENOBUFS;
|
||||
err = ENOSPC;
|
||||
break;
|
||||
}
|
||||
ETHER_BPF_MTAP(ifp, m_vec[0]);
|
||||
|
|
@ -767,28 +645,10 @@ cxgb_tx(struct sge_qset *qs, uint32_t txmax)
|
|||
txq->txq_enqueued += count;
|
||||
m_vec[0] = NULL;
|
||||
}
|
||||
#if 0 /* !MULTIQ */
|
||||
if (__predict_false(err)) {
|
||||
if (err == ENOMEM) {
|
||||
ifp->if_drv_flags |= IFF_DRV_OACTIVE;
|
||||
IFQ_LOCK(&ifp->if_snd);
|
||||
IFQ_DRV_PREPEND(&ifp->if_snd, m_vec[0]);
|
||||
IFQ_UNLOCK(&ifp->if_snd);
|
||||
}
|
||||
}
|
||||
else if ((err == 0) && (txq->size <= txq->in_use + TX_MAX_DESC) &&
|
||||
(ifp->if_drv_flags & IFF_DRV_OACTIVE) == 0) {
|
||||
setbit(&qs->txq_stopped, TXQ_ETH);
|
||||
ifp->if_drv_flags |= IFF_DRV_OACTIVE;
|
||||
txq_fills++;
|
||||
err = ENOSPC;
|
||||
}
|
||||
#else
|
||||
if ((err == 0) && (txq->size <= txq->in_use + TX_MAX_DESC)) {
|
||||
err = ENOSPC;
|
||||
err = ENOBUFS;
|
||||
txq_fills++;
|
||||
setbit(&qs->txq_stopped, TXQ_ETH);
|
||||
ifp->if_drv_flags |= IFF_DRV_OACTIVE;
|
||||
}
|
||||
if (err == ENOMEM) {
|
||||
int i;
|
||||
|
|
@ -799,7 +659,6 @@ cxgb_tx(struct sge_qset *qs, uint32_t txmax)
|
|||
for (i = 0; i < count; i++)
|
||||
m_freem(m_vec[i]);
|
||||
}
|
||||
#endif
|
||||
return (err);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -26,8 +26,6 @@ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
|||
POSSIBILITY OF SUCH DAMAGE.
|
||||
|
||||
***************************************************************************/
|
||||
#define DEBUG_BUFRING
|
||||
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__FBSDID("$FreeBSD$");
|
||||
|
|
@ -86,9 +84,9 @@ extern int cxgb_pcpu_cache_enable;
|
|||
extern int nmbjumbo4;
|
||||
extern int nmbjumbo9;
|
||||
extern int nmbjumbo16;
|
||||
|
||||
|
||||
|
||||
extern int multiq_tx_enable;
|
||||
extern int coalesce_tx_enable;
|
||||
extern int wakeup_tx_thread;
|
||||
|
||||
#define USE_GTS 0
|
||||
|
||||
|
|
@ -1275,7 +1273,6 @@ t3_encap(struct sge_qset *qs, struct mbuf **m, int count)
|
|||
KASSERT(txsd->mi.mi_base == NULL,
|
||||
("overwriting valid entry mi_base==%p", txsd->mi.mi_base));
|
||||
if (count > 1) {
|
||||
panic("count > 1 not support in CVS\n");
|
||||
if ((err = busdma_map_sg_vec(m, &m0, segs, count)))
|
||||
return (err);
|
||||
nsegs = count;
|
||||
|
|
@ -1286,7 +1283,7 @@ t3_encap(struct sge_qset *qs, struct mbuf **m, int count)
|
|||
}
|
||||
KASSERT(m0->m_pkthdr.len, ("empty packet nsegs=%d count=%d", nsegs, count));
|
||||
|
||||
if (!(m0->m_pkthdr.len <= PIO_LEN)) {
|
||||
if ((m0->m_pkthdr.len > PIO_LEN) || (count > 1)) {
|
||||
mi_collapse_mbuf(&txsd->mi, m0);
|
||||
mi = &txsd->mi;
|
||||
}
|
||||
|
|
@ -1718,9 +1715,15 @@ t3_free_qset(adapter_t *sc, struct sge_qset *q)
|
|||
|
||||
t3_free_tx_desc_all(&q->txq[TXQ_ETH]);
|
||||
|
||||
for (i = 0; i < SGE_TXQ_PER_SET; i++)
|
||||
for (i = 0; i < SGE_TXQ_PER_SET; i++) {
|
||||
if (q->txq[i].txq_mr != NULL)
|
||||
buf_ring_free(q->txq[i].txq_mr, M_DEVBUF);
|
||||
if (q->txq[i].txq_ifq != NULL) {
|
||||
ifq_detach(q->txq[i].txq_ifq);
|
||||
free(q->txq[i].txq_ifq, M_DEVBUF);
|
||||
}
|
||||
}
|
||||
|
||||
for (i = 0; i < SGE_RXQ_PER_SET; ++i) {
|
||||
if (q->fl[i].desc) {
|
||||
mtx_lock_spin(&sc->sge.reg_lock);
|
||||
|
|
@ -1882,19 +1885,16 @@ t3_free_tx_desc(struct sge_txq *q, int reclaimable)
|
|||
bus_dmamap_unload(q->entry_tag, txsd->map);
|
||||
txsd->flags &= ~TX_SW_DESC_MAPPED;
|
||||
}
|
||||
m_freem_iovec(&txsd->mi);
|
||||
m_freem_iovec(&txsd->mi);
|
||||
#if 0
|
||||
buf_ring_scan(&q->txq_mr, txsd->mi.mi_base, __FILE__, __LINE__);
|
||||
#endif
|
||||
txsd->mi.mi_base = NULL;
|
||||
/*
|
||||
* XXX check for cache hit rate here
|
||||
*
|
||||
*/
|
||||
q->port->ifp->if_opackets++;
|
||||
#if defined(DIAGNOSTIC) && 0
|
||||
if (m_get_priority(txsd->m[0]) != cidx)
|
||||
printf("pri=%d cidx=%d\n",
|
||||
(int)m_get_priority(txsd->m[0]), cidx);
|
||||
#endif
|
||||
|
||||
} else
|
||||
q->txq_skipped++;
|
||||
|
||||
|
|
@ -2288,11 +2288,16 @@ t3_sge_alloc_qset(adapter_t *sc, u_int id, int nports, int irq_vec_idx,
|
|||
device_printf(sc->dev, "failed to allocate mbuf ring\n");
|
||||
goto err;
|
||||
}
|
||||
if ((q->txq[i].txq_ifq =
|
||||
malloc(sizeof(struct ifaltq), M_DEVBUF, M_NOWAIT|M_ZERO))
|
||||
== NULL) {
|
||||
device_printf(sc->dev, "failed to allocate ifq\n");
|
||||
goto err;
|
||||
}
|
||||
ifq_attach(q->txq[i].txq_ifq, pi->ifp);
|
||||
}
|
||||
|
||||
init_qset_cntxt(q, id);
|
||||
q->idx = id;
|
||||
|
||||
if ((ret = alloc_ring(sc, p->fl_size, sizeof(struct rx_desc),
|
||||
sizeof(struct rx_sw_desc), &q->fl[0].phys_addr,
|
||||
&q->fl[0].desc, &q->fl[0].sdesc,
|
||||
|
|
@ -2880,7 +2885,7 @@ process_responses(adapter_t *adap, struct sge_qset *qs, int budget)
|
|||
eop = get_packet(adap, drop_thresh, qs, &rspq->rspq_mbuf, r);
|
||||
#endif
|
||||
#ifdef IFNET_MULTIQUEUE
|
||||
rspq->rspq_mh.mh_head->m_pkthdr.rss_hash = rss_hash;
|
||||
rspq->rspq_mh.mh_head->m_pkthdr.flowid = rss_hash;
|
||||
#endif
|
||||
ethpad = 2;
|
||||
} else {
|
||||
|
|
@ -3364,6 +3369,18 @@ t3_add_attach_sysctls(adapter_t *sc)
|
|||
"pcpu_cache_enable",
|
||||
CTLFLAG_RW, &cxgb_pcpu_cache_enable,
|
||||
0, "#enable driver local pcpu caches");
|
||||
SYSCTL_ADD_INT(ctx, children, OID_AUTO,
|
||||
"multiq_tx_enable",
|
||||
CTLFLAG_RW, &multiq_tx_enable,
|
||||
0, "enable transmit by multiple tx queues");
|
||||
SYSCTL_ADD_INT(ctx, children, OID_AUTO,
|
||||
"coalesce_tx_enable",
|
||||
CTLFLAG_RW, &coalesce_tx_enable,
|
||||
0, "coalesce small packets in work requests - WARNING ALPHA");
|
||||
SYSCTL_ADD_INT(ctx, children, OID_AUTO,
|
||||
"wakeup_tx_thread",
|
||||
CTLFLAG_RW, &wakeup_tx_thread,
|
||||
0, "wakeup tx thread if no transmitter running");
|
||||
SYSCTL_ADD_INT(ctx, children, OID_AUTO,
|
||||
"cache_alloc",
|
||||
CTLFLAG_RD, &cxgb_cached_allocations,
|
||||
|
|
|
|||
Loading…
Reference in a new issue