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Add support for writing to mapping high memory for pccard memory

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windows.  Right now we only support pci chips that are memory mapped.
These are the most common bridges in use today and will help a large
majority of the users.

I/O mapped PCI chips support this functionality in a different way, as
do some of the ISA bridges (but only when mounted on a motherboard).
These chips are not supported by this change.
This commit is contained in:
Warner Losh 2002-07-20 22:29:23 +00:00
parent 40eab1e944
commit 9f977fb187
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=100417
4 changed files with 21 additions and 0 deletions
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7
sys/pccard/i82365.h
View file

@ -104,6 +104,13 @@
#define PCIC_TIME_CMD1 0x3e
#define PCIC_TIME_RECOV1 0x3f
/* Yenta only registers */
#define PCIC_MEMORY_HIGH0 0x40 /* A31..A25 of mapping addres for */
#define PCIC_MEMORY_HIGH1 0x41 /* the memory windows. */
#define PCIC_MEMORY_HIGH2 0x42
#define PCIC_MEMORY_HIGH3 0x43
#define PCIC_SLOT_SIZE 0x40 /* Size of register set for one slot */
/* Now register bits, ordered by reg # */

11
sys/pccard/pcic.c
View file

@ -223,14 +223,25 @@ pcic_memory(struct slot *slt, int win)
}
if (mp->flags & MDF_ACTIVE) {
unsigned long sys_addr = (uintptr_t)(void *)mp->start >> 12;
if ((sys_addr >> 12) != 0 &&
(sp->sc->flags & PCIC_YENTA_HIGH_MEMORY) == 0) {
printf("This pcic does not support mapping > 24M\n");
return (ENXIO);
}
/*
* Write the addresses, card offsets and length.
* The values are all stored as the upper 12 bits of the
* 24 bit address i.e everything is allocated as 4 Kb chunks.
* Memory mapped cardbus bridges extend this slightly to allow
* one to set the upper 8 bits of the 32bit address as well.
* If the chip supports it, then go ahead and write those
* upper 8 bits.
*/
pcic_putw(sp, reg, sys_addr & 0xFFF);
pcic_putw(sp, reg+2, (sys_addr + (mp->size >> 12) - 1) & 0xFFF);
pcic_putw(sp, reg+4, ((mp->card >> 12) - sys_addr) & 0x3FFF);
if (sp->sc->flags & PCIC_YENTA_HIGH_MEMORY)
sp->putb(sp, PCIC_MEMORY_HIGH0 + win, sys_addr >> 12);
/*
* Each 16 bit register has some flags in the upper bits.
*/

2
sys/pccard/pcic_pci.c
View file

@ -1269,6 +1269,8 @@ pcic_pci_attach(device_t dev)
sp->revision = 0;
sc->flags = PCIC_CARDBUS_POWER;
}
/* All memory mapped cardbus bridges have these registers */
sc->flags |= PCIC_YENTA_HIGH_MEMORY;
sp->slt = (struct slot *) 1;
sc->csc_route = pcic_intr_path;
sc->func_route = pcic_intr_path;

1
sys/pccard/pcicvar.h
View file

@ -52,6 +52,7 @@ struct pcic_softc
#define PCIC_KING_POWER 0x00000010 /* Uses IBM KING regs */
#define PCIC_RICOH_POWER 0x00000020 /* Uses the ricoh power regs */
#define PCIC_CARDBUS_POWER 0x00000040 /* Cardbus power regs */
#define PCIC_YENTA_HIGH_MEMORY 0x0080 /* Can do high memory mapping */
enum pcic_intr_way csc_route; /* How to route csc interrupts */
enum pcic_intr_way func_route; /* How to route function ints */