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arm64: Enable FEAT_E0PD when supported
FEAT_E0PD adds two fields to the tcr_el1 special register that, when set, cause userspace access to either the top or bottom half of the address spaces without a page walk. This can be used to stop userspace probing the kernel address space as the CPU will raise an exception in the same time if the probed address is in the TLB or not. Reviewed by: kevans Sponsored by: Arm Ltd Differential Revision: https://reviews.freebsd.org/D41760
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@ -2259,6 +2259,31 @@ cpu_features_sysinit(void *dummy __unused)
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/* Log features before APs are released and start printing to the dmesg. */
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SYSINIT(cpu_features, SI_SUB_SMP - 1, SI_ORDER_ANY, cpu_features_sysinit, NULL);
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static void
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tcr_set_e0pd1(void *arg __unused)
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{
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uint64_t tcr;
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tcr = READ_SPECIALREG(tcr_el1);
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tcr |= TCR_E0PD1;
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WRITE_SPECIALREG(tcr_el1, tcr);
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isb();
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}
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/* Enable support for more recent architecture features */
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static void
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cpu_feat_support(void *arg __unused)
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{
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/*
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* If FEAT_E0PD is supported use it to cause faults without a page
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* table walk if userspace tries to access kernel memory.
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*/
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if (ID_AA64MMFR2_E0PD_VAL(kern_cpu_desc.id_aa64mmfr2) !=
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ID_AA64MMFR2_E0PD_NONE)
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smp_rendezvous(NULL, tcr_set_e0pd1, NULL, NULL);
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}
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SYSINIT(cpu_feat_support, SI_SUB_SMP, SI_ORDER_ANY, cpu_feat_support, NULL);
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#ifdef COMPAT_FREEBSD32
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static u_long
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parse_cpu_features_hwcap32(void)
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