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ncr.c:
New config option "NCR_IOMAPPED" makes the driver use port I/O. Put back in 53c815 defines, submitted by Mikael Hybsch <micke@dynas.se>. These had got lost between cvs rev. 1.14 and now ... pci.c: Really write config space register. Assign ports starting at 0xbc00. Submitted by: wolf Reviewed by: se
This commit is contained in:
Stefan Eßer
parent
628e3e3401
commit
9ddf96998e
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=6401
3 changed files with 59 additions and 13 deletions
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@ -1,6 +1,6 @@
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/**************************************************************************
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**
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** $Id: pci.c,v 1.12 1995/02/09 20:20:33 se Exp $
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** $Id: pci.c,v 1.9 1994/11/02 23:47:13 se Exp $
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**
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** General subroutines for the PCI bus on 80*86 systems.
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** pci_configure ()
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@ -124,7 +124,7 @@ static vm_offset_t pci_paddr = PCI_PMEM_START;
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*/
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#ifndef PCI_PORT_START
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#define PCI_PORT_START 0x0400
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#define PCI_PORT_START 0xbc00
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#endif
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static u_short pci_ioaddr = PCI_PORT_START;
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@ -483,6 +483,12 @@ int pci_map_port (pcici_t tag, u_long reg, u_short* pa)
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(unsigned) reg, (unsigned) pci_ioaddr, (unsigned) size);
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#endif
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/*
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** set device address
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*/
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pcibus.pb_write (tag, reg, (u_long) pci_ioaddr);
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/*
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** return them to the driver
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*/
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@ -1,6 +1,6 @@
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/**************************************************************************
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**
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** $Id: ncr.c,v 1.21 1995/02/14 06:20:03 phk Exp $
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** $Id: ncr.c,v 1.22 1995/02/14 22:48:01 se Exp $
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**
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** Device driver for the NCR 53C810 PCI-SCSI-Controller.
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**
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@ -44,7 +44,7 @@
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***************************************************************************
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*/
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#define NCR_PATCHLEVEL "pl12 95/02/09"
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#define NCR_PATCHLEVEL "pl13 95/02/09"
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#define NCR_VERSION (2)
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#define MAX_UNITS (16)
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@ -244,6 +244,18 @@
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**==========================================================
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*/
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#ifdef NCR_IOMAPPED
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#define INB(r) inb (np->port + offsetof(struct ncr_reg, r))
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#define INW(r) inw (np->port + offsetof(struct ncr_reg, r))
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#define INL(r) inl (np->port + offsetof(struct ncr_reg, r))
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#define OUTB(r, val) outb (np->port+offsetof(struct ncr_reg,r),(val))
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#define OUTW(r, val) outw (np->port+offsetof(struct ncr_reg,r),(val))
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#define OUTL(r, val) outl (np->port+offsetof(struct ncr_reg,r),(val))
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#else
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#define INB(r) (np->reg->r)
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#define INW(r) (np->reg->r)
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#define INL(r) (np->reg->r)
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@ -252,6 +264,8 @@
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#define OUTW(r, val) np->reg->r = val
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#define OUTL(r, val) np->reg->r = val
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#endif
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/*==========================================================
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**
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** Command control block states.
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@ -1079,6 +1093,7 @@ struct ncb {
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** lockout of execption handler call while starting command.
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*/
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u_char lock;
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u_short port;
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};
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/*==========================================================
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@ -1228,7 +1243,7 @@ static void ncr_attach (pcici_t tag, int unit);
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static char ident[] =
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"\n$Id: ncr.c,v 1.21 1995/02/14 06:20:03 phk Exp $\n";
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"\n$Id: ncr.c,v 1.22 1995/02/14 22:48:01 se Exp $\n";
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u_long ncr_version = NCR_VERSION
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+ (u_long) sizeof (struct ncb)
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@ -1264,6 +1279,7 @@ static u_char rs_cmd [6] =
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*/
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#define NCR_810_ID (0x00011000ul)
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#define NCR_815_ID (0x00041000ul)
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#define NCR_825_ID (0x00031000ul)
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#ifdef __NetBSD__
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@ -3133,6 +3149,7 @@ ncr_probe(parent, self, aux)
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if (!pci_targmatch(cf, pa))
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return 0;
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if (pa->pa_id != NCR_810_ID &&
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pa->pa_id != NCR_815_ID &&
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pa->pa_id != NCR_825_ID)
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return 0;
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@ -3149,6 +3166,9 @@ static char* ncr_probe (pcici_t tag, pcidi_t type)
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case NCR_810_ID:
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return ("ncr 53c810 scsi");
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case NCR_815_ID:
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return ("ncr 53c815 scsi");
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case NCR_825_ID:
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return ("ncr 53c825 wide scsi");
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}
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@ -3241,12 +3261,17 @@ static void ncr_attach (pcici_t config_id, int unit)
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** devices bus master ability.
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**
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** DISABLEs:
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** response to io addresses.
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** response to io addresses (unless IOMAPPED)
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** usage of "Write and invalidate" cycles.
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*/
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#ifdef NCR_IOMAPPED
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(void) pci_conf_write (config_id, PCI_COMMAND_STATUS_REG,
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PCI_COMMAND_IO_ENABLE|PCI_COMMAND_MEM_ENABLE|PCI_COMMAND_MASTER_ENABLE);
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#else
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(void) pci_conf_write (config_id, PCI_COMMAND_STATUS_REG,
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PCI_COMMAND_MEM_ENABLE|PCI_COMMAND_MASTER_ENABLE);
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#endif
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/*
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** Try to map the controller chip to
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@ -3256,6 +3281,15 @@ static void ncr_attach (pcici_t config_id, int unit)
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if (!pci_map_mem (config_id, 0x14, &np->vaddr, &np->paddr))
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return;
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#ifdef NCR_IOMAPPED
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/*
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** Try to map the controller chip into iospace.
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*/
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if (!pci_map_port (config_id, 0x10, &np->port))
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return;
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#endif
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#endif /* !__NetBSD__ */
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/*
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@ -3267,12 +3301,12 @@ static void ncr_attach (pcici_t config_id, int unit)
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#else
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switch (pci_conf_read (config_id, PCI_ID_REG)) {
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#endif
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case NCR_810_ID:
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np->maxwide = 0;
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break;
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case NCR_825_ID:
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np->maxwide = 1;
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break;
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default:
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np->maxwide = 0;
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break;
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}
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/*
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@ -6396,10 +6430,10 @@ static int ncr_scatter
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**==========================================================
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*/
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#ifndef NCR_IOMAPPED
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static int ncr_regtest (struct ncb* np)
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{
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register volatile u_long data, *addr;
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#ifndef NCR_IOMAPPED
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/*
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** ncr registers may NOT be cached.
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** write 0xffffffff to a read only register area,
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@ -6419,8 +6453,8 @@ static int ncr_regtest (struct ncb* np)
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return (0x10);
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};
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return (0);
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#endif
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}
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#endif
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static int ncr_snooptest (struct ncb* np)
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{
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@ -1,6 +1,6 @@
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/**************************************************************************
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**
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** $Id: pci.c,v 1.12 1995/02/09 20:20:33 se Exp $
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** $Id: pci.c,v 1.9 1994/11/02 23:47:13 se Exp $
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**
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** General subroutines for the PCI bus on 80*86 systems.
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** pci_configure ()
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@ -124,7 +124,7 @@ static vm_offset_t pci_paddr = PCI_PMEM_START;
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*/
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#ifndef PCI_PORT_START
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#define PCI_PORT_START 0x0400
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#define PCI_PORT_START 0xbc00
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#endif
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static u_short pci_ioaddr = PCI_PORT_START;
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@ -483,6 +483,12 @@ int pci_map_port (pcici_t tag, u_long reg, u_short* pa)
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(unsigned) reg, (unsigned) pci_ioaddr, (unsigned) size);
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#endif
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/*
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** set device address
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*/
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pcibus.pb_write (tag, reg, (u_long) pci_ioaddr);
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/*
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** return them to the driver
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*/
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