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Add the puc (PCI "Universal" Communications) driver. The idea and some of
the structure definitions come from NetBSD to make it easier to share card definitions. The driver only acts as a shim between the pci bus and the sio driver. Later pci parallel ports could also be supported through this driver. Support for most single and multiport pci serial cards should be as simple as adding its definition to pucdata.c Tested with the following pci cards: Moxa Industio CP-114, 4 port RS-232,RS-422/485 Syba Tech Ltd. PCI-4S2P-550-ECP, 4 port RS-232 + 2 parallel ports Netmos NM9835 PCI-2S-550, 2 port RS-232
This commit is contained in:
John Hay
parent
8e7cf3debf
commit
9c564b6c92
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=90731
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@ -131,6 +131,7 @@ MAN= aac.4 \
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psm.4 \
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pt.4 \
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pty.4 \
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puc.4 \
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random.4 \
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rl.4 \
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route.4 \
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68
share/man/man4/puc.4
Normal file
68
share/man/man4/puc.4
Normal file
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@ -0,0 +1,68 @@
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.\" Copyright (c) 2002 John Hay.
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.\" All rights reserved.
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.\"
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.\" Redistribution and use in source and binary forms, with or without
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.\" modification, are permitted provided that the following conditions
|
||||
.\" are met:
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||||
.\" 1. Redistributions of source code must retain the above copyright
|
||||
.\" notice, this list of conditions and the following disclaimer.
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||||
.\" 2. Redistributions in binary form must reproduce the above copyright
|
||||
.\" notice, this list of conditions and the following disclaimer in the
|
||||
.\" documentation and/or other materials provided with the distribution.
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.\"
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.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
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.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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.\" SUCH DAMAGE.
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.\"
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.\" $FreeBSD$
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.\"
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.Dd February 7, 2002
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.Dt PUC 4
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.Os
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.Sh NAME
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.Nm puc
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.Nd PCI ``Universal'' Communications driver
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.Sh SYNOPSIS
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.Cd device pci
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.Cd device puc
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.Cd device sio
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.Cd options PUC_FASTINTR
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.Sh DESCRIPTION
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This driver acts as a shim to connect pci serial ports to the
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.Xr sio 4
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driver.
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.Pp
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The list of supported devices is in
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.Em src/sys/dev/puc/pucdata.c.
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Support for new cards should be added there.
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.Pp
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If the PUC_FASTINTR option is used the driver will try to use fast interrupts.
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This should lower the interrupt latency and should be used if the
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.Xr sio 4
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driver reports
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.Em silo overflow
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errors.
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It cannot be used if the interrupt is shared.
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.Sh SEE ALSO
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.Xr sio 4
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.Sh HISTORY
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This driver took the idea from the
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.Nx
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.Xr puc 4
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driver and still use the same structure to describe cards to ease exchanging
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card info.
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.Sh BUGS
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Only serial ports are supported through the
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.Xr sio 4
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driver at the moment.
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Someone should write support for parallel ports using the
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.Xr lpt 4
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driver.
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@ -1700,6 +1700,17 @@ options COM_MULTIPORT #code for some cards with shared IRQs
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# 0x20000 enable hardware RTS/CTS and larger FIFOs. Only works for
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# ST16650A-compatible UARTs.
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# PCI Universal Communications driver
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# Supports various single and multi port PCI serial cards. Maybe later
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# also the parallel ports on combination serial/parallel cards. New cards
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# can be added in srs/sys/dev/pucdata.c.
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#
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# If the PUC_FASTINTR option is used the driver will try to use fast
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# interrupts. The card must then be the only user of that interrupt.
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# Interrupts cannot be shared when using PUC_FASTINTR.
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device puc
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options PUC_FASTINTR
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#
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# Network interfaces:
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#
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@ -115,6 +115,8 @@ dev/kbd/kbd.c optional sc
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dev/kbd/kbd.c optional ukbd
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dev/kbd/kbd.c optional vt
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dev/lnc/if_lnc_isa.c optional lnc isa
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dev/puc/puc.c optional puc
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dev/puc/pucdata.c optional puc
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dev/sbni/if_sbni.c optional sbni
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dev/sbni/if_sbni_isa.c optional sbni isa
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dev/sbni/if_sbni_pci.c optional sbni pci
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@ -123,6 +125,7 @@ dev/sio/sio_isa.c optional sio isa
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dev/sio/sio_pccard.c optional sio card
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dev/sio/sio_pccard.c optional sio pccard
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dev/sio/sio_pci.c optional sio pci
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dev/sio/sio_puc.c optional sio puc
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dev/sr/if_sr_isa.c optional sr isa
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dev/syscons/apm/apm_saver.c optional apm_saver apm
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dev/syscons/schistory.c count sc
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@ -107,6 +107,8 @@ PSM_HOOKRESUME opt_psm.h
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PSM_RESETAFTERSUSPEND opt_psm.h
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PSM_DEBUG opt_psm.h
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PUC_FASTINTR opt_puc.h
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ATKBD_DFLT_KEYMAP opt_atkbd.h
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KBD_DISABLE_KEYMAP_LOAD opt_kbd.h
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708
sys/dev/puc/puc.c
Normal file
708
sys/dev/puc/puc.c
Normal file
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@ -0,0 +1,708 @@
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/* $NetBSD: puc.c,v 1.7 2000/07/29 17:43:38 jlam Exp $ */
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/*-
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* Copyright (c) 2002 JF Hay. All rights reserved.
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* Copyright (c) 2000 M. Warner Losh. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice unmodified, this list of conditions, and the following
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* disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Copyright (c) 1996, 1998, 1999
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* Christopher G. Demetriou. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Christopher G. Demetriou
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* for the NetBSD Project.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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/*
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* PCI "universal" communication card device driver, glues com, lpt,
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* and similar ports to PCI via bridge chip often much larger than
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* the devices being glued.
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*
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* Author: Christopher G. Demetriou, May 14, 1998 (derived from NetBSD
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* sys/dev/pci/pciide.c, revision 1.6).
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*
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* These devices could be (and some times are) described as
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* communications/{serial,parallel}, etc. devices with known
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* programming interfaces, but those programming interfaces (in
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* particular the BAR assignments for devices, etc.) in fact are not
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* particularly well defined.
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*
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* After I/we have seen more of these devices, it may be possible
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* to generalize some of these bits. In particular, devices which
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* describe themselves as communications/serial/16[45]50, and
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* communications/parallel/??? might be attached via direct
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* 'com' and 'lpt' attachments to pci.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/bus.h>
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#include <sys/conf.h>
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#include <sys/malloc.h>
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#include <machine/bus.h>
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#include <machine/resource.h>
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#include <sys/rman.h>
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#if __FreeBSD_version < 500000
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#include <pci/pcireg.h>
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#include <pci/pcivar.h>
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#else
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#endif
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#include <dev/puc/pucvar.h>
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#include <opt_puc.h>
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struct puc_softc {
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const struct puc_device_description *sc_desc;
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/* card-global dynamic data */
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int barmuxed;
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int irqrid;
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struct resource *irqres;
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void *intr_cookie;
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struct {
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struct resource *res;
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} sc_bar_mappings[PUC_MAX_BAR];
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/* per-port dynamic data */
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struct {
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struct device *dev;
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/* filled in by bus_setup_intr() */
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void (*ihand) __P((void *));
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void *ihandarg;
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} sc_ports[PUC_MAX_PORTS];
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};
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struct puc_device {
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struct resource_list resources;
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u_int serialfreq;
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};
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static int puc_pci_probe(device_t dev);
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static int puc_pci_attach(device_t dev);
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static void puc_intr(void *arg);
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static struct resource *puc_alloc_resource(device_t, device_t, int, int *,
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u_long, u_long, u_long, u_int);
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static int puc_release_resource(device_t, device_t, int, int,
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struct resource *);
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static int puc_get_resource(device_t, device_t, int, int, u_long *, u_long *);
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static int puc_setup_intr(device_t, device_t, struct resource *, int,
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void (*)(void *), void *, void **);
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static int puc_teardown_intr(device_t, device_t, struct resource *,
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void *);
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static int puc_read_ivar(device_t, device_t, int, uintptr_t *);
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static const struct puc_device_description *puc_find_description(uint32_t,
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uint32_t, uint32_t, uint32_t);
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static void puc_config_superio(device_t);
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static void puc_config_win877(struct resource *);
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static int puc_find_free_unit(char *);
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#ifdef PUC_DEBUG
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static void puc_print_win877(bus_space_tag_t, bus_space_handle_t, u_int,
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u_int);
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static void puc_print_resource_list(struct resource_list *);
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#endif
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static int
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puc_pci_probe(device_t dev)
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{
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uint32_t v1, v2, d1, d2;
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const struct puc_device_description *desc;
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if (pci_read_config(dev, PCIR_HEADERTYPE, 1) != 0)
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return (ENXIO);
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v1 = pci_read_config(dev, PCIR_VENDOR, 2);
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d1 = pci_read_config(dev, PCIR_DEVICE, 2);
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v2 = pci_read_config(dev, PCIR_SUBVEND_0, 2);
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d2 = pci_read_config(dev, PCIR_SUBDEV_0, 2);
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desc = puc_find_description(v1, d1, v2, d2);
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if (desc == NULL)
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return (ENXIO);
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device_set_desc(dev, desc->name);
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return (0);
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}
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static int
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puc_pci_attach(device_t dev)
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{
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char *typestr;
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int bidx, childunit, i, irq_setup, rid;
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uint32_t v1, v2, d1, d2;
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struct puc_softc *sc;
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struct puc_device *pdev;
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struct resource *res;
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struct resource_list_entry *rle;
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sc = (struct puc_softc *)device_get_softc(dev);
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bzero(sc, sizeof(*sc));
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v1 = pci_read_config(dev, PCIR_VENDOR, 2);
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d1 = pci_read_config(dev, PCIR_DEVICE, 2);
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v2 = pci_read_config(dev, PCIR_SUBVEND_0, 2);
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d2 = pci_read_config(dev, PCIR_SUBDEV_0, 2);
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sc->sc_desc = puc_find_description(v1, d1, v2, d2);
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if (sc->sc_desc == NULL)
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return (ENXIO);
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#ifdef PUC_DEBUG
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bootverbose = 1;
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printf("puc: name: %s\n", sc->sc_desc->name);
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#endif
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rid = 0;
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res = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0, ~0, 1,
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RF_ACTIVE | RF_SHAREABLE);
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if (!res)
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return (ENXIO);
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sc->irqres = res;
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sc->irqrid = rid;
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#ifdef PUC_FASTINTR
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irq_setup = BUS_SETUP_INTR(device_get_parent(dev), dev, res,
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INTR_TYPE_TTY | INTR_FAST, puc_intr, sc, &sc->intr_cookie);
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#else
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irq_setup = ENXIO;
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#endif
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if (irq_setup != 0)
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irq_setup = BUS_SETUP_INTR(device_get_parent(dev), dev, res,
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INTR_TYPE_TTY, puc_intr, sc, &sc->intr_cookie);
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if (irq_setup != 0)
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return (ENXIO);
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rid = 0;
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for (i = 0; PUC_PORT_VALID(sc->sc_desc, i); i++) {
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if (rid == sc->sc_desc->ports[i].bar)
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sc->barmuxed = 1;
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rid = sc->sc_desc->ports[i].bar;
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bidx = PUC_PORT_BAR_INDEX(rid);
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if (sc->sc_bar_mappings[bidx].res != NULL)
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continue;
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res = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
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0ul, ~0ul, 1, RF_ACTIVE);
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if (res == NULL) {
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printf("could not get resource\n");
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continue;
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}
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sc->sc_bar_mappings[bidx].res = res;
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#ifdef PUC_DEBUG
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printf("port bst %x, start %x, end %x\n",
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(u_int)rman_get_bustag(res), (u_int)rman_get_start(res),
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(u_int)rman_get_end(res));
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#endif
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}
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puc_config_superio(dev);
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for (i = 0; PUC_PORT_VALID(sc->sc_desc, i); i++) {
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rid = sc->sc_desc->ports[i].bar;
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bidx = PUC_PORT_BAR_INDEX(rid);
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if (sc->sc_bar_mappings[bidx].res == NULL)
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continue;
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switch (sc->sc_desc->ports[i].type) {
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case PUC_PORT_TYPE_COM:
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typestr = "sio";
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break;
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default:
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continue;
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}
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pdev = malloc(sizeof(struct puc_device), M_DEVBUF,
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M_NOWAIT | M_ZERO);
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if (!pdev)
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continue;
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resource_list_init(&pdev->resources);
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/* First fake up an IRQ resource. */
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resource_list_add(&pdev->resources, SYS_RES_IRQ, 0,
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rman_get_start(sc->irqres), rman_get_end(sc->irqres),
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rman_get_end(sc->irqres) - rman_get_start(sc->irqres) + 1);
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rle = resource_list_find(&pdev->resources, SYS_RES_IRQ, 0);
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rle->res = sc->irqres;
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/* Now fake an IOPORT resource */
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res = sc->sc_bar_mappings[bidx].res;
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resource_list_add(&pdev->resources, SYS_RES_IOPORT, 0,
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rman_get_start(res) + sc->sc_desc->ports[i].offset,
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rman_get_end(res) + sc->sc_desc->ports[i].offset + 8 - 1,
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8);
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rle = resource_list_find(&pdev->resources, SYS_RES_IOPORT, 0);
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if (sc->barmuxed == 0) {
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rle->res = sc->sc_bar_mappings[bidx].res;
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} else {
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rle->res = malloc(sizeof(struct resource), M_DEVBUF,
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||||
M_WAITOK | M_ZERO);
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if (rle->res == NULL)
|
||||
return (ENOMEM);
|
||||
|
||||
rle->res->r_start = rman_get_start(res) +
|
||||
sc->sc_desc->ports[i].offset;
|
||||
rle->res->r_end = rle->res->r_start + 8 - 1;
|
||||
rle->res->r_bustag = rman_get_bustag(res);
|
||||
bus_space_subregion(rle->res->r_bustag,
|
||||
rman_get_bushandle(res),
|
||||
sc->sc_desc->ports[i].offset, 8,
|
||||
&rle->res->r_bushandle);
|
||||
}
|
||||
|
||||
pdev->serialfreq = sc->sc_desc->ports[i].serialfreq;
|
||||
|
||||
childunit = puc_find_free_unit(typestr);
|
||||
sc->sc_ports[i].dev = device_add_child(dev, typestr, childunit);
|
||||
if (sc->sc_ports[i].dev == NULL)
|
||||
continue;
|
||||
device_set_ivars(sc->sc_ports[i].dev, pdev);
|
||||
device_set_desc(sc->sc_ports[i].dev, sc->sc_desc->name);
|
||||
if (!bootverbose)
|
||||
device_quiet(sc->sc_ports[i].dev);
|
||||
#ifdef PUC_DEBUG
|
||||
printf("puc: type %d, bar %x, offset %x\n",
|
||||
sc->sc_desc->ports[i].type,
|
||||
sc->sc_desc->ports[i].bar,
|
||||
sc->sc_desc->ports[i].offset);
|
||||
print_resource_list(&pdev->resources);
|
||||
#endif
|
||||
device_probe_and_attach(sc->sc_ports[i].dev);
|
||||
}
|
||||
|
||||
#ifdef PUC_DEBUG
|
||||
bootverbose = 0;
|
||||
#endif
|
||||
return (0);
|
||||
}
|
||||
|
||||
/*
|
||||
* This is just an brute force interrupt handler. It just calls all the
|
||||
* registered handlers sequencially.
|
||||
*
|
||||
* Later on we should maybe have a different handler for boards that can
|
||||
* tell us which device generated the interrupt.
|
||||
*/
|
||||
static void
|
||||
puc_intr(void *arg)
|
||||
{
|
||||
int i;
|
||||
struct puc_softc *sc;
|
||||
|
||||
sc = (struct puc_softc *)arg;
|
||||
for (i = 0; i < PUC_MAX_PORTS; i++)
|
||||
if (sc->sc_ports[i].ihand != NULL)
|
||||
(sc->sc_ports[i].ihand)(sc->sc_ports[i].ihandarg);
|
||||
}
|
||||
|
||||
static const struct puc_device_description *
|
||||
puc_find_description(uint32_t vend, uint32_t prod, uint32_t svend,
|
||||
uint32_t sprod)
|
||||
{
|
||||
int i;
|
||||
|
||||
#define checkreg(val, index) \
|
||||
(((val) & puc_devices[i].rmask[(index)]) == puc_devices[i].rval[(index)])
|
||||
|
||||
for (i = 0; puc_devices[i].name != NULL; i++) {
|
||||
if (checkreg(vend, PUC_REG_VEND) &&
|
||||
checkreg(prod, PUC_REG_PROD) &&
|
||||
checkreg(svend, PUC_REG_SVEND) &&
|
||||
checkreg(sprod, PUC_REG_SPROD))
|
||||
return (&puc_devices[i]);
|
||||
}
|
||||
|
||||
#undef checkreg
|
||||
|
||||
return (NULL);
|
||||
}
|
||||
|
||||
/*
|
||||
* It might be possible to make these more generic if we can detect patterns.
|
||||
* For instance maybe if the size of a bar is 0x400 (the old isa space) it
|
||||
* might contain one or more superio chips.
|
||||
*/
|
||||
static void
|
||||
puc_config_superio(device_t dev)
|
||||
{
|
||||
struct puc_softc *sc = (struct puc_softc *)device_get_softc(dev);
|
||||
|
||||
if (sc->sc_desc->rval[PUC_REG_VEND] == 0x1592 &&
|
||||
sc->sc_desc->rval[PUC_REG_PROD] == 0x0781)
|
||||
puc_config_win877(sc->sc_bar_mappings[0].res);
|
||||
}
|
||||
|
||||
#define rdspio(indx) (bus_space_write_1(bst, bsh, efir, indx), \
|
||||
bus_space_read_1(bst, bsh, efdr))
|
||||
#define wrspio(indx,data) (bus_space_write_1(bst, bsh, efir, indx), \
|
||||
bus_space_write_1(bst, bsh, efdr, data))
|
||||
|
||||
#ifdef PUC_DEBUG
|
||||
static void
|
||||
puc_print_win877(bus_space_tag_t bst, bus_space_handle_t bsh, u_int efir,
|
||||
u_int efdr)
|
||||
{
|
||||
u_char cr00, cr01, cr04, cr09, cr0d, cr14, cr15, cr16, cr17;
|
||||
u_char cr18, cr19, cr24, cr25, cr28, cr2c, cr31, cr32;
|
||||
|
||||
cr00 = rdspio(0x00);
|
||||
cr01 = rdspio(0x01);
|
||||
cr04 = rdspio(0x04);
|
||||
cr09 = rdspio(0x09);
|
||||
cr0d = rdspio(0x0d);
|
||||
cr14 = rdspio(0x14);
|
||||
cr15 = rdspio(0x15);
|
||||
cr16 = rdspio(0x16);
|
||||
cr17 = rdspio(0x17);
|
||||
cr18 = rdspio(0x18);
|
||||
cr19 = rdspio(0x19);
|
||||
cr24 = rdspio(0x24);
|
||||
cr25 = rdspio(0x25);
|
||||
cr28 = rdspio(0x28);
|
||||
cr2c = rdspio(0x2c);
|
||||
cr31 = rdspio(0x31);
|
||||
cr32 = rdspio(0x32);
|
||||
printf("877T: cr00 %x, cr01 %x, cr04 %x, cr09 %x, cr0d %x, cr14 %x, "
|
||||
"cr15 %x, cr16 %x, cr17 %x, cr18 %x, cr19 %x, cr24 %x, cr25 %x, "
|
||||
"cr28 %x, cr2c %x, cr31 %x, cr32 %x\n", cr00, cr01, cr04, cr09,
|
||||
cr0d, cr14, cr15, cr16, cr17,
|
||||
cr18, cr19, cr24, cr25, cr28, cr2c, cr31, cr32);
|
||||
}
|
||||
#endif
|
||||
|
||||
static void
|
||||
puc_config_win877(struct resource *res)
|
||||
{
|
||||
u_char val;
|
||||
u_int efir, efdr;
|
||||
bus_space_tag_t bst;
|
||||
bus_space_handle_t bsh;
|
||||
|
||||
bst = rman_get_bustag(res);
|
||||
bsh = rman_get_bushandle(res);
|
||||
|
||||
/* configure the first W83877TF */
|
||||
bus_space_write_1(bst, bsh, 0x250, 0x89);
|
||||
efir = 0x251;
|
||||
efdr = 0x252;
|
||||
val = rdspio(0x09) & 0x0f;
|
||||
if (val != 0x0c) {
|
||||
printf("conf_win877: Oops not a W83877TF\n");
|
||||
return;
|
||||
}
|
||||
|
||||
#ifdef PUC_DEBUG
|
||||
printf("before: ");
|
||||
puc_print_win877(bst, bsh, efir, efdr);
|
||||
#endif
|
||||
|
||||
val = rdspio(0x16);
|
||||
val |= 0x04;
|
||||
wrspio(0x16, val);
|
||||
val &= ~0x04;
|
||||
wrspio(0x16, val);
|
||||
|
||||
wrspio(0x24, 0x2e8 >> 2);
|
||||
wrspio(0x25, 0x2f8 >> 2);
|
||||
wrspio(0x17, 0x03);
|
||||
wrspio(0x28, 0x43);
|
||||
|
||||
#ifdef PUC_DEBUG
|
||||
printf("after: ");
|
||||
puc_print_win877(bst, bsh, efir, efdr);
|
||||
#endif
|
||||
|
||||
bus_space_write_1(bst, bsh, 0x250, 0xaa);
|
||||
|
||||
/* configure the second W83877TF */
|
||||
bus_space_write_1(bst, bsh, 0x3f0, 0x87);
|
||||
bus_space_write_1(bst, bsh, 0x3f0, 0x87);
|
||||
efir = 0x3f0;
|
||||
efdr = 0x3f1;
|
||||
val = rdspio(0x09) & 0x0f;
|
||||
if (val != 0x0c) {
|
||||
printf("conf_win877: Oops not a W83877TF\n");
|
||||
return;
|
||||
}
|
||||
|
||||
#ifdef PUC_DEBUG
|
||||
printf("before: ");
|
||||
puc_print_win877(bst, bsh, efir, efdr);
|
||||
#endif
|
||||
|
||||
val = rdspio(0x16);
|
||||
val |= 0x04;
|
||||
wrspio(0x16, val);
|
||||
val &= ~0x04;
|
||||
wrspio(0x16, val);
|
||||
|
||||
wrspio(0x24, 0x3e8 >> 2);
|
||||
wrspio(0x25, 0x3f8 >> 2);
|
||||
wrspio(0x17, 0x03);
|
||||
wrspio(0x28, 0x43);
|
||||
|
||||
#ifdef PUC_DEBUG
|
||||
printf("after: ");
|
||||
puc_print_win877(bst, bsh, efir, efdr);
|
||||
#endif
|
||||
|
||||
bus_space_write_1(bst, bsh, 0x3f0, 0xaa);
|
||||
}
|
||||
|
||||
#undef rdspio
|
||||
#undef wrspio
|
||||
|
||||
static int puc_find_free_unit(char *name)
|
||||
{
|
||||
devclass_t dc;
|
||||
int start;
|
||||
int unit;
|
||||
|
||||
unit = 0;
|
||||
start = 0;
|
||||
while (resource_int_value(name, unit, "port", &start) == 0 &&
|
||||
start > 0)
|
||||
unit++;
|
||||
dc = devclass_find(name);
|
||||
if (dc == NULL)
|
||||
return (-1);
|
||||
while (devclass_get_device(dc, unit))
|
||||
unit++;
|
||||
#ifdef PUC_DEBUG
|
||||
printf("puc: Using %s%d\n", name, unit);
|
||||
#endif
|
||||
return (unit);
|
||||
}
|
||||
|
||||
#ifdef PUC_DEBUG
|
||||
static void
|
||||
puc_print_resource_list(struct resource_list *rl)
|
||||
{
|
||||
struct resource_list_entry *rle;
|
||||
|
||||
printf("print_resource_list: rl %p\n", rl);
|
||||
SLIST_FOREACH(rle, rl, link)
|
||||
printf("type %x, rid %x\n", rle->type, rle->rid);
|
||||
printf("print_resource_list: end.\n");
|
||||
}
|
||||
#endif
|
||||
|
||||
/* XXX
|
||||
* This function should be part of the general bus_space_* functions. It
|
||||
* should also handle the PC98 case where bus_space_handle_t is a structure.
|
||||
*/
|
||||
int
|
||||
bus_space_subregion(bus_space_tag_t t, bus_space_handle_t h, bus_size_t offset,
|
||||
bus_size_t s, bus_space_handle_t *newhandle)
|
||||
{
|
||||
*newhandle = h + offset;
|
||||
return (0);
|
||||
}
|
||||
|
||||
static struct resource *
|
||||
puc_alloc_resource(device_t dev, device_t child, int type, int *rid,
|
||||
u_long start, u_long end, u_long count, u_int flags)
|
||||
{
|
||||
struct puc_device *pdev;
|
||||
struct resource *retval;
|
||||
struct resource_list *rl;
|
||||
struct resource_list_entry *rle;
|
||||
|
||||
pdev = device_get_ivars(child);
|
||||
rl = &pdev->resources;
|
||||
|
||||
#ifdef PUC_DEBUG
|
||||
printf("puc_alloc_resource: pdev %p, looking for t %x, r %x\n",
|
||||
pdev, type, *rid);
|
||||
puc_print_resource_list(rl);
|
||||
#endif
|
||||
retval = NULL;
|
||||
rle = resource_list_find(rl, type, *rid);
|
||||
if (rle) {
|
||||
start = rle->start;
|
||||
end = rle->end;
|
||||
count = rle->count;
|
||||
#ifdef PUC_DEBUG
|
||||
printf("found rle, %lx, %lx, %lx\n", start, end, count);
|
||||
#endif
|
||||
retval = rle->res;
|
||||
} else
|
||||
printf("oops rle is gone\n");
|
||||
|
||||
return (retval);
|
||||
}
|
||||
|
||||
static int
|
||||
puc_release_resource(device_t dev, device_t child, int type, int rid,
|
||||
struct resource *res)
|
||||
{
|
||||
return (0);
|
||||
}
|
||||
|
||||
static int
|
||||
puc_get_resource(device_t dev, device_t child, int type, int rid,
|
||||
u_long *startp, u_long *countp)
|
||||
{
|
||||
struct puc_device *pdev;
|
||||
struct resource_list *rl;
|
||||
struct resource_list_entry *rle;
|
||||
|
||||
pdev = device_get_ivars(child);
|
||||
rl = &pdev->resources;
|
||||
|
||||
#ifdef PUC_DEBUG
|
||||
printf("puc_get_resource: pdev %p, looking for t %x, r %x\n", pdev,
|
||||
type, rid);
|
||||
puc_print_resource_list(rl);
|
||||
#endif
|
||||
rle = resource_list_find(rl, type, rid);
|
||||
if (rle) {
|
||||
#ifdef PUC_DEBUG
|
||||
printf("found rle %p,", rle);
|
||||
#endif
|
||||
if (startp != NULL)
|
||||
*startp = rle->start;
|
||||
if (countp != NULL)
|
||||
*countp = rle->count;
|
||||
#ifdef PUC_DEBUG
|
||||
printf(" %lx, %lx\n", rle->start, rle->count);
|
||||
#endif
|
||||
return (0);
|
||||
} else
|
||||
printf("oops rle is gone\n");
|
||||
return (ENXIO);
|
||||
}
|
||||
|
||||
static int
|
||||
puc_setup_intr(device_t dev, device_t child, struct resource *r, int flags,
|
||||
void (*ihand)(void *), void *arg, void **cookiep)
|
||||
{
|
||||
int i;
|
||||
struct puc_softc *sc;
|
||||
|
||||
sc = (struct puc_softc *)device_get_softc(dev);
|
||||
for (i = 0; PUC_PORT_VALID(sc->sc_desc, i); i++) {
|
||||
if (sc->sc_ports[i].dev == child) {
|
||||
if (sc->sc_ports[i].ihand != 0)
|
||||
return (ENXIO);
|
||||
sc->sc_ports[i].ihand = ihand;
|
||||
sc->sc_ports[i].ihandarg = arg;
|
||||
*cookiep = arg;
|
||||
return (0);
|
||||
}
|
||||
}
|
||||
return (ENXIO);
|
||||
}
|
||||
|
||||
static int
|
||||
puc_teardown_intr(device_t dev, device_t child, struct resource *r,
|
||||
void *cookie)
|
||||
{
|
||||
int i;
|
||||
struct puc_softc *sc;
|
||||
|
||||
sc = (struct puc_softc *)device_get_softc(dev);
|
||||
for (i = 0; PUC_PORT_VALID(sc->sc_desc, i); i++) {
|
||||
if (sc->sc_ports[i].dev == child) {
|
||||
sc->sc_ports[i].ihand = NULL;
|
||||
sc->sc_ports[i].ihandarg = NULL;
|
||||
return (0);
|
||||
}
|
||||
}
|
||||
return (ENXIO);
|
||||
}
|
||||
|
||||
static int
|
||||
puc_read_ivar(device_t dev, device_t child, int index, uintptr_t *result)
|
||||
{
|
||||
struct puc_device *pdev;
|
||||
|
||||
pdev = device_get_ivars(child);
|
||||
if (pdev == NULL)
|
||||
return (ENOENT);
|
||||
|
||||
switch(index) {
|
||||
case PUC_IVAR_FREQ:
|
||||
*result = pdev->serialfreq;
|
||||
break;
|
||||
default:
|
||||
return (ENOENT);
|
||||
}
|
||||
return (0);
|
||||
}
|
||||
|
||||
static device_method_t puc_pci_methods[] = {
|
||||
/* Device interface */
|
||||
DEVMETHOD(device_probe, puc_pci_probe),
|
||||
DEVMETHOD(device_attach, puc_pci_attach),
|
||||
|
||||
DEVMETHOD(bus_alloc_resource, puc_alloc_resource),
|
||||
DEVMETHOD(bus_release_resource, puc_release_resource),
|
||||
DEVMETHOD(bus_get_resource, puc_get_resource),
|
||||
DEVMETHOD(bus_read_ivar, puc_read_ivar),
|
||||
DEVMETHOD(bus_setup_intr, puc_setup_intr),
|
||||
DEVMETHOD(bus_teardown_intr, puc_teardown_intr),
|
||||
DEVMETHOD(bus_print_child, bus_generic_print_child),
|
||||
DEVMETHOD(bus_driver_added, bus_generic_driver_added),
|
||||
{ 0, 0 }
|
||||
};
|
||||
|
||||
static driver_t puc_pci_driver = {
|
||||
"puc",
|
||||
puc_pci_methods,
|
||||
sizeof(struct puc_softc),
|
||||
};
|
||||
|
||||
static devclass_t puc_devclass;
|
||||
|
||||
DRIVER_MODULE(puc, pci, puc_pci_driver, puc_devclass, 0, 0);
|
||||
752
sys/dev/puc/pucdata.c
Normal file
752
sys/dev/puc/pucdata.c
Normal file
|
|
@ -0,0 +1,752 @@
|
|||
/* $NetBSD: pucdata.c,v 1.25 2001/12/16 22:23:01 thorpej Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 1998, 1999 Christopher G. Demetriou. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. All advertising materials mentioning features or use of this software
|
||||
* must display the following acknowledgement:
|
||||
* This product includes software developed by Christopher G. Demetriou
|
||||
* for the NetBSD Project.
|
||||
* 4. The name of the author may not be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
|
||||
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
||||
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
||||
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__FBSDID("$FreeBSD$");
|
||||
|
||||
/*
|
||||
* PCI "universal" communications card driver configuration data (used to
|
||||
* match/attach the cards).
|
||||
*/
|
||||
|
||||
#include <sys/param.h>
|
||||
|
||||
#if __FreeBSD_version < 500000
|
||||
#include <pci/pcireg.h>
|
||||
#include <pci/pcivar.h>
|
||||
#include <isa/sioreg.h>
|
||||
#else
|
||||
#include <dev/pci/pcireg.h>
|
||||
#include <dev/pci/pcivar.h>
|
||||
#include <dev/sio/sioreg.h>
|
||||
#endif
|
||||
#include <dev/puc/pucvar.h>
|
||||
|
||||
#define COM_FREQ DEFAULT_RCLK
|
||||
|
||||
const struct puc_device_description puc_devices[] = {
|
||||
/*
|
||||
* XXX no entry because I have no data:
|
||||
* XXX Dolphin Peripherals 4006 (single parallel)
|
||||
*/
|
||||
|
||||
/*
|
||||
* Dolphin Peripherals 4014 (dual parallel port) card. PLX 9050, with
|
||||
* a seemingly-lame EEPROM setup that puts the Dolphin IDs
|
||||
* into the subsystem fields, and claims that it's a
|
||||
* network/misc (0x02/0x80) device.
|
||||
*/
|
||||
{ "Dolphin Peripherals 4014",
|
||||
{ 0x10b5, 0x9050, 0xd84d, 0x6810 },
|
||||
{ 0xffff, 0xffff, 0xffff, 0xffff },
|
||||
{
|
||||
{ PUC_PORT_TYPE_LPT, 0x20, 0x00, 0x00 },
|
||||
{ PUC_PORT_TYPE_LPT, 0x24, 0x00, 0x00 },
|
||||
},
|
||||
},
|
||||
|
||||
/*
|
||||
* XXX Dolphin Peripherals 4025 (single serial)
|
||||
* (clashes with Dolphin Peripherals 4036 (2s variant)
|
||||
*/
|
||||
|
||||
/*
|
||||
* Dolphin Peripherals 4035 (dual serial port) card. PLX 9050, with
|
||||
* a seemingly-lame EEPROM setup that puts the Dolphin IDs
|
||||
* into the subsystem fields, and claims that it's a
|
||||
* network/misc (0x02/0x80) device.
|
||||
*/
|
||||
{ "Dolphin Peripherals 4035",
|
||||
{ 0x10b5, 0x9050, 0xd84d, 0x6808 },
|
||||
{ 0xffff, 0xffff, 0xffff, 0xffff },
|
||||
{
|
||||
{ PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ },
|
||||
{ PUC_PORT_TYPE_COM, 0x1c, 0x00, COM_FREQ },
|
||||
},
|
||||
},
|
||||
|
||||
/*
|
||||
* Dolphin Peripherals 4036 (dual serial port) card.
|
||||
* (Dolpin 4025 has the same ID but only one port)
|
||||
*/
|
||||
{ "Dolphin Peripherals 4036",
|
||||
{ 0x1409, 0x7168, 0x0, 0x0 },
|
||||
{ 0xffff, 0xffff, 0x0, 0x0 },
|
||||
{
|
||||
{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ * 8},
|
||||
{ PUC_PORT_TYPE_COM, 0x10, 0x08, COM_FREQ * 8},
|
||||
},
|
||||
},
|
||||
|
||||
/*
|
||||
* XXX no entry because I have no data:
|
||||
* XXX Dolphin Peripherals 4078 (dual serial and single parallel)
|
||||
*/
|
||||
|
||||
|
||||
/*
|
||||
* SIIG Boards.
|
||||
*
|
||||
* SIIG provides documentation for their boards at:
|
||||
* <URL:http://www.siig.com/driver.htm>
|
||||
*
|
||||
* Please excuse the weird ordering, it's the order they
|
||||
* use in their documentation.
|
||||
*/
|
||||
|
||||
/*
|
||||
* SIIG "10x" family boards.
|
||||
*/
|
||||
|
||||
/* SIIG Cyber Serial PCI 16C550 (10x family): 1S */
|
||||
{ "SIIG Cyber Serial PCI 16C550 (10x family)",
|
||||
{ 0x131f, 0x1000, 0, 0 },
|
||||
{ 0xffff, 0xffff, 0, 0 },
|
||||
{
|
||||
{ PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ },
|
||||
},
|
||||
},
|
||||
|
||||
/* SIIG Cyber Serial PCI 16C650 (10x family): 1S */
|
||||
{ "SIIG Cyber Serial PCI 16C650 (10x family)",
|
||||
{ 0x131f, 0x1001, 0, 0 },
|
||||
{ 0xffff, 0xffff, 0, 0 },
|
||||
{
|
||||
{ PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ },
|
||||
},
|
||||
},
|
||||
|
||||
/* SIIG Cyber Serial PCI 16C850 (10x family): 1S */
|
||||
{ "SIIG Cyber Serial PCI 16C850 (10x family)",
|
||||
{ 0x131f, 0x1002, 0, 0 },
|
||||
{ 0xffff, 0xffff, 0, 0 },
|
||||
{
|
||||
{ PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ },
|
||||
},
|
||||
},
|
||||
|
||||
/* SIIG Cyber I/O PCI 16C550 (10x family): 1S, 1P */
|
||||
{ "SIIG Cyber I/O PCI 16C550 (10x family)",
|
||||
{ 0x131f, 0x1010, 0, 0 },
|
||||
{ 0xffff, 0xffff, 0, 0 },
|
||||
{
|
||||
{ PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ },
|
||||
{ PUC_PORT_TYPE_LPT, 0x1c, 0x00, 0x00 },
|
||||
},
|
||||
},
|
||||
|
||||
/* SIIG Cyber I/O PCI 16C650 (10x family): 1S, 1P */
|
||||
{ "SIIG Cyber I/O PCI 16C650 (10x family)",
|
||||
{ 0x131f, 0x1011, 0, 0 },
|
||||
{ 0xffff, 0xffff, 0, 0 },
|
||||
{
|
||||
{ PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ },
|
||||
{ PUC_PORT_TYPE_LPT, 0x1c, 0x00, 0x00 },
|
||||
},
|
||||
},
|
||||
|
||||
/* SIIG Cyber I/O PCI 16C850 (10x family): 1S, 1P */
|
||||
{ "SIIG Cyber I/O PCI 16C850 (10x family)",
|
||||
{ 0x131f, 0x1012, 0, 0 },
|
||||
{ 0xffff, 0xffff, 0, 0 },
|
||||
{
|
||||
{ PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ },
|
||||
{ PUC_PORT_TYPE_LPT, 0x1c, 0x00, 0x00 },
|
||||
},
|
||||
},
|
||||
|
||||
/* SIIG Cyber Parallel PCI (10x family): 1P */
|
||||
{ "SIIG Cyber Parallel PCI (10x family)",
|
||||
{ 0x131f, 0x1020, 0, 0 },
|
||||
{ 0xffff, 0xffff, 0, 0 },
|
||||
{
|
||||
{ PUC_PORT_TYPE_LPT, 0x18, 0x00, 0x00 },
|
||||
},
|
||||
},
|
||||
|
||||
/* SIIG Cyber Parallel Dual PCI (10x family): 2P */
|
||||
{ "SIIG Cyber Parallel Dual PCI (10x family)",
|
||||
{ 0x131f, 0x1021, 0, 0 },
|
||||
{ 0xffff, 0xffff, 0, 0 },
|
||||
{
|
||||
{ PUC_PORT_TYPE_LPT, 0x18, 0x00, 0x00 },
|
||||
{ PUC_PORT_TYPE_LPT, 0x20, 0x00, 0x00 },
|
||||
},
|
||||
},
|
||||
|
||||
/* SIIG Cyber Serial Dual PCI 16C550 (10x family): 2S */
|
||||
{ "SIIG Cyber Serial Dual PCI 16C550 (10x family)",
|
||||
{ 0x131f, 0x1030, 0, 0 },
|
||||
{ 0xffff, 0xffff, 0, 0 },
|
||||
{
|
||||
{ PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ },
|
||||
{ PUC_PORT_TYPE_COM, 0x1c, 0x00, COM_FREQ },
|
||||
},
|
||||
},
|
||||
|
||||
/* SIIG Cyber Serial Dual PCI 16C650 (10x family): 2S */
|
||||
{ "SIIG Cyber Serial Dual PCI 16C650 (10x family)",
|
||||
{ 0x131f, 0x1031, 0, 0 },
|
||||
{ 0xffff, 0xffff, 0, 0 },
|
||||
{
|
||||
{ PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ },
|
||||
{ PUC_PORT_TYPE_COM, 0x1c, 0x00, COM_FREQ },
|
||||
},
|
||||
},
|
||||
|
||||
/* SIIG Cyber Serial Dual PCI 16C850 (10x family): 2S */
|
||||
{ "SIIG Cyber Serial Dual PCI 16C850 (10x family)",
|
||||
{ 0x131f, 0x1032, 0, 0 },
|
||||
{ 0xffff, 0xffff, 0, 0 },
|
||||
{
|
||||
{ PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ },
|
||||
{ PUC_PORT_TYPE_COM, 0x1c, 0x00, COM_FREQ },
|
||||
},
|
||||
},
|
||||
|
||||
/* SIIG Cyber 2S1P PCI 16C550 (10x family): 2S, 1P */
|
||||
{ "SIIG Cyber 2S1P PCI 16C550 (10x family)",
|
||||
{ 0x131f, 0x1034, 0, 0 }, /* XXX really? */
|
||||
{ 0xffff, 0xffff, 0, 0 },
|
||||
{
|
||||
{ PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ },
|
||||
{ PUC_PORT_TYPE_COM, 0x1c, 0x00, COM_FREQ },
|
||||
{ PUC_PORT_TYPE_LPT, 0x20, 0x00, 0x00 },
|
||||
},
|
||||
},
|
||||
|
||||
/* SIIG Cyber 2S1P PCI 16C650 (10x family): 2S, 1P */
|
||||
{ "SIIG Cyber 2S1P PCI 16C650 (10x family)",
|
||||
{ 0x131f, 0x1035, 0, 0 }, /* XXX really? */
|
||||
{ 0xffff, 0xffff, 0, 0 },
|
||||
{
|
||||
{ PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ },
|
||||
{ PUC_PORT_TYPE_COM, 0x1c, 0x00, COM_FREQ },
|
||||
{ PUC_PORT_TYPE_LPT, 0x20, 0x00, 0x00 },
|
||||
},
|
||||
},
|
||||
|
||||
/* SIIG Cyber 2S1P PCI 16C850 (10x family): 2S, 1P */
|
||||
{ "SIIG Cyber 2S1P PCI 16C850 (10x family)",
|
||||
{ 0x131f, 0x1036, 0, 0 }, /* XXX really? */
|
||||
{ 0xffff, 0xffff, 0, 0 },
|
||||
{
|
||||
{ PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ },
|
||||
{ PUC_PORT_TYPE_COM, 0x1c, 0x00, COM_FREQ },
|
||||
{ PUC_PORT_TYPE_LPT, 0x20, 0x00, 0x00 },
|
||||
},
|
||||
},
|
||||
|
||||
/* SIIG Cyber 4S PCI 16C550 (10x family): 4S */
|
||||
{ "SIIG Cyber 4S PCI 16C550 (10x family)",
|
||||
{ 0x131f, 0x1050, 0, 0 },
|
||||
{ 0xffff, 0xffff, 0, 0 },
|
||||
{
|
||||
{ PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ },
|
||||
{ PUC_PORT_TYPE_COM, 0x1c, 0x00, COM_FREQ },
|
||||
{ PUC_PORT_TYPE_COM, 0x20, 0x00, COM_FREQ },
|
||||
{ PUC_PORT_TYPE_COM, 0x24, 0x00, COM_FREQ },
|
||||
},
|
||||
},
|
||||
|
||||
/* SIIG Cyber 4S PCI 16C650 (10x family): 4S */
|
||||
{ "SIIG Cyber 4S PCI 16C650 (10x family)",
|
||||
{ 0x131f, 0x1051, 0, 0 },
|
||||
{ 0xffff, 0xffff, 0, 0 },
|
||||
{
|
||||
{ PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ },
|
||||
{ PUC_PORT_TYPE_COM, 0x1c, 0x00, COM_FREQ },
|
||||
{ PUC_PORT_TYPE_COM, 0x20, 0x00, COM_FREQ },
|
||||
{ PUC_PORT_TYPE_COM, 0x24, 0x00, COM_FREQ },
|
||||
},
|
||||
},
|
||||
|
||||
/* SIIG Cyber 4S PCI 16C850 (10x family): 4S */
|
||||
{ "SIIG Cyber 4S PCI 16C850 (10x family)",
|
||||
{ 0x131f, 0x1052, 0, 0 },
|
||||
{ 0xffff, 0xffff, 0, 0 },
|
||||
{
|
||||
{ PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ },
|
||||
{ PUC_PORT_TYPE_COM, 0x1c, 0x00, COM_FREQ },
|
||||
{ PUC_PORT_TYPE_COM, 0x20, 0x00, COM_FREQ },
|
||||
{ PUC_PORT_TYPE_COM, 0x24, 0x00, COM_FREQ },
|
||||
},
|
||||
},
|
||||
|
||||
/*
|
||||
* SIIG "20x" family boards.
|
||||
*/
|
||||
|
||||
/* SIIG Cyber Parallel PCI (20x family): 1P */
|
||||
{ "SIIG Cyber Parallel PCI (20x family)",
|
||||
{ 0x131f, 0x2020, 0, 0 },
|
||||
{ 0xffff, 0xffff, 0, 0 },
|
||||
{
|
||||
{ PUC_PORT_TYPE_LPT, 0x10, 0x00, 0x00 },
|
||||
},
|
||||
},
|
||||
|
||||
/* SIIG Cyber Parallel Dual PCI (20x family): 2P */
|
||||
{ "SIIG Cyber Parallel Dual PCI (20x family)",
|
||||
{ 0x131f, 0x2021, 0, 0 },
|
||||
{ 0xffff, 0xffff, 0, 0 },
|
||||
{
|
||||
{ PUC_PORT_TYPE_LPT, 0x10, 0x00, 0x00 },
|
||||
{ PUC_PORT_TYPE_LPT, 0x18, 0x00, 0x00 },
|
||||
},
|
||||
},
|
||||
|
||||
/* SIIG Cyber 2P1S PCI 16C550 (20x family): 1S, 2P */
|
||||
{ "SIIG Cyber 2P1S PCI 16C550 (20x family)",
|
||||
{ 0x131f, 0x2040, 0, 0 },
|
||||
{ 0xffff, 0xffff, 0, 0 },
|
||||
{
|
||||
{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
|
||||
{ PUC_PORT_TYPE_LPT, 0x14, 0x00, 0x00 },
|
||||
{ PUC_PORT_TYPE_LPT, 0x1c, 0x00, 0x00 },
|
||||
},
|
||||
},
|
||||
|
||||
/* SIIG Cyber 2P1S PCI 16C650 (20x family): 1S, 2P */
|
||||
{ "SIIG Cyber 2P1S PCI 16C650 (20x family)",
|
||||
{ 0x131f, 0x2041, 0, 0 },
|
||||
{ 0xffff, 0xffff, 0, 0 },
|
||||
{
|
||||
{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
|
||||
{ PUC_PORT_TYPE_LPT, 0x14, 0x00, 0x00 },
|
||||
{ PUC_PORT_TYPE_LPT, 0x1c, 0x00, 0x00 },
|
||||
},
|
||||
},
|
||||
|
||||
/* SIIG Cyber 2P1S PCI 16C850 (20x family): 1S, 2P */
|
||||
{ "SIIG Cyber 2P1S PCI 16C850 (20x family)",
|
||||
{ 0x131f, 0x2042, 0, 0 },
|
||||
{ 0xffff, 0xffff, 0, 0 },
|
||||
{
|
||||
{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
|
||||
{ PUC_PORT_TYPE_LPT, 0x14, 0x00, 0x00 },
|
||||
{ PUC_PORT_TYPE_LPT, 0x1c, 0x00, 0x00 },
|
||||
},
|
||||
},
|
||||
|
||||
/* SIIG Cyber Serial PCI 16C550 (20x family): 1S */
|
||||
{ "SIIG Cyber Serial PCI 16C550 (20x family)",
|
||||
{ 0x131f, 0x2000, 0, 0 },
|
||||
{ 0xffff, 0xffff, 0, 0 },
|
||||
{
|
||||
{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
|
||||
},
|
||||
},
|
||||
|
||||
/* SIIG Cyber Serial PCI 16C650 (20x family): 1S */
|
||||
{ "SIIG Cyber Serial PCI 16C650 (20x family)",
|
||||
{ 0x131f, 0x2001, 0, 0 },
|
||||
{ 0xffff, 0xffff, 0, 0 },
|
||||
{
|
||||
{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
|
||||
},
|
||||
},
|
||||
|
||||
/* SIIG Cyber Serial PCI 16C850 (20x family): 1S */
|
||||
{ "SIIG Cyber Serial PCI 16C850 (20x family)",
|
||||
{ 0x131f, 0x2002, 0, 0 },
|
||||
{ 0xffff, 0xffff, 0, 0 },
|
||||
{
|
||||
{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
|
||||
},
|
||||
},
|
||||
|
||||
/* SIIG Cyber I/O PCI 16C550 (20x family): 1S, 1P */
|
||||
{ "SIIG Cyber I/O PCI 16C550 (20x family)",
|
||||
{ 0x131f, 0x2010, 0, 0 },
|
||||
{ 0xffff, 0xffff, 0, 0 },
|
||||
{
|
||||
{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
|
||||
{ PUC_PORT_TYPE_LPT, 0x14, 0x00, 0x00 },
|
||||
},
|
||||
},
|
||||
|
||||
/* SIIG Cyber I/O PCI 16C650 (20x family): 1S, 1P */
|
||||
{ "SIIG Cyber I/O PCI 16C650 (20x family)",
|
||||
{ 0x131f, 0x2011, 0, 0 },
|
||||
{ 0xffff, 0xffff, 0, 0 },
|
||||
{
|
||||
{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
|
||||
{ PUC_PORT_TYPE_LPT, 0x14, 0x00, 0x00 },
|
||||
},
|
||||
},
|
||||
|
||||
/* SIIG Cyber I/O PCI 16C850 (20x family): 1S, 1P */
|
||||
{ "SIIG Cyber I/O PCI 16C850 (20x family)",
|
||||
{ 0x131f, 0x2012, 0, 0 },
|
||||
{ 0xffff, 0xffff, 0, 0 },
|
||||
{
|
||||
{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
|
||||
{ PUC_PORT_TYPE_LPT, 0x14, 0x00, 0x00 },
|
||||
},
|
||||
},
|
||||
|
||||
/* SIIG Cyber Serial Dual PCI 16C550 (20x family): 2S */
|
||||
{ "SIIG Cyber Serial Dual PCI 16C550 (20x family)",
|
||||
{ 0x131f, 0x2030, 0, 0 },
|
||||
{ 0xffff, 0xffff, 0, 0 },
|
||||
{
|
||||
{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
|
||||
{ PUC_PORT_TYPE_COM, 0x14, 0x00, COM_FREQ },
|
||||
},
|
||||
},
|
||||
|
||||
/* SIIG Cyber Serial Dual PCI 16C650 (20x family): 2S */
|
||||
{ "SIIG Cyber Serial Dual PCI 16C650 (20x family)",
|
||||
{ 0x131f, 0x2031, 0, 0 },
|
||||
{ 0xffff, 0xffff, 0, 0 },
|
||||
{
|
||||
{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
|
||||
{ PUC_PORT_TYPE_COM, 0x14, 0x00, COM_FREQ },
|
||||
},
|
||||
},
|
||||
|
||||
/* SIIG Cyber Serial Dual PCI 16C850 (20x family): 2S */
|
||||
{ "SIIG Cyber Serial Dual PCI 16C850 (20x family)",
|
||||
{ 0x131f, 0x2032, 0, 0 },
|
||||
{ 0xffff, 0xffff, 0, 0 },
|
||||
{
|
||||
{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
|
||||
{ PUC_PORT_TYPE_COM, 0x14, 0x00, COM_FREQ },
|
||||
},
|
||||
},
|
||||
|
||||
/* SIIG Cyber 2S1P PCI 16C550 (20x family): 2S, 1P */
|
||||
{ "SIIG Cyber 2S1P PCI 16C550 (20x family)",
|
||||
{ 0x131f, 0x2060, 0, 0 },
|
||||
{ 0xffff, 0xffff, 0, 0 },
|
||||
{
|
||||
{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
|
||||
{ PUC_PORT_TYPE_COM, 0x14, 0x00, COM_FREQ },
|
||||
{ PUC_PORT_TYPE_LPT, 0x18, 0x00, 0x00 },
|
||||
},
|
||||
},
|
||||
|
||||
/* SIIG Cyber 2S1P PCI 16C650 (20x family): 2S, 1P */
|
||||
{ "SIIG Cyber 2S1P PCI 16C650 (20x family)",
|
||||
{ 0x131f, 0x2061, 0, 0 },
|
||||
{ 0xffff, 0xffff, 0, 0 },
|
||||
{
|
||||
{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
|
||||
{ PUC_PORT_TYPE_COM, 0x14, 0x00, COM_FREQ },
|
||||
{ PUC_PORT_TYPE_LPT, 0x18, 0x00, 0x00 },
|
||||
},
|
||||
},
|
||||
|
||||
/* SIIG Cyber 2S1P PCI 16C850 (20x family): 2S, 1P */
|
||||
{ "SIIG Cyber 2S1P PCI 16C850 (20x family)",
|
||||
{ 0x131f, 0x2062, 0, 0 },
|
||||
{ 0xffff, 0xffff, 0, 0 },
|
||||
{
|
||||
{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
|
||||
{ PUC_PORT_TYPE_COM, 0x14, 0x00, COM_FREQ },
|
||||
{ PUC_PORT_TYPE_LPT, 0x18, 0x00, 0x00 },
|
||||
},
|
||||
},
|
||||
|
||||
/* SIIG Cyber 4S PCI 16C550 (20x family): 4S */
|
||||
{ "SIIG Cyber 4S PCI 16C550 (20x family)",
|
||||
{ 0x131f, 0x2050, 0, 0 },
|
||||
{ 0xffff, 0xffff, 0, 0 },
|
||||
{
|
||||
{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
|
||||
{ PUC_PORT_TYPE_COM, 0x14, 0x00, COM_FREQ },
|
||||
{ PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ },
|
||||
{ PUC_PORT_TYPE_COM, 0x1c, 0x00, COM_FREQ },
|
||||
},
|
||||
},
|
||||
|
||||
/* SIIG Cyber 4S PCI 16C650 (20x family): 4S */
|
||||
{ "SIIG Cyber 4S PCI 16C650 (20x family)",
|
||||
{ 0x131f, 0x2051, 0, 0 },
|
||||
{ 0xffff, 0xffff, 0, 0 },
|
||||
{
|
||||
{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
|
||||
{ PUC_PORT_TYPE_COM, 0x14, 0x00, COM_FREQ },
|
||||
{ PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ },
|
||||
{ PUC_PORT_TYPE_COM, 0x1c, 0x00, COM_FREQ },
|
||||
},
|
||||
},
|
||||
|
||||
/* SIIG Cyber 4S PCI 16C850 (20x family): 4S */
|
||||
{ "SIIG Cyber 4S PCI 16C850 (20x family)",
|
||||
{ 0x131f, 0x2052, 0, 0 },
|
||||
{ 0xffff, 0xffff, 0, 0 },
|
||||
{
|
||||
{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
|
||||
{ PUC_PORT_TYPE_COM, 0x14, 0x00, COM_FREQ },
|
||||
{ PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ },
|
||||
{ PUC_PORT_TYPE_COM, 0x1c, 0x00, COM_FREQ },
|
||||
},
|
||||
},
|
||||
|
||||
/* VScom PCI-400: 4S */
|
||||
{ "VScom PCI-400",
|
||||
{ 0x10b5, 0x1077, 0x10b5, 0x1077 },
|
||||
{ 0xffff, 0xffff, 0xffff, 0xffff },
|
||||
{
|
||||
{ PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ * 8 },
|
||||
{ PUC_PORT_TYPE_COM, 0x18, 0x08, COM_FREQ * 8 },
|
||||
{ PUC_PORT_TYPE_COM, 0x18, 0x10, COM_FREQ * 8 },
|
||||
{ PUC_PORT_TYPE_COM, 0x18, 0x18, COM_FREQ * 8 },
|
||||
},
|
||||
},
|
||||
|
||||
/* VScom PCI-800: 8S */
|
||||
{ "VScom PCI-800",
|
||||
{ 0x10b5, 0x1076, 0x10b5, 0x1076 },
|
||||
{ 0xffff, 0xffff, 0xffff, 0xffff },
|
||||
{
|
||||
{ PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ * 8 },
|
||||
{ PUC_PORT_TYPE_COM, 0x18, 0x08, COM_FREQ * 8 },
|
||||
{ PUC_PORT_TYPE_COM, 0x18, 0x10, COM_FREQ * 8 },
|
||||
{ PUC_PORT_TYPE_COM, 0x18, 0x18, COM_FREQ * 8 },
|
||||
{ PUC_PORT_TYPE_COM, 0x18, 0x20, COM_FREQ * 8 },
|
||||
{ PUC_PORT_TYPE_COM, 0x18, 0x28, COM_FREQ * 8 },
|
||||
{ PUC_PORT_TYPE_COM, 0x18, 0x30, COM_FREQ * 8 },
|
||||
{ PUC_PORT_TYPE_COM, 0x18, 0x38, COM_FREQ * 8 },
|
||||
},
|
||||
},
|
||||
/*
|
||||
* VScom PCI-800H. Uses 8 16950 UART, behind a PCI chips that offers
|
||||
* 4 com port on PCI device 0 and 4 on PCI device 1. PCI device 0 has
|
||||
* device ID 3 and PCI device 1 device ID 4.
|
||||
*/
|
||||
{ "Titan PCI-800H",
|
||||
{ 0x14d2, 0xa003, 0, 0 },
|
||||
{ 0xffff, 0xffff, 0, 0 },
|
||||
{
|
||||
{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ * 8 },
|
||||
{ PUC_PORT_TYPE_COM, 0x10, 0x08, COM_FREQ * 8 },
|
||||
{ PUC_PORT_TYPE_COM, 0x10, 0x10, COM_FREQ * 8 },
|
||||
{ PUC_PORT_TYPE_COM, 0x10, 0x18, COM_FREQ * 8 },
|
||||
},
|
||||
},
|
||||
{ "Titan PCI-800H",
|
||||
{ 0x14d2, 0xa004, 0, 0 },
|
||||
{ 0xffff, 0xffff, 0, 0 },
|
||||
{
|
||||
{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ * 8 },
|
||||
{ PUC_PORT_TYPE_COM, 0x10, 0x08, COM_FREQ * 8 },
|
||||
{ PUC_PORT_TYPE_COM, 0x10, 0x10, COM_FREQ * 8 },
|
||||
{ PUC_PORT_TYPE_COM, 0x10, 0x18, COM_FREQ * 8 },
|
||||
},
|
||||
},
|
||||
{ "Titan PCI-200H",
|
||||
{ 0x14d2, 0xa005, 0, 0 },
|
||||
{ 0xffff, 0xffff, 0, 0 },
|
||||
{
|
||||
{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ * 8 },
|
||||
{ PUC_PORT_TYPE_COM, 0x10, 0x08, COM_FREQ * 8 },
|
||||
},
|
||||
},
|
||||
|
||||
/* NEC PK-UG-X001 K56flex PCI Modem card.
|
||||
NEC MARTH bridge chip and Rockwell RCVDL56ACF/SP using. */
|
||||
{ "NEC PK-UG-X001 K56flex PCI Modem",
|
||||
{ 0x1033, 0x0074, 0x1033, 0x8014 },
|
||||
{ 0xffff, 0xffff, 0xffff, 0xffff },
|
||||
{
|
||||
{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
|
||||
},
|
||||
},
|
||||
|
||||
/* NEC PK-UG-X008 */
|
||||
{ "NEC PK-UG-X008",
|
||||
{ 0x1033, 0x007d, 0x1033, 0x8012 },
|
||||
{ 0xffff, 0xffff, 0xffff, 0xffff },
|
||||
{
|
||||
{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ},
|
||||
},
|
||||
},
|
||||
|
||||
/* Lava Computers 2SP-PCI */
|
||||
{ "Lava Computers 2SP-PCI parallel port",
|
||||
{ 0x1407, 0x8000, 0, 0 },
|
||||
{ 0xffff, 0xffff, 0, 0 },
|
||||
{
|
||||
{ PUC_PORT_TYPE_LPT, 0x10, 0x00, 0x00 },
|
||||
},
|
||||
},
|
||||
|
||||
/* Lava Computers 2SP-PCI and Quattro-PCI serial ports */
|
||||
{ "Lava Computers dual serial port",
|
||||
{ 0x1407, 0x0100, 0, 0 },
|
||||
{ 0xffff, 0xfffc, 0, 0 },
|
||||
{
|
||||
{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
|
||||
{ PUC_PORT_TYPE_COM, 0x14, 0x00, COM_FREQ },
|
||||
},
|
||||
},
|
||||
|
||||
/* Lava Computers DSerial PCI serial ports */
|
||||
{ "Lava Computers serial port",
|
||||
{ 0x1407, 0x0110, 0, 0 },
|
||||
{ 0xffff, 0xfffc, 0, 0 },
|
||||
{
|
||||
{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
|
||||
},
|
||||
},
|
||||
|
||||
/* Lava Computers Octopus-550 serial ports */
|
||||
{ "Lava Computers Octopus-550 8-port serial",
|
||||
{ 0x1407, 0x0180, 0, 0 },
|
||||
{ 0xffff, 0xfffc, 0, 0 },
|
||||
{
|
||||
{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
|
||||
{ PUC_PORT_TYPE_COM, 0x14, 0x00, COM_FREQ },
|
||||
{ PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ },
|
||||
{ PUC_PORT_TYPE_COM, 0x1c, 0x00, COM_FREQ },
|
||||
},
|
||||
},
|
||||
|
||||
/* US Robotics (3Com) PCI Modems */
|
||||
{ "US Robotics (3Com) 3CP5609 PCI 16550 Modem",
|
||||
{ 0x12b9, 0x1008, 0, 0 },
|
||||
{ 0xffff, 0xffff, 0, 0 },
|
||||
{
|
||||
{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
|
||||
},
|
||||
},
|
||||
|
||||
/* Actiontec 56K PCI Master */
|
||||
{ "Actiontec 56K PCI Master",
|
||||
{ 0x11c1, 0x0480, 0x0, 0x0 },
|
||||
{ 0xffff, 0xffff, 0x0, 0x0 },
|
||||
{
|
||||
{ PUC_PORT_TYPE_COM, 0x14, 0x00, COM_FREQ },
|
||||
},
|
||||
},
|
||||
|
||||
/*
|
||||
* Boards with an Oxford Semiconductor chip.
|
||||
*
|
||||
* Oxford Semiconductor provides documentation for their chip at:
|
||||
* <URL:http://www.oxsemi.com/products/uarts/index.html>
|
||||
*
|
||||
* As sold by Kouwell <URL:http://www.kouwell.com/>.
|
||||
* I/O Flex PCI I/O Card Model-223 with 4 serial and 1 parallel ports.
|
||||
*/
|
||||
|
||||
/* Oxford Semiconductor OX16PCI954 PCI UARTs */
|
||||
{ "Qxford Semiconductor OX16PCI954 UARTs",
|
||||
{ 0x1415, 0x9501, 0, 0 },
|
||||
{ 0xffff, 0xffff, 0, 0 },
|
||||
{
|
||||
{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
|
||||
{ PUC_PORT_TYPE_COM, 0x10, 0x08, COM_FREQ },
|
||||
{ PUC_PORT_TYPE_COM, 0x10, 0x10, COM_FREQ },
|
||||
{ PUC_PORT_TYPE_COM, 0x10, 0x18, COM_FREQ },
|
||||
},
|
||||
},
|
||||
|
||||
/* Oxford Semiconductor OX16PCI954 PCI Parallel port */
|
||||
{ "Qxford Semiconductor OX16PCI954 Parallel port",
|
||||
{ 0x1415, 0x9513, 0, 0 },
|
||||
{ 0xffff, 0xffff, 0, 0 },
|
||||
{
|
||||
{ PUC_PORT_TYPE_LPT, 0x10, 0x00, 0x00 },
|
||||
},
|
||||
},
|
||||
|
||||
/* NetMos 2S1P PCI 16C650 : 2S, 1P */
|
||||
{ "NetMos NM9835 Dual UART and 1284 Printer port",
|
||||
{ 0x9710, 0x9835, 0, 0 },
|
||||
{ 0xffff, 0xffff, 0, 0 },
|
||||
{
|
||||
{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
|
||||
{ PUC_PORT_TYPE_COM, 0x14, 0x00, COM_FREQ },
|
||||
{ PUC_PORT_TYPE_LPT, 0x18, 0x00, 0x00 },
|
||||
},
|
||||
},
|
||||
|
||||
/*
|
||||
* This is the Middle Digital, Inc. PCI-Weasel, which
|
||||
* uses a PCI interface implemented in FPGA.
|
||||
*/
|
||||
{ "Middle Digital, Inc. Weasel serial port",
|
||||
{ 0xdeaf, 0x9051, 0, 0 },
|
||||
{ 0xffff, 0xffff, 0, 0 },
|
||||
{
|
||||
{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
|
||||
},
|
||||
},
|
||||
|
||||
/* SD-LAB PCI I/O Card 4S2P */
|
||||
{ "Syba Tech Ltd. PCI-4S2P-550-ECP",
|
||||
{ 0x1592, 0x0781, 0, 0 },
|
||||
{ 0xffff, 0xffff, 0, 0 },
|
||||
{
|
||||
{ PUC_PORT_TYPE_COM, 0x10, 0x2e8, COM_FREQ },
|
||||
{ PUC_PORT_TYPE_COM, 0x10, 0x2f8, COM_FREQ },
|
||||
{ PUC_PORT_TYPE_LPT, 0x10, 0x000, 0x00 },
|
||||
{ PUC_PORT_TYPE_COM, 0x10, 0x3e8, COM_FREQ },
|
||||
{ PUC_PORT_TYPE_COM, 0x10, 0x3f8, COM_FREQ },
|
||||
{ PUC_PORT_TYPE_LPT, 0x10, 0x000, 0x00 },
|
||||
},
|
||||
},
|
||||
|
||||
/* Moxa Technologies Co., Ltd. PCI I/O Card 4S RS232/422/485 */
|
||||
{ "Moxa Technologies, Industio CP-114",
|
||||
{ 0x1393, 0x1141, 0, 0 },
|
||||
{ 0xffff, 0xffff, 0, 0, },
|
||||
{
|
||||
{ PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ * 8 },
|
||||
{ PUC_PORT_TYPE_COM, 0x18, 0x08, COM_FREQ * 8 },
|
||||
{ PUC_PORT_TYPE_COM, 0x18, 0x10, COM_FREQ * 8 },
|
||||
{ PUC_PORT_TYPE_COM, 0x18, 0x18, COM_FREQ * 8 },
|
||||
},
|
||||
},
|
||||
|
||||
/* Moxa Technologies Co., Ltd. PCI I/O Card 8S RS232 */
|
||||
{ "Moxa Technologies, C168H/PCI",
|
||||
{ 0x1393, 0x1680, 0, 0 },
|
||||
{ 0xffff, 0xffff, 0, 0, },
|
||||
{
|
||||
{ PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ * 8 },
|
||||
{ PUC_PORT_TYPE_COM, 0x18, 0x08, COM_FREQ * 8 },
|
||||
{ PUC_PORT_TYPE_COM, 0x18, 0x10, COM_FREQ * 8 },
|
||||
{ PUC_PORT_TYPE_COM, 0x18, 0x18, COM_FREQ * 8 },
|
||||
{ PUC_PORT_TYPE_COM, 0x18, 0x20, COM_FREQ * 8 },
|
||||
{ PUC_PORT_TYPE_COM, 0x18, 0x28, COM_FREQ * 8 },
|
||||
{ PUC_PORT_TYPE_COM, 0x18, 0x30, COM_FREQ * 8 },
|
||||
{ PUC_PORT_TYPE_COM, 0x18, 0x38, COM_FREQ * 8 },
|
||||
},
|
||||
},
|
||||
|
||||
{ 0 }
|
||||
};
|
||||
100
sys/dev/puc/pucvar.h
Normal file
100
sys/dev/puc/pucvar.h
Normal file
|
|
@ -0,0 +1,100 @@
|
|||
/* $NetBSD: pucvar.h,v 1.2 1999/02/06 06:29:54 cgd Exp $ */
|
||||
/* $FreeBSD$ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2002 JF Hay. All rights reserved.
|
||||
* Copyright (c) 2000 M. Warner Losh. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice unmodified, this list of conditions, and the following
|
||||
* disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
|
||||
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
||||
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
||||
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Copyright (c) 1998, 1999 Christopher G. Demetriou. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. All advertising materials mentioning features or use of this software
|
||||
* must display the following acknowledgement:
|
||||
* This product includes software developed by Christopher G. Demetriou
|
||||
* for the NetBSD Project.
|
||||
* 4. The name of the author may not be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
|
||||
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
||||
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
||||
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Exported (or conveniently located) PCI "universal" communications card
|
||||
* software structures.
|
||||
*
|
||||
* Author: Christopher G. Demetriou, May 14, 1998.
|
||||
*/
|
||||
|
||||
#define PUC_MAX_PORTS 8
|
||||
|
||||
struct puc_device_description {
|
||||
const char *name;
|
||||
uint32_t rval[4];
|
||||
uint32_t rmask[4];
|
||||
struct {
|
||||
int type;
|
||||
int bar;
|
||||
int offset;
|
||||
u_int serialfreq;
|
||||
} ports[PUC_MAX_PORTS];
|
||||
};
|
||||
|
||||
#define PUC_REG_VEND 0
|
||||
#define PUC_REG_PROD 1
|
||||
#define PUC_REG_SVEND 2
|
||||
#define PUC_REG_SPROD 3
|
||||
|
||||
#define PUC_PORT_TYPE_NONE 0
|
||||
#define PUC_PORT_TYPE_COM 1
|
||||
#define PUC_PORT_TYPE_LPT 2
|
||||
|
||||
#define PUC_PORT_VALID(desc, port) \
|
||||
((port) < PUC_MAX_PORTS && (desc)->ports[(port)].type != PUC_PORT_TYPE_NONE)
|
||||
#define PUC_PORT_BAR_INDEX(bar) (((bar) - PCIR_MAPS) / 4)
|
||||
|
||||
#define PUC_MAX_BAR 6
|
||||
|
||||
enum puc_device_ivars {
|
||||
PUC_IVAR_FREQ
|
||||
};
|
||||
|
||||
extern const struct puc_device_description puc_devices[];
|
||||
89
sys/dev/sio/sio_puc.c
Normal file
89
sys/dev/sio/sio_puc.c
Normal file
|
|
@ -0,0 +1,89 @@
|
|||
/*-
|
||||
* Copyright (c) 2002 JF Hay. All rights reserved.
|
||||
* Copyright (c) 2001 M. Warner Losh. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
|
||||
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
||||
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
||||
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__FBSDID("$FreeBSD$");
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
#include <sys/bus.h>
|
||||
#include <sys/conf.h>
|
||||
#include <sys/kernel.h>
|
||||
#include <sys/lock.h>
|
||||
#include <sys/malloc.h>
|
||||
#include <sys/mutex.h>
|
||||
#include <sys/module.h>
|
||||
#include <sys/tty.h>
|
||||
#include <machine/bus_pio.h>
|
||||
#include <machine/bus.h>
|
||||
#include <sys/timepps.h>
|
||||
|
||||
#include <dev/pci/pcivar.h>
|
||||
#include <dev/puc/pucvar.h>
|
||||
#include <dev/sio/siovar.h>
|
||||
#include <dev/sio/sioreg.h>
|
||||
|
||||
static int sio_puc_attach __P((device_t dev));
|
||||
static int sio_puc_probe __P((device_t dev));
|
||||
|
||||
static device_method_t sio_puc_methods[] = {
|
||||
/* Device interface */
|
||||
DEVMETHOD(device_probe, sio_puc_probe),
|
||||
DEVMETHOD(device_attach, sio_puc_attach),
|
||||
|
||||
{ 0, 0 }
|
||||
};
|
||||
|
||||
static driver_t sio_puc_driver = {
|
||||
sio_driver_name,
|
||||
sio_puc_methods,
|
||||
0,
|
||||
};
|
||||
|
||||
static int
|
||||
sio_puc_attach(dev)
|
||||
device_t dev;
|
||||
{
|
||||
u_int rclk;
|
||||
|
||||
if (BUS_READ_IVAR(device_get_parent(dev), dev, PUC_IVAR_FREQ,
|
||||
&rclk) != 0)
|
||||
rclk = DEFAULT_RCLK;
|
||||
return (sioattach(dev, 0, rclk));
|
||||
}
|
||||
|
||||
static int
|
||||
sio_puc_probe(dev)
|
||||
device_t dev;
|
||||
{
|
||||
u_int rclk;
|
||||
|
||||
if (BUS_READ_IVAR(device_get_parent(dev), dev, PUC_IVAR_FREQ,
|
||||
&rclk) != 0)
|
||||
rclk = DEFAULT_RCLK;
|
||||
return (sioprobe(dev, 0, (u_long)rclk, 0));
|
||||
}
|
||||
|
||||
DRIVER_MODULE(sio, puc, sio_puc_driver, sio_devclass, 0, 0);
|
||||
|
|
@ -1700,6 +1700,17 @@ options COM_MULTIPORT #code for some cards with shared IRQs
|
|||
# 0x20000 enable hardware RTS/CTS and larger FIFOs. Only works for
|
||||
# ST16650A-compatible UARTs.
|
||||
|
||||
# PCI Universal Communications driver
|
||||
# Supports various single and multi port PCI serial cards. Maybe later
|
||||
# also the parallel ports on combination serial/parallel cards. New cards
|
||||
# can be added in srs/sys/dev/pucdata.c.
|
||||
#
|
||||
# If the PUC_FASTINTR option is used the driver will try to use fast
|
||||
# interrupts. The card must then be the only user of that interrupt.
|
||||
# Interrupts cannot be shared when using PUC_FASTINTR.
|
||||
device puc
|
||||
options PUC_FASTINTR
|
||||
|
||||
#
|
||||
# Network interfaces:
|
||||
#
|
||||
|
|
|
|||
Loading…
Reference in a new issue