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armv8rng: Don't require toolchain to support FEAT_RNG
We have the mechanism in place to support encoding system registers
explicitly, so use that rather than requiring LLVM 13+, which breaks our
current set of GitHub CI builds.
Fixes: 9eecef0521
("Add an Armv8 rndr random number provider")
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@ -1981,6 +1981,15 @@
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#define PMXEVTYPER_EL0_CRm 13
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#define PMXEVTYPER_EL0_op2 1
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/* RNDRRS */
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#define RNDRRS MRS_REG(RNDRRS)
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#define RNDRRS_REG MRS_REG_ALT_NAME(RNDRRS)
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#define RNDRRS_op0 3
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#define RNDRRS_op1 3
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#define RNDRRS_CRn 2
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#define RNDRRS_CRm 4
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#define RNDRRS_op2 1
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/* SCTLR_EL1 - System Control Register */
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#define SCTLR_RES1 0x30d00800 /* Reserved ARMv8.0, write 1 */
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#define SCTLR_M (UL(0x1) << 0)
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@ -59,10 +59,10 @@ random_rndr_read_one(u_long *buf)
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loop = 10;
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do {
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__asm __volatile(
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".arch_extension rng \n"
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"mrs %0, rndrrs \n" /* Read the random number */
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"cset %w1, ne \n" /* 1 on success, 0 on failure */
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".arch_extension norng \n"
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/* Read the random number */
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"mrs %0, " __XSTRING(RNDRRS_REG) "\n"
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/* 1 on success, 0 on failure */
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"cset %w1, ne\n"
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: "=&r" (val), "=&r"(ret) :: "cc");
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} while (ret != 0 && --loop > 0);
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