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Import ACPICA 20230331

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This commit is contained in:
Jung-uk Kim 2024-01-30 16:43:45 -05:00
parent a799bdd9d5
commit 8e013e1e3b
429 changed files with 4327 additions and 632 deletions
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105
changes.txt
View file

@ -1,3 +1,108 @@
----------------------------------------
31 March 2023. Summary of changes for version 20230331:
This release is available at https://acpica.org/downloads
0) Global changes:
Update all copyright notices to the year 2023. This effects all source
modules, as well as utility signons.
Add OS-specific support for Zephyr RTOS.
Fix miscellaneous code that accesses various objects.
Remove some dead code.
Add C ?Flexible Array? support.
Add support for 64 bit LoongArch compilation.
Add first batch of RISC-V related definitions.
Performed a global automated update to remove tabs, fix indentation
issues, etc.
1) ACPICA kernel-resident subsystem:
hwvalid: Drop port I/O validation.
2) ACPICA tools and utilities:
iASL: Added full macro support in the preprocessor. Example:
#define ABCD(a,b,c,d) a+b+c-d
Known macro support limitations (at this time):
No support for multi-line #define macros (backslash continuation
lines)
No support for the C-style ternary operator
No support for the stringizing operator (#)
No support for the concatenation (token pasting) operator (##)
No support for variable number of macro arguments
Add support for AMD Secure Processor Table (ASPT) version 1.
Add support for Arm's MPAM ACPI table version 2.
ACPI 6.5: MADT: add support for trace buffer extension in GICC.
Headers: Delete bogus NodeArray array of pointers from AEST table.
PHAT table support is still ongoing.
----------------------------------------
20 October 2022. Summary of changes for version 20221020:
This release is available at https://acpica.org/downloads
0) Global changes:
Allow disabling of -Werror. For distro maintainers having `-Werror` can
delay update of GCC. Since every GCC release might add new warnings that
were not yet captured, it might break the build of packages. With this
change, distros can now build with `NOWERROR=TRUE` instead of patching
either the errors or the makefiles. The default behavior keeps on using
`-Werror`.
1) ACPICA kernel-resident subsystem:
Added support for FFH Operation Region special context data. FFH(Fixed
Function Hardware) Opregion is approved to be added in ACPI 6.5 via code
first approach[1]. It requires special context data similar to GPIO and
Generic Serial Bus as it needs to know platform specific offset and
length.
Reverted this commit "executer/exsystem: Warn about sleeps greater than
10 ms." Due to user complaints about valid sleeps greater than 10ms seen
in some existing machines -- generating lots of warnings.
Do not touch VGA memory when EBDA < 1KiB. The ACPICA code assumes that
EBDA region must be at least 1KiB in size. Because this is not
guaranteed, it might happen that while scanning the memory for RSDP
pointer, the kernel touches memory above 640KiB. This is unwanted as the
VGA memory range may not be decoded or even present when running under
virtualization.
Check that EBDA pointer is in valid memory. If the memory at 0x40e is
uninitialized, the retrieved physical memory address of EBDA may be
beyond the low memory (i.e. above 640K). If so, the kernel may
unintentionally access the VGA memory, that might not be decoded or even
present in case of virtualization.
2) iASL Compiler/Disassembler and ACPICA tools:
Completed the existing partial support for the CDAT "table". Although
this isn't technically an ACPI table (It doesn't go into the XSDT), it is
possible to support this table in the Data Table compiler. Created one
new file, "utilities/utcksum.c", used to centralize checksum
generation/validation into one location. Includes changes to makefiles
and MSVC project files.
Updated support for the IORT table - update to version E.e
Added CXL 3.0 structures (CXIMS & RDPAS) to the CEDT table
iASL: Added CCEL table to both compiler/disassembler.
iASL: NHLT table: Fixed compilation of optional undocumented fields
iASL: Fix iASL compile error due to ACPI_TDEL_OFFSET. Commit # 10e4763
("iASL: Add CCEL table to both compiler/disassembler") introduced the
iASL build issue. The issue is due to using ACPI_TDEL_OFFSET for CCEL
table member reference. To fix it, change ACPI_TDEL_OFFSET with
ACPI_CCEL_OFFSET.
----------------------------------------
31 March 2022. Summary of changes for version 20220331:

2
source/common/acfileio.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

2
source/common/acgetline.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

2
source/common/adfile.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

3
source/common/adisasm.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License
@ -789,6 +789,7 @@ AdDoExternalFileList (
AcpiDmFinishNamespaceLoad (AcpiGbl_ParseOpRoot,
AcpiGbl_RootNode, OwnerId);
AcpiPsDeleteParseTree (AcpiGbl_ParseOpRoot);
AcpiGbl_ParseOpRoot = NULL;
ExternalListHead = ExternalListHead->Next;
}

2
source/common/adwalk.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

2
source/common/ahids.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

2
source/common/ahpredef.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

5
source/common/ahtable.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License
@ -202,6 +202,7 @@ const AH_TABLE AcpiGbl_SupportedTables[] =
{ACPI_SIG_AEST, "Arm Error Source Table"},
{ACPI_SIG_AGDI, "Arm Generic Diagnostic Dump and Reset Device Interface Table"},
{ACPI_SIG_ASF, "Alert Standard Format Table"},
{ACPI_SIG_ASPT, "AMD Secure Processor Table"},
{ACPI_SIG_BDAT, "BIOS Data ACPI Table"},
{ACPI_SIG_BERT, "Boot Error Record Table"},
{ACPI_SIG_BGRT, "Boot Graphics Resource Table"},
@ -232,6 +233,7 @@ const AH_TABLE AcpiGbl_SupportedTables[] =
{ACPI_SIG_MADT, "Multiple APIC Description Table (MADT)"},
{ACPI_SIG_MCFG, "Memory Mapped Configuration Table"},
{ACPI_SIG_MCHI, "Management Controller Host Interface Table"},
{ACPI_SIG_MPAM, "Memory System Resource Partitioning and Monitoring Table"},
{ACPI_SIG_MPST, "Memory Power State Table"},
{ACPI_SIG_MSCT, "Maximum System Characteristics Table"},
{ACPI_SIG_MSDM, "Microsoft Data Management Table"},
@ -244,6 +246,7 @@ const AH_TABLE AcpiGbl_SupportedTables[] =
{ACPI_SIG_PPTT, "Processor Properties Topology Table"},
{ACPI_SIG_PRMT, "Platform Runtime Mechanism Table"},
{ACPI_SIG_RASF, "RAS Features Table"},
{ACPI_SIG_RHCT, "RISC-V Hart Capabilities Table"},
{ACPI_SIG_RGRT, "Regulatory Graphics Resource Table"},
{ACPI_RSDP_NAME,"Root System Description Pointer"},
{ACPI_SIG_RSDT, "Root System Description Table"},

2
source/common/ahuuids.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

2
source/common/cmfsize.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

10
source/common/dmextern.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License
@ -1493,7 +1493,6 @@ AcpiDmMarkExternalConflict (
ACPI_EXTERNAL_LIST *ExternalList = AcpiGbl_ExternalList;
char *ExternalPath;
char *InternalPath;
char *Temp;
ACPI_STATUS Status;
@ -1526,13 +1525,6 @@ AcpiDmMarkExternalConflict (
while (ExternalList)
{
Temp = ExternalList->InternalPath;
if ((*ExternalList->InternalPath == AML_ROOT_PREFIX) &&
(ExternalList->InternalPath[1]))
{
Temp++;
}
if (!strcmp (ExternalList->InternalPath, InternalPath))
{
ExternalList->Flags |= ACPI_EXT_CONFLICTING_DECLARATION;

11
source/common/dmrestag.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License
@ -480,6 +480,14 @@ static const ACPI_RESOURCE_TAG AcpiDmIoFlagTags[] =
{0, NULL}
};
/* Subtype tables for ClockInput descriptor */
static const ACPI_RESOURCE_TAG AcpiDmClockInputTags[] =
{
{( 6 * 8), ACPI_RESTAG_FQD},
{( 8 * 8), ACPI_RESTAG_FQN},
{0, NULL}
};
/*
* Dispatch table used to obtain the correct tag table for a descriptor.
@ -531,6 +539,7 @@ static const ACPI_RESOURCE_TAG *AcpiGbl_ResourceTags[] =
NULL, /* 0x10, ACPI_RESOURCE_NAME_PIN_GROUP */
AcpiDmPinGroupFunctionTags, /* 0x11, ACPI_RESOURCE_NAME_PIN_GROUP_FUNCTION */
AcpiDmPinConfigTags, /* 0x12, ACPI_RESOURCE_NAME_PIN_GROUP_CONFIG - Same as PinConfig */
AcpiDmClockInputTags, /* 0x13, ACPI_RESOURCE_NAME_CLOCK_INPUT */
};
/* GPIO Subtypes */

2
source/common/dmswitch.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

54
source/common/dmtable.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License
@ -234,6 +234,14 @@ static const char *AcpiDmAsfSubnames[] =
"Unknown Subtable Type" /* Reserved */
};
static const char *AcpiDmAsptSubnames[] =
{
"ASPT Global Registers",
"ASPT SEV Mailbox Registers",
"ASPT ACPI Mailbox Registers",
"Unknown Subtable Type" /* Reserved */
};
static const char *AcpiDmCdatSubnames[] =
{
"Device Scoped Memory Affinity Structure (DSMAS)",
@ -421,10 +429,22 @@ static const char *AcpiDmMadtSubnames[] =
"MSI Interrupt Controller", /* ACPI_MADT_TYPE_MSI_PIC */
"Bridge I/O Interrupt Controller", /* ACPI_MADT_TYPE_BIO_PIC */
"LPC Interrupt Controller", /* ACPI_MADT_TYPE_LPC_PIC */
"RISC-V Interrupt Controller", /* ACPI_MADT_TYPE_RINTC */
"Unknown Subtable Type", /* Reserved */
"Types 80-FF are used for OEM data" /* Reserved for OEM data */
};
static const char *AcpiDmMpamSubnames[] =
{
"Processor cache", /* ACPI_MPAM_LOCATION_TYPE_PROCESSOR_CACHE */
"Memory", /* ACPI_MPAM_LOCATION_TYPE_MEMORY */
"SMMU", /* ACPI_MPAM_LOCATION_TYPE_SMMU */
"Memory-side cache", /* ACPI_MPAM_LOCATION_TYPE_MEMORY_CACHE */
"ACPI device", /* ACPI_MPAM_LOCATION_TYPE_ACPI_DEVICE */
"Interconnect", /* ACPI_MPAM_LOCATION_TYPE_INTERCONNECT */
"Unknown" /* ACPI_MPAM_LOCATION_TYPE_UNKNOWN */
};
static const char *AcpiDmNfitSubnames[] =
{
"System Physical Address Range", /* ACPI_NFIT_TYPE_SYSTEM_ADDRESS */
@ -672,6 +692,7 @@ const ACPI_DMTABLE_DATA AcpiDmTableData[] =
{ACPI_SIG_AGDI, AcpiDmTableInfoAgdi, NULL, NULL, TemplateAgdi},
{ACPI_SIG_APMT, NULL, AcpiDmDumpApmt, DtCompileApmt, TemplateApmt},
{ACPI_SIG_ASF, NULL, AcpiDmDumpAsf, DtCompileAsf, TemplateAsf},
{ACPI_SIG_ASPT, NULL, AcpiDmDumpAspt, DtCompileAspt, TemplateAspt},
{ACPI_SIG_BDAT, AcpiDmTableInfoBdat, NULL, NULL, TemplateBdat},
{ACPI_SIG_BERT, AcpiDmTableInfoBert, NULL, NULL, TemplateBert},
{ACPI_SIG_BGRT, AcpiDmTableInfoBgrt, NULL, NULL, TemplateBgrt},
@ -700,6 +721,7 @@ const ACPI_DMTABLE_DATA AcpiDmTableData[] =
{ACPI_SIG_MADT, NULL, AcpiDmDumpMadt, DtCompileMadt, TemplateMadt},
{ACPI_SIG_MCFG, NULL, AcpiDmDumpMcfg, DtCompileMcfg, TemplateMcfg},
{ACPI_SIG_MCHI, AcpiDmTableInfoMchi, NULL, NULL, TemplateMchi},
{ACPI_SIG_MPAM, NULL, AcpiDmDumpMpam, DtCompileMpam, TemplateMpam},
{ACPI_SIG_MPST, AcpiDmTableInfoMpst, AcpiDmDumpMpst, DtCompileMpst, TemplateMpst},
{ACPI_SIG_MSCT, NULL, AcpiDmDumpMsct, DtCompileMsct, TemplateMsct},
{ACPI_SIG_MSDM, NULL, AcpiDmDumpSlic, DtCompileSlic, TemplateMsdm},
@ -713,6 +735,7 @@ const ACPI_DMTABLE_DATA AcpiDmTableData[] =
{ACPI_SIG_PRMT, NULL, AcpiDmDumpPrmt, DtCompilePrmt, TemplatePrmt},
{ACPI_SIG_RASF, AcpiDmTableInfoRasf, NULL, NULL, TemplateRasf},
{ACPI_SIG_RGRT, NULL, AcpiDmDumpRgrt, DtCompileRgrt, TemplateRgrt},
{ACPI_SIG_RHCT, NULL, AcpiDmDumpRhct, DtCompileRhct, TemplateRhct},
{ACPI_SIG_RSDT, NULL, AcpiDmDumpRsdt, DtCompileRsdt, TemplateRsdt},
{ACPI_SIG_S3PT, NULL, NULL, NULL, TemplateS3pt},
{ACPI_SIG_SBST, AcpiDmTableInfoSbst, NULL, NULL, TemplateSbst},
@ -1128,6 +1151,7 @@ AcpiDmDumpTable (
case ACPI_DMT_IVRS_DE:
case ACPI_DMT_GTDT:
case ACPI_DMT_MADT:
case ACPI_DMT_MPAM_LOCATOR:
case ACPI_DMT_NHLT1:
case ACPI_DMT_NHLT1a:
case ACPI_DMT_NHLT1b:
@ -1158,6 +1182,7 @@ AcpiDmDumpTable (
ByteLength = 1;
break;
case ACPI_DMT_ASPT:
case ACPI_DMT_UINT16:
case ACPI_DMT_DMAR:
case ACPI_DMT_HEST:
@ -1375,7 +1400,7 @@ AcpiDmDumpTable (
AcpiOsPrintf ("%2.2X\n", (*Target >> 2) & 0xFF);
break;
case ACPI_DMT_FLAGS4:
case ACPI_DMT_FLAGS4:
AcpiOsPrintf ("%1.1X\n", (*Target >> 4) & 0x03);
break;
@ -1661,6 +1686,17 @@ AcpiDmDumpTable (
AcpiDmAestXruptNames[Temp8]);
break;
case ACPI_DMT_ASPT:
/* ASPT subtable types */
Temp16 = ACPI_GET16(Target);
if (Temp16 > ACPI_ASPT_TYPE_UNKNOWN)
{
Temp16 = ACPI_ASPT_TYPE_UNKNOWN;
}
AcpiOsPrintf(UINT16_FORMAT, Temp16, AcpiDmAsptSubnames[Temp16]);
break;
case ACPI_DMT_ASF:
/* ASF subtable types */
@ -1890,6 +1926,20 @@ AcpiDmDumpTable (
AcpiDmMadtSubnames[Temp8]);
break;
case ACPI_DMT_MPAM_LOCATOR:
/* MPAM subtable locator types */
Temp8 = *Target;
if (Temp8 > ACPI_MPAM_LOCATION_TYPE_INTERCONNECT)
{
Temp8 = ACPI_MPAM_LOCATION_TYPE_INTERCONNECT + 1;
}
AcpiOsPrintf (UINT8_FORMAT, *Target,
AcpiDmMpamSubnames[Temp8]);
break;
case ACPI_DMT_NFIT:
/* NFIT subtable types */

2
source/common/dmtables.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

2
source/common/dmtbdump.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

93
source/common/dmtbdump1.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License
@ -609,6 +609,95 @@ AcpiDmDumpAsf (
}
}
/*******************************************************************************
*
* FUNCTION: AcpiDmDumpAspt
*
* PARAMETERS: Table - A ASPT table
*
* RETURN: None
*
* DESCRIPTION: Format the contents of a ASPT table
*
******************************************************************************/
void
AcpiDmDumpAspt (
ACPI_TABLE_HEADER *Table)
{
ACPI_STATUS Status;
UINT32 Offset = sizeof (ACPI_TABLE_ASPT);
UINT32 Length = Table->Length;
ACPI_ASPT_HEADER *Subtable;
ACPI_DMTABLE_INFO *InfoTable;
UINT16 Type;
/* Main table */
Status = AcpiDmDumpTable(Length, 0, Table, 0, AcpiDmTableInfoAspt);
/* Subtables */
Subtable = ACPI_ADD_PTR (ACPI_ASPT_HEADER, Table, Offset);
while (Offset < Table->Length)
{
AcpiOsPrintf ("\n");
/* Common subtable header */
Status = AcpiDmDumpTable (Table->Length, Offset, Subtable,
Subtable->Length, AcpiDmTableInfoAsptHdr);
if (ACPI_FAILURE (Status))
{
return;
}
Type = Subtable->Type;
switch (Type)
{
case ACPI_ASPT_TYPE_GLOBAL_REGS:
InfoTable = AcpiDmTableInfoAspt0;
break;
case ACPI_ASPT_TYPE_SEV_MBOX_REGS:
InfoTable = AcpiDmTableInfoAspt1;
break;
case ACPI_ASPT_TYPE_ACPI_MBOX_REGS:
InfoTable = AcpiDmTableInfoAspt2;
break;
default:
AcpiOsPrintf ("\n**** Unknown ASPT subtable type 0x%X\n",
Subtable->Type);
return;
}
Status = AcpiDmDumpTable (Table->Length, Offset, Subtable,
Subtable->Length, InfoTable);
if (ACPI_FAILURE (Status))
{
return;
}
AcpiOsPrintf ("\n");
/* Point to next subtable */
if (!Subtable->Length)
{
AcpiOsPrintf ("Invalid zero subtable header length\n");
return;
}
Offset += Subtable->Length;
Subtable = ACPI_ADD_PTR (ACPI_ASPT_HEADER, Subtable,
Subtable->Length);
}
}
/*******************************************************************************
*
@ -2030,7 +2119,7 @@ AcpiDmDumpHmat (
return;
}
/* Dump HMAT structure additionals */
/* Dump HMAT structure additional */
switch (HmatStruct->Type)
{

242
source/common/dmtbdump2.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License
@ -1129,6 +1129,124 @@ AcpiDmDumpMcfg (
}
}
/*******************************************************************************
*
* FUNCTION: AcpiDmDumpMpam
*
* PARAMETERS: Table - A MPAM table
*
* RETURN: None
*
* DESCRIPTION: Format the contents of a MPAM table
*
******************************************************************************/
void
AcpiDmDumpMpam (
ACPI_TABLE_HEADER *Table)
{
ACPI_STATUS Status;
ACPI_MPAM_MSC_NODE *MpamMscNode;
ACPI_MPAM_RESOURCE_NODE *MpamResourceNode;
ACPI_DMTABLE_INFO *InfoTable;
UINT32 Offset = sizeof(ACPI_TABLE_HEADER);
UINT32 MpamResourceNodeLength = 0;
while (Offset < Table->Length)
{
MpamMscNode = ACPI_ADD_PTR (ACPI_MPAM_MSC_NODE, Table, Offset);
/* Subtable: MSC */
Status = AcpiDmDumpTable (MpamMscNode->Length, 0, MpamMscNode, 0,
AcpiDmTableInfoMpam0);
if (ACPI_FAILURE (Status))
{
return;
}
/* Offset the start of the array of resources */
Offset += sizeof(ACPI_MPAM_MSC_NODE);
/* Subtable: MSC RIS(es) */
for (UINT32 ResourceIdx = 0; ResourceIdx < MpamMscNode->NumResouceNodes; ResourceIdx++)
{
MpamResourceNode = ACPI_ADD_PTR (ACPI_MPAM_RESOURCE_NODE, Table, Offset);
MpamResourceNodeLength = sizeof(ACPI_MPAM_RESOURCE_NODE) +
MpamResourceNode->NumFunctionalDeps * sizeof(ACPI_MPAM_FUNC_DEPS);
Offset += MpamResourceNodeLength;
/* Subtable: MSC RIS */
Status = AcpiDmDumpTable (MpamResourceNodeLength, 0, MpamResourceNode, 0,
AcpiDmTableInfoMpam1);
if (ACPI_FAILURE (Status))
{
return;
}
switch (MpamResourceNode->LocatorType)
{
case ACPI_MPAM_LOCATION_TYPE_PROCESSOR_CACHE:
InfoTable = AcpiDmTableInfoMpam1A;
break;
case ACPI_MPAM_LOCATION_TYPE_MEMORY:
InfoTable = AcpiDmTableInfoMpam1B;
break;
case ACPI_MPAM_LOCATION_TYPE_SMMU:
InfoTable = AcpiDmTableInfoMpam1C;
break;
case ACPI_MPAM_LOCATION_TYPE_MEMORY_CACHE:
InfoTable = AcpiDmTableInfoMpam1D;
break;
case ACPI_MPAM_LOCATION_TYPE_ACPI_DEVICE:
InfoTable = AcpiDmTableInfoMpam1E;
break;
case ACPI_MPAM_LOCATION_TYPE_INTERCONNECT:
InfoTable = AcpiDmTableInfoMpam1F;
break;
case ACPI_MPAM_LOCATION_TYPE_UNKNOWN:
InfoTable = AcpiDmTableInfoMpam1G;
default:
AcpiOsPrintf ("\n**** Unknown MPAM locator type 0x%X\n",
MpamResourceNode->LocatorType);
return;
}
/* Subtable: MSC Resource Locator(s) */
Status = AcpiDmDumpTable (sizeof(ACPI_MPAM_RESOURCE_LOCATOR), 0,
&MpamResourceNode->Locator, 0, InfoTable);
if (ACPI_FAILURE (Status))
{
return;
}
/* Get the number of functional dependencies of an RIS */
Status = AcpiDmDumpTable (sizeof(UINT32), 0, &MpamResourceNode->NumFunctionalDeps, 0,
AcpiDmTableInfoMpam1Deps);
if (ACPI_FAILURE (Status))
{
return;
}
/* Subtable: MSC functional dependencies */
for (UINT32 funcDep = 0; funcDep < MpamResourceNode->NumFunctionalDeps; funcDep++)
{
Status = AcpiDmDumpTable (sizeof(ACPI_MPAM_FUNC_DEPS), 0,
&MpamResourceNode->NumFunctionalDeps, 0, AcpiDmTableInfoMpam2);
if (ACPI_FAILURE (Status))
{
return;
}
}
AcpiOsPrintf ("\n\n");
}
}
return;
}
/*******************************************************************************
*
@ -1420,7 +1538,7 @@ AcpiDmDumpNfit (
/* Has a variable number of 64-bit addresses at the end */
InfoTable = AcpiDmTableInfoNfit6;
FieldOffset = sizeof (ACPI_NFIT_FLUSH_ADDRESS) - sizeof (UINT64);
FieldOffset = sizeof (ACPI_NFIT_FLUSH_ADDRESS);
break;
case ACPI_NFIT_TYPE_CAPABILITIES: /* ACPI 6.0A */
@ -1474,12 +1592,12 @@ AcpiDmDumpNfit (
case ACPI_NFIT_TYPE_SMBIOS:
Length = Subtable->Length -
sizeof (ACPI_NFIT_SMBIOS) + sizeof (UINT8);
sizeof (ACPI_NFIT_SMBIOS);
if (Length)
{
Status = AcpiDmDumpTable (Table->Length,
sizeof (ACPI_NFIT_SMBIOS) - sizeof (UINT8),
sizeof (ACPI_NFIT_SMBIOS),
SmbiosInfo,
Length, AcpiDmTableInfoNfit3a);
if (ACPI_FAILURE (Status))
@ -2627,6 +2745,122 @@ AcpiDmDumpRgrt (
}
/*******************************************************************************
*
* FUNCTION: AcpiDmDumpRhct
*
* PARAMETERS: Table - A RHCT table
*
* RETURN: None
*
* DESCRIPTION: Format the contents of a RHCT.
*
******************************************************************************/
void
AcpiDmDumpRhct (
ACPI_TABLE_HEADER *Table)
{
ACPI_STATUS Status;
ACPI_RHCT_NODE_HEADER *Subtable;
ACPI_RHCT_HART_INFO *RhctHartInfo;
ACPI_RHCT_ISA_STRING *RhctIsaString;
UINT32 Length = Table->Length;
UINT8 SubtableOffset, IsaPadOffset;
UINT32 Offset = sizeof (ACPI_TABLE_RHCT);
UINT32 i;
/* Main table */
Status = AcpiDmDumpTable (Length, 0, Table, 0, AcpiDmTableInfoRhct);
if (ACPI_FAILURE (Status))
{
return;
}
/* Subtables */
while (Offset < Table->Length)
{
AcpiOsPrintf ("\n");
/* Common subtable header */
Subtable = ACPI_ADD_PTR (ACPI_RHCT_NODE_HEADER, Table, Offset);
if (Subtable->Length < sizeof (ACPI_RHCT_NODE_HEADER))
{
AcpiOsPrintf ("Invalid subtable length\n");
return;
}
Status = AcpiDmDumpTable (Table->Length, Offset, Subtable,
Subtable->Length, AcpiDmTableInfoRhctNodeHdr);
if (ACPI_FAILURE (Status))
{
return;
}
Length = sizeof (ACPI_RHCT_NODE_HEADER);
if (Subtable->Length < Length)
{
AcpiOsPrintf ("Invalid subtable length\n");
return;
}
SubtableOffset = (UINT8) Length;
switch (Subtable->Type)
{
case ACPI_RHCT_NODE_TYPE_HART_INFO:
Status = AcpiDmDumpTable (Table->Length, Offset + SubtableOffset,
ACPI_ADD_PTR (ACPI_RHCT_HART_INFO, Subtable, SubtableOffset),
sizeof (ACPI_RHCT_HART_INFO), AcpiDmTableInfoRhctHartInfo1);
RhctHartInfo = ACPI_ADD_PTR (ACPI_RHCT_HART_INFO, Subtable, SubtableOffset);
if ((UINT16)(Subtable->Length - SubtableOffset) <
(UINT16)(RhctHartInfo->NumOffsets * 4))
{
AcpiOsPrintf ("Invalid number of offsets\n");
return;
}
SubtableOffset += sizeof (ACPI_RHCT_HART_INFO);
for (i = 0; i < RhctHartInfo->NumOffsets; i++)
{
Status = AcpiDmDumpTable (Table->Length, Offset + SubtableOffset,
ACPI_ADD_PTR (UINT32, Subtable, SubtableOffset),
4, AcpiDmTableInfoRhctHartInfo2);
if (ACPI_FAILURE (Status))
{
return;
}
SubtableOffset += 4;
}
break;
case ACPI_RHCT_NODE_TYPE_ISA_STRING:
RhctIsaString = ACPI_ADD_PTR (ACPI_RHCT_ISA_STRING, Subtable, SubtableOffset);
IsaPadOffset = (UINT8) (SubtableOffset + 2 + RhctIsaString->IsaLength);
Status = AcpiDmDumpTable (Table->Length, Offset + SubtableOffset,
RhctIsaString, RhctIsaString->IsaLength, AcpiDmTableInfoRhctIsa1);
if (Subtable->Length > IsaPadOffset)
{
Status = AcpiDmDumpTable (Table->Length, Offset + SubtableOffset,
ACPI_ADD_PTR (UINT8, Subtable, IsaPadOffset),
(Subtable->Length - IsaPadOffset), AcpiDmTableInfoRhctIsaPad);
}
default:
break;
}
/* Point to next subtable */
Offset += Subtable->Length;
}
}
/*******************************************************************************
*
* FUNCTION: AcpiDmDumpS3pt

2
source/common/dmtbdump3.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

2
source/common/dmtbinfo.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

55
source/common/dmtbinfo1.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License
@ -433,6 +433,57 @@ ACPI_DMTABLE_INFO AcpiDmTableInfoAsf4[] =
};
/*******************************************************************************
*
* ASPT - AMD Secure Processor table (Signature "ASPT")
*
******************************************************************************/
ACPI_DMTABLE_INFO AcpiDmTableInfoAspt[] =
{
{ACPI_DMT_UINT32, ACPI_ASPT_OFFSET(NumEntries), "Number of Subtables", 0},
ACPI_DMT_TERMINATOR
};
/* Common Subtable header (one per Subtable) */
ACPI_DMTABLE_INFO AcpiDmTableInfoAsptHdr[] =
{
{ACPI_DMT_ASPT, ACPI_ASPTH_OFFSET(Type), "Type", 0},
{ACPI_DMT_UINT16, ACPI_ASPTH_OFFSET(Length), "Length", 0},
ACPI_DMT_TERMINATOR
};
/* 0: ASPT Global Registers */
ACPI_DMTABLE_INFO AcpiDmTableInfoAspt0[] =
{
{ACPI_DMT_UINT32, ACPI_ASPT0_OFFSET(Reserved), "Reserved", 0},
{ACPI_DMT_UINT64, ACPI_ASPT0_OFFSET(FeatureRegAddr), "Feature Register Address", 0},
{ACPI_DMT_UINT64, ACPI_ASPT0_OFFSET(IrqEnRegAddr), "Interrupt Enable Register Address", 0},
{ACPI_DMT_UINT64, ACPI_ASPT0_OFFSET(IrqStRegAddr), "Interrupt Status Register Address", 0},
ACPI_DMT_TERMINATOR
};
/* 1: ASPT SEV Mailbox Registers */
ACPI_DMTABLE_INFO AcpiDmTableInfoAspt1[] =
{
{ACPI_DMT_UINT8, ACPI_ASPT1_OFFSET(MboxIrqId), "Mailbox Interrupt ID", 0},
{ACPI_DMT_UINT24, ACPI_ASPT1_OFFSET(Reserved[0]), "Reserved", 0},
{ACPI_DMT_UINT64, ACPI_ASPT1_OFFSET(CmdRespRegAddr), "CmdResp Register Address", 0},
{ACPI_DMT_UINT64, ACPI_ASPT1_OFFSET(CmdBufLoRegAddr), "CmdBufAddr_Lo Register Address", 0},
{ACPI_DMT_UINT64, ACPI_ASPT1_OFFSET(CmdBufHiRegAddr), "CmdBufAddr_Hi Register Address", 0},
ACPI_DMT_TERMINATOR
};
/* 2: ASPT ACPI Maiblox Registers */
ACPI_DMTABLE_INFO AcpiDmTableInfoAspt2[] =
{
{ACPI_DMT_UINT32, ACPI_ASPT2_OFFSET(Reserved1), "Reserved", 0},
{ACPI_DMT_UINT64, ACPI_ASPT2_OFFSET(CmdRespRegAddr), "CmdResp Register Address", 0},
{ACPI_DMT_UINT64, ACPI_ASPT2_OFFSET(Reserved2[0]), "Reserved", 0},
{ACPI_DMT_UINT64, ACPI_ASPT2_OFFSET(Reserved2[1]), "Reserved", 0},
ACPI_DMT_TERMINATOR
};
/*******************************************************************************
*
* BDAT - BIOS Data ACPI Table
@ -896,7 +947,7 @@ ACPI_DMTABLE_INFO AcpiDmTableInfoDmar4[] =
{
{ACPI_DMT_UINT24, ACPI_DMAR4_OFFSET (Reserved[0]), "Reserved", 0},
{ACPI_DMT_UINT8, ACPI_DMAR4_OFFSET (DeviceNumber), "Device Number", 0},
{ACPI_DMT_STRING, ACPI_DMAR4_OFFSET (DeviceName[0]), "Device Name", 0},
{ACPI_DMT_STRING, ACPI_DMAR4_OFFSET (u.DeviceName[0]), "Device Name", 0},
ACPI_DMT_TERMINATOR
};

191
source/common/dmtbinfo2.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License
@ -864,6 +864,7 @@ ACPI_DMTABLE_INFO AcpiDmTableInfoMadt11[] =
{ACPI_DMT_UINT8, ACPI_MADT11_OFFSET (EfficiencyClass), "Efficiency Class", 0},
{ACPI_DMT_UINT8, ACPI_MADT11_OFFSET (Reserved2[0]), "Reserved", 0},
{ACPI_DMT_UINT16, ACPI_MADT11_OFFSET (SpeInterrupt), "SPE Overflow Interrupt", 0},
{ACPI_DMT_UINT16, ACPI_MADT11_OFFSET (TrbeInterrupt), "TRBE Interrupt", 0},
ACPI_DMT_TERMINATOR
};
@ -979,6 +980,133 @@ ACPI_DMTABLE_INFO AcpiDmTableInfoMchi[] =
ACPI_DMT_TERMINATOR
};
/*******************************************************************************
*
* MPAM - Memory System Resource Partitioning and Monitoring Tables
* Arm's DEN0065 MPAM ACPI 2.0. December 2022.
******************************************************************************/
/* MPAM subtables */
/* 0: MPAM Resource Node Structure - A root MSC table.
* Arm's DEN0065 MPAM ACPI 2.0. Table 4: MPAM MSC node body.
*/
ACPI_DMTABLE_INFO AcpiDmTableInfoMpam0[] =
{
{ACPI_DMT_UINT16, ACPI_MPAM0_OFFSET (Length), "Length", 0},
{ACPI_DMT_UINT8, ACPI_MPAM0_OFFSET (InterfaceType), "Interface type", 0},
{ACPI_DMT_UINT8, ACPI_MPAM0_OFFSET (Reserved), "Reserved", 0},
{ACPI_DMT_UINT32, ACPI_MPAM0_OFFSET (Identifier), "Identifier", 0},
{ACPI_DMT_UINT64, ACPI_MPAM0_OFFSET (BaseAddress), "Base address", 0},
{ACPI_DMT_UINT32, ACPI_MPAM0_OFFSET (MMIOSize), "MMIO size", 0},
{ACPI_DMT_UINT32, ACPI_MPAM0_OFFSET (OverflowInterrupt), "Overflow interrupt", 0},
{ACPI_DMT_UINT32, ACPI_MPAM0_OFFSET (OverflowInterruptFlags), "Overflow interrupt flags", 0},
{ACPI_DMT_UINT32, ACPI_MPAM0_OFFSET (Reserved1), "Reserved1", 0},
{ACPI_DMT_UINT32, ACPI_MPAM0_OFFSET (OverflowInterruptAffinity), "Overflow interrupt affinity", 0},
{ACPI_DMT_UINT32, ACPI_MPAM0_OFFSET (ErrorInterrupt), "Error interrupt", 0},
{ACPI_DMT_UINT32, ACPI_MPAM0_OFFSET (ErrorInterruptFlags), "Error interrupt flags", 0},
{ACPI_DMT_UINT32, ACPI_MPAM0_OFFSET (Reserved2), "Reserved2", 0},
{ACPI_DMT_UINT32, ACPI_MPAM0_OFFSET (ErrorInterruptAffinity), "Error interrupt affinity", 0},
{ACPI_DMT_UINT32, ACPI_MPAM0_OFFSET (MaxNrdyUsec), "MAX_NRDY_USEC", 0},
{ACPI_DMT_NAME8, ACPI_MPAM0_OFFSET (HardwareIdLinkedDevice), "Hardware ID of linked device", 0},
{ACPI_DMT_UINT32, ACPI_MPAM0_OFFSET (InstanceIdLinkedDevice), "Instance ID of linked device", 0},
{ACPI_DMT_UINT32, ACPI_MPAM0_OFFSET (NumResouceNodes), "Number of resource nodes", 0},
ACPI_DMT_TERMINATOR
};
/* 1: MPAM Resource (RIS) Node Structure - A subtable of MSC Nodes.
* Arm's DEN0065 MPAM ACPI 2.0. Table 9: Resource node.
*/
ACPI_DMTABLE_INFO AcpiDmTableInfoMpam1[] =
{
{ACPI_DMT_UINT32, ACPI_MPAM1_OFFSET (Identifier), "Identifier", 0},
{ACPI_DMT_UINT8, ACPI_MPAM1_OFFSET (RISIndex), "RIS Index", 0},
{ACPI_DMT_UINT16, ACPI_MPAM1_OFFSET (Reserved1), "Reserved1", 0},
{ACPI_DMT_MPAM_LOCATOR, ACPI_MPAM1_OFFSET (LocatorType), "Locator type", 0},
ACPI_DMT_TERMINATOR
};
/* An RIS field part of the RIS subtable */
ACPI_DMTABLE_INFO AcpiDmTableInfoMpam1Deps[] =
{
{ACPI_DMT_UINT32, 0, "Number of functional dependencies", 0},
ACPI_DMT_TERMINATOR
};
/* 1A: MPAM Processor cache locator descriptor. A subtable of RIS.
* Arm's DEN0065 MPAM ACPI 2.0. Table 13.
*/
ACPI_DMTABLE_INFO AcpiDmTableInfoMpam1A[] =
{
{ACPI_DMT_UINT64, ACPI_MPAM1A_OFFSET (CacheReference), "Cache reference", 0},
{ACPI_DMT_UINT32, ACPI_MPAM1A_OFFSET (Reserved), "Reserved", 0},
};
/* 1B: MPAM Memory locator descriptor. A subtable of RIS.
* Arm's DEN0065 MPAM ACPI 2.0. Table 14.
*/
ACPI_DMTABLE_INFO AcpiDmTableInfoMpam1B[] =
{
{ACPI_DMT_UINT64, ACPI_MPAM1B_OFFSET (ProximityDomain), "Proximity domain", 0},
{ACPI_DMT_UINT32, ACPI_MPAM1B_OFFSET (Reserved), "Reserved", 0},
};
/* 1C: MPAM SMMU locator descriptor. A subtable of RIS.
* Arm's DEN0065 MPAM ACPI 2.0. Table 15.
*/
ACPI_DMTABLE_INFO AcpiDmTableInfoMpam1C[] =
{
{ACPI_DMT_UINT64, ACPI_MPAM1C_OFFSET (SmmuInterface), "SMMU Interface", 0},
{ACPI_DMT_UINT32, ACPI_MPAM1C_OFFSET (Reserved), "Reserved", 0},
};
/* 1D: MPAM Memory-side cache locator descriptor. A subtable of RIS.
* Arm's DEN0065 MPAM ACPI 2.0. Table 16.
*/
ACPI_DMTABLE_INFO AcpiDmTableInfoMpam1D[] =
{
{ACPI_DMT_UINT56, ACPI_MPAM1D_OFFSET (Level), "Reserved", 0},
{ACPI_DMT_UINT8, ACPI_MPAM1D_OFFSET (Level), "Level", 0},
{ACPI_DMT_UINT32, ACPI_MPAM1D_OFFSET (Reference), "Reference", 0},
};
/* 1E: MPAM ACPI device locator descriptor. A subtable of RIS.
* Arm's DEN0065 MPAM ACPI 2.0. Table 17.
*/
ACPI_DMTABLE_INFO AcpiDmTableInfoMpam1E[] =
{
{ACPI_DMT_UINT64, ACPI_MPAM1E_OFFSET (AcpiHwId), "ACPI Hardware ID", 0},
{ACPI_DMT_UINT32, ACPI_MPAM1E_OFFSET (AcpiUniqueId), "ACPI Unique ID", 0},
};
/* 1F: MPAM Interconnect locator descriptor. A subtable of RIS.
* Arm's DEN0065 MPAM ACPI 2.0. Table 18.
*/
ACPI_DMTABLE_INFO AcpiDmTableInfoMpam1F[] =
{
{ACPI_DMT_UINT64, ACPI_MPAM1F_OFFSET (InterConnectDescTblOff), "Interconnect descriptor table offset", 0},
{ACPI_DMT_UINT32, ACPI_MPAM1F_OFFSET (Reserved), "Reserved", 0},
};
/* 1G: MPAM Locator structure.
* Arm's DEN0065 MPAM ACPI 2.0. Table 12.
*/
ACPI_DMTABLE_INFO AcpiDmTableInfoMpam1G[] =
{
{ACPI_DMT_UINT64, ACPI_MPAM1G_OFFSET (Descriptor1), "Descriptor1", 0},
{ACPI_DMT_UINT32, ACPI_MPAM1G_OFFSET (Descriptor2), "Descriptor2", 0},
};
/* 2: MPAM Functional dependency descriptor.
* Arm's DEN0065 MPAM ACPI 2.0. Table 10.
*/
ACPI_DMTABLE_INFO AcpiDmTableInfoMpam2[] =
{
{ACPI_DMT_UINT32, ACPI_MPAM2_OFFSET (Producer), "Producer", 0},
{ACPI_DMT_UINT32, ACPI_MPAM2_OFFSET (Reserved), "Reserved", 0},
};
/*******************************************************************************
*
@ -1944,6 +2072,67 @@ ACPI_DMTABLE_INFO AcpiDmTableInfoRgrt0[] =
};
/*******************************************************************************
*
* RHCT - RISC-V Hart Capabilities Table
*
******************************************************************************/
ACPI_DMTABLE_INFO AcpiDmTableInfoRhct[] =
{
{ACPI_DMT_UINT32, ACPI_RHCT_OFFSET (Reserved), "Reserved", 0},
{ACPI_DMT_UINT64, ACPI_RHCT_OFFSET (TimeBaseFreq), "Timer Base Frequency", 0},
{ACPI_DMT_UINT32, ACPI_RHCT_OFFSET (NodeCount), "Number of nodes", 0},
{ACPI_DMT_UINT32, ACPI_RHCT_OFFSET (NodeOffset), "Offset to the node array", 0},
ACPI_DMT_TERMINATOR
};
/* Common Subtable header (one per Subtable) */
ACPI_DMTABLE_INFO AcpiDmTableInfoRhctNodeHdr[] =
{
{ACPI_DMT_UINT16, ACPI_RHCTH_OFFSET (Type), "Subtable Type", 0},
{ACPI_DMT_UINT16, ACPI_RHCTH_OFFSET (Length), "Length", 0},
{ACPI_DMT_UINT16, ACPI_RHCTH_OFFSET (Revision), "Revision", 0},
ACPI_DMT_TERMINATOR
};
/* 0: ISA string type */
ACPI_DMTABLE_INFO AcpiDmTableInfoRhctIsa1[] =
{
{ACPI_DMT_UINT16, ACPI_RHCT0_OFFSET (IsaLength), "ISA string length", 0},
{ACPI_DMT_STRING, ACPI_RHCT0_OFFSET (Isa[0]), "ISA string", 0},
ACPI_DMT_TERMINATOR
};
/* Optional padding field */
ACPI_DMTABLE_INFO AcpiDmTableInfoRhctIsaPad[] =
{
{ACPI_DMT_RAW_BUFFER, 0, "Optional Padding", DT_OPTIONAL},
ACPI_DMT_TERMINATOR
};
/* 0xFFFF: Hart Info type */
ACPI_DMTABLE_INFO AcpiDmTableInfoRhctHartInfo1[] =
{
{ACPI_DMT_UINT16, ACPI_RHCTFFFF_OFFSET (NumOffsets), "Number of offsets", 0},
{ACPI_DMT_UINT32, ACPI_RHCTFFFF_OFFSET (Uid), "Processor UID", 0},
ACPI_DMT_TERMINATOR
};
ACPI_DMTABLE_INFO AcpiDmTableInfoRhctHartInfo2[] =
{
{ACPI_DMT_UINT32, 0, "Nodes", DT_OPTIONAL},
ACPI_DMT_TERMINATOR
};
/*******************************************************************************
*
* S3PT - S3 Performance Table

2
source/common/dmtbinfo3.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

2
source/common/getopt.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

8
source/compiler/aslallocate.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License
@ -295,9 +295,13 @@ void
UtFreeLineBuffers (
void)
{
free (AslGbl_CurrentLineBuffer);
free (AslGbl_MainTokenBuffer);
free (AslGbl_MacroTokenBuffer);
free (AslGbl_MacroTokenReplaceBuffer);
free (AslGbl_ExpressionTokenBuffer);
}

2
source/compiler/aslanalyze.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

2
source/compiler/aslascii.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

5
source/compiler/aslbtypes.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License
@ -501,10 +501,11 @@ AnGetBtype (
ACPI_PARSE_OBJECT *ReferencedNode;
UINT32 ThisNodeBtype = 0;
ACPI_FUNCTION_NAME (AnGetBtype);
if (!Op)
{
AcpiOsPrintf ("Null Op in AnGetBtype\n");
AcpiOsPrintf ("Null Op in %s\n", ACPI_GET_FUNCTION_NAME);
return (ACPI_UINT32_MAX);
}

2
source/compiler/aslcache.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

2
source/compiler/aslcodegen.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

2
source/compiler/aslcompile.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

5
source/compiler/aslcompiler.h
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License
@ -1566,6 +1566,9 @@ ASL_RESOURCE_NODE *
RsDoPinGroupConfigDescriptor (
ASL_RESOURCE_INFO *Info);
ASL_RESOURCE_NODE *
RsDoClockInputDescriptor (
ASL_RESOURCE_INFO *Info);
/*
* aslrestype2d - DWord address descriptors

14
source/compiler/aslcompiler.l
View file

@ -9,7 +9,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License
@ -461,6 +461,7 @@ NamePathTail [.]{NameSeg}
"PinGroup" { count (1); return (PARSEOP_PINGROUP); }
"PinGroupConfig" { count (1); return (PARSEOP_PINGROUPCONFIG); }
"PinGroupFunction" { count (1); return (PARSEOP_PINGROUPFUNCTION); }
"ClockInput" { count (1); return (PARSEOP_CLOCKINPUT); }
"QWordIO" { count (1); return (PARSEOP_QWORDIO); }
"QWordMemory" { count (1); return (PARSEOP_QWORDMEMORY); }
"QWordSpace" { count (1); return (PARSEOP_QWORDSPACE); }
@ -665,6 +666,17 @@ NamePathTail [.]{NameSeg}
"PullDown" { count (0); return (PARSEOP_PIN_PULLDOWN); }
"PullNone" { count (0); return (PARSEOP_PIN_NOPULL); }
/* ClockScaleKeyword: Resource Descriptors (ACPI 6.5) */
"Hz" { count (0); return (PARSEOP_CLOCK_HZ); }
"KHz" { count (0); return (PARSEOP_CLOCK_KHZ); }
"MHz" { count (0); return (PARSEOP_CLOCK_MHZ); }
/* ClockModeKeyword: Resource Descriptors (ACPI 6.5) */
"Fixed" { count (0); return (PARSEOP_CLOCK_FIXED); }
"Variable" { count (0); return (PARSEOP_CLOCK_VARIABLE); }
/* PolarityKeyword: Resource Descriptors (ACPI 5.0) */
"PolarityLow" { count (0); return (PARSEOP_DEVICEPOLARITY_LOW); }

2
source/compiler/aslcstyle.y
View file

@ -9,7 +9,7 @@ NoEcho('
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

2
source/compiler/asldebug.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

2
source/compiler/asldefine.h
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

2
source/compiler/aslerror.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

2
source/compiler/aslexternal.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

2
source/compiler/aslfileio.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

2
source/compiler/aslfiles.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

2
source/compiler/aslfold.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

2
source/compiler/aslglobal.h
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

2
source/compiler/aslhelp.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

2
source/compiler/aslhelpers.y
View file

@ -9,7 +9,7 @@ NoEcho('
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

2
source/compiler/aslhex.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

13
source/compiler/aslkeywords.y
View file

@ -9,7 +9,7 @@ NoEcho('
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License
@ -462,3 +462,14 @@ XferTypeKeyword
| PARSEOP_XFERTYPE_8_16 {$$ = TrCreateLeafOp (PARSEOP_XFERTYPE_8_16);}
| PARSEOP_XFERTYPE_16 {$$ = TrCreateLeafOp (PARSEOP_XFERTYPE_16);}
;
ClockScaleKeyword
: PARSEOP_CLOCK_HZ {$$ = TrCreateLeafOp (PARSEOP_CLOCK_HZ);}
| PARSEOP_CLOCK_KHZ {$$ = TrCreateLeafOp (PARSEOP_CLOCK_KHZ);}
| PARSEOP_CLOCK_MHZ {$$ = TrCreateLeafOp (PARSEOP_CLOCK_MHZ);}
;
ClockModeKeyword
: PARSEOP_CLOCK_FIXED {$$ = TrCreateLeafOp (PARSEOP_CLOCK_FIXED);}
| PARSEOP_CLOCK_VARIABLE {$$ = TrCreateLeafOp (PARSEOP_CLOCK_VARIABLE);}
;

2
source/compiler/asllength.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

2
source/compiler/asllisting.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

2
source/compiler/asllistsup.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

2
source/compiler/aslload.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

2
source/compiler/asllookup.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

2
source/compiler/aslmain.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

8
source/compiler/aslmap.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License
@ -462,6 +462,12 @@ const ASL_MAPPING_ENTRY AslKeywordMapping [] =
/* PIN_PULLDEFAULT */ OP_TABLE_ENTRY (AML_BYTE_OP, 0, 0, 0),
/* PIN_PULLDOWN */ OP_TABLE_ENTRY (AML_BYTE_OP, 2, 0, 0),
/* PIN_PULLUP */ OP_TABLE_ENTRY (AML_BYTE_OP, 1, 0, 0),
/* CLOCKINPUT */ OP_TABLE_ENTRY (AML_DEFAULT_ARG_OP, 0, 0, 0),
/* CLOCK_HZ */ OP_TABLE_ENTRY (AML_BYTE_OP, 0, 0, 0),
/* CLOCK_KHZ */ OP_TABLE_ENTRY (AML_BYTE_OP, 1, 0, 0),
/* CLOCK_MHZ */ OP_TABLE_ENTRY (AML_BYTE_OP, 2, 0, 0),
/* CLOCK_FIXED */ OP_TABLE_ENTRY (AML_BYTE_OP, 0, 0, 0),
/* CLOCK_VARIABLE */ OP_TABLE_ENTRY (AML_BYTE_OP, 1, 0, 0),
/* POWERRESOURCE */ OP_TABLE_ENTRY (AML_POWER_RESOURCE_OP, 0, OP_AML_PACKAGE, 0),
/* PROCESSOR */ OP_TABLE_ENTRY (AML_PROCESSOR_OP, 0, OP_AML_PACKAGE, 0),
/* QWORDCONST */ OP_TABLE_ENTRY (AML_RAW_DATA_QWORD, 0, 0, ACPI_BTYPE_INTEGER),

2
source/compiler/aslmapenter.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

2
source/compiler/aslmapoutput.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

2
source/compiler/aslmaputils.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

2
source/compiler/aslmessages.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

2
source/compiler/aslmessages.h
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

2
source/compiler/aslmethod.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

2
source/compiler/aslnamesp.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

2
source/compiler/asloffset.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

2
source/compiler/aslopcodes.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

2
source/compiler/asloperands.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

2
source/compiler/aslopt.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

2
source/compiler/asloptions.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

6
source/compiler/aslparseop.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License
@ -817,6 +817,8 @@ TrAllocateOp (
ACPI_PARSE_OBJECT *Op;
ACPI_PARSE_OBJECT *LatestOp;
ACPI_FUNCTION_NAME (TrAllocateOp);
Op = UtParseOpCacheCalloc ();
@ -861,7 +863,7 @@ TrAllocateOp (
}
AslGbl_CommentState.LatestParseOp = Op;
CvDbgPrint ("TrAllocateOp=Set latest parse op to this op.\n");
CvDbgPrint ("%s=Set latest parse op to this op.\n", ACPI_GET_FUNCTION_NAME);
CvDbgPrint (" Op->Asl.ParseOpName = %s\n",
AslGbl_CommentState.LatestParseOp->Asl.ParseOpName);
CvDbgPrint (" Op->Asl.ParseOpcode = 0x%x\n", ParseOpcode);

4
source/compiler/aslparser.y
View file

@ -9,7 +9,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License
@ -208,7 +208,7 @@ AslLocalAllocate (
* These shift/reduce conflicts are expected. There should be zero
* reduce/reduce conflicts.
*/
%expect 127
%expect 128
/*! [Begin] no source code translation */

2
source/compiler/aslpld.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

2
source/compiler/aslpredef.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

2
source/compiler/aslprepkg.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

2
source/compiler/aslprimaries.y
View file

@ -11,7 +11,7 @@ NoEcho('
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

2
source/compiler/aslprintf.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

2
source/compiler/aslprune.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

8
source/compiler/aslresource.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License
@ -762,6 +762,12 @@ RsDoOneResourceDescriptor (
switch (Info->DescriptorTypeOp->Asl.ParseOpcode)
{
case PARSEOP_CLOCKINPUT:
Rnode = RsDoClockInputDescriptor(Info);
break;
case PARSEOP_DMA:
Rnode = RsDoDmaDescriptor (Info);

18
source/compiler/aslresources.y
View file

@ -11,7 +11,7 @@ NoEcho('
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License
@ -214,6 +214,7 @@ ResourceMacroTerm
| Memory32Term {}
| PinConfigTerm {}
| PinFunctionTerm {}
| ClockInputTerm {}
| PinGroupTerm {}
| PinGroupConfigTerm {}
| PinGroupFunctionTerm {}
@ -666,6 +667,21 @@ PinFunctionTerm
error PARSEOP_CLOSE_PAREN {$$ = AslDoError(); yyclearin;}
;
ClockInputTerm
: PARSEOP_CLOCKINPUT
PARSEOP_OPEN_PAREN {$<n>$ = TrCreateLeafOp (PARSEOP_CLOCKINPUT);}
DWordConstExpr /* 04: FrequencyNumerator */
',' WordConstExpr /* 06: FrequencyDivisor */
',' ClockScaleKeyword /* 08: Scale */
',' ClockModeKeyword /* 10: Mode*/
OptionalStringData /* 11: ResourceSource */
OptionalByteConstExpr /* 12: ResourceSourceIndex */
PARSEOP_CLOSE_PAREN {$$ = TrLinkOpChildren ($<n>3,6,$4,$6,$8,$10,$11,$12);}
| PARSEOP_CLOCKINPUT
PARSEOP_OPEN_PAREN
error PARSEOP_CLOSE_PAREN {$$ = AslDoError(); yyclearin;}
;
PinGroupTerm
: PARSEOP_PINGROUP
PARSEOP_OPEN_PAREN {$<n>$ = TrCreateLeafOp (PARSEOP_PINGROUP);}

2
source/compiler/aslrestype1.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

2
source/compiler/aslrestype1i.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

8
source/compiler/aslrestype2.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License
@ -337,7 +337,7 @@ RsDoInterruptDescriptor (
Descriptor->ExtendedIrq.InterruptCount = 0;
Rover = ACPI_CAST_PTR (AML_RESOURCE,
(&(Descriptor->ExtendedIrq.Interrupts[0])));
(&(Descriptor->ExtendedIrq.u.Interrupts[0])));
/* Process all child initialization nodes */
@ -466,7 +466,7 @@ RsDoInterruptDescriptor (
RsCreateDwordField (InitializerOp, ACPI_RESTAG_INTERRUPT,
CurrentByteOffset +
ASL_RESDESC_OFFSET (ExtendedIrq.Interrupts[0]));
ASL_RESDESC_OFFSET (ExtendedIrq.u.Interrupts[0]));
}
}
@ -494,7 +494,7 @@ RsDoInterruptDescriptor (
}
Rnode->BufferLength =
(ASL_RESDESC_OFFSET (ExtendedIrq.Interrupts[0]) -
(ASL_RESDESC_OFFSET (ExtendedIrq.u.Interrupts[0]) -
ASL_RESDESC_OFFSET (ExtendedIrq.DescriptorType))
+ OptionIndex + StringLength;
return (Rnode);

2
source/compiler/aslrestype2d.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

2
source/compiler/aslrestype2e.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

2
source/compiler/aslrestype2q.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

129
source/compiler/aslrestype2s.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License
@ -1550,7 +1550,6 @@ RsDoPinFunctionDescriptor (
UINT16 PinListLength;
UINT16 DescriptorSize;
UINT32 CurrentByteOffset;
UINT32 PinCount = 0;
UINT32 i;
InitializerOp = Info->DescriptorTypeOp->Asl.Child;
@ -1668,15 +1667,10 @@ RsDoPinFunctionDescriptor (
default:
/*
* PINs come through here, repeatedly. Each PIN must be a WORD.
* NOTE: there is no "length" field for this, so from ACPI spec:
* The number of pins in the table can be calculated from:
* PinCount = (Resource Source Name Offset - Pin Table Offset) / 2
* (implies resource source must immediately follow the pin list.)
* Name: _PIN
*/
*PinList = (UINT16) InitializerOp->Asl.Value.Integer;
PinList++;
PinCount++;
/* Case 8: First pin number in list */
@ -1708,6 +1702,115 @@ RsDoPinFunctionDescriptor (
return (Rnode);
}
/*******************************************************************************
*
* FUNCTION: RsDoClockInputDescriptor
*
* PARAMETERS: Info - Parse Op and resource template offset
*
* RETURN: Completed resource node
*
* DESCRIPTION: Construct a long "ClockInput" descriptor
*
******************************************************************************/
ASL_RESOURCE_NODE *
RsDoClockInputDescriptor (
ASL_RESOURCE_INFO *Info)
{
AML_RESOURCE *Descriptor;
ACPI_PARSE_OBJECT *InitializerOp;
ASL_RESOURCE_NODE *Rnode;
char *ResourceSourceString = NULL;
UINT8 *ResourceSourceIndex = NULL;
UINT16 ResSourceLength;
UINT16 DescriptorSize;
UINT32 i;
UINT32 CurrentByteOffset;
InitializerOp = Info->DescriptorTypeOp->Asl.Child;
CurrentByteOffset = Info->CurrentByteOffset;
/*
* Calculate lengths for fields that have variable length:
* 1) Resource Source string
*/
ResSourceLength = RsGetStringDataLength (InitializerOp);
DescriptorSize = ACPI_AML_SIZE_LARGE (AML_RESOURCE_CLOCK_INPUT) + ResSourceLength + 1;
/* Allocate the local resource node and initialize */
Rnode = RsAllocateResourceNode (DescriptorSize +
sizeof (AML_RESOURCE_LARGE_HEADER));
Descriptor = Rnode->Buffer;
Descriptor->ClockInput.ResourceLength = DescriptorSize;
Descriptor->ClockInput.DescriptorType = ACPI_RESOURCE_NAME_CLOCK_INPUT;
Descriptor->ClockInput.RevisionId = AML_RESOURCE_CLOCK_INPUT_REVISION;
/* Build pointers to optional areas */
if (ResSourceLength){
ResourceSourceIndex = ACPI_ADD_PTR (UINT8, Descriptor, sizeof (AML_RESOURCE_CLOCK_INPUT));
ResourceSourceString = ACPI_ADD_PTR (char, Descriptor, sizeof (AML_RESOURCE_CLOCK_INPUT) + 1);
}
/* Process all child initialization nodes */
for (i = 0; InitializerOp; i++)
{
switch (i)
{
case 0:
Descriptor->ClockInput.FrequencyNumerator = (UINT32)InitializerOp->Asl.Value.Integer;
RsCreateDwordField (InitializerOp, ACPI_RESTAG_FQN,
CurrentByteOffset + ASL_RESDESC_OFFSET (ClockInput.FrequencyNumerator));
break;
case 1:
Descriptor->ClockInput.FrequencyDivisor = (UINT16)InitializerOp->Asl.Value.Integer;
RsCreateWordField (InitializerOp, ACPI_RESTAG_FQD,
CurrentByteOffset + ASL_RESDESC_OFFSET (ClockInput.FrequencyDivisor));
break;
case 2:
RsSetFlagBits16 (&Descriptor->ClockInput.Flags, InitializerOp, 1, 0);
break;
case 3:
RsSetFlagBits16 (&Descriptor->ClockInput.Flags, InitializerOp, 0, 0);
break;
case 4: /* ResSource String [Optional Field] */
if (ResourceSourceString)
{
/* Copy string to the descriptor */
strcpy (ResourceSourceString, InitializerOp->Asl.Value.String);
}
break;
case 5: /* ResSource Index [Optional Field] */
if (ResourceSourceIndex)
{
*ResourceSourceIndex = (UINT8) InitializerOp->Asl.Value.Integer;
}
break;
default:
break;
}
InitializerOp = RsCompleteNodeAndGetNext (InitializerOp);
}
return (Rnode);
}
/*******************************************************************************
*
@ -1736,7 +1839,6 @@ RsDoPinConfigDescriptor (
UINT16 PinListLength;
UINT16 DescriptorSize;
UINT32 CurrentByteOffset;
UINT32 PinCount = 0;
UINT32 i;
InitializerOp = Info->DescriptorTypeOp->Asl.Child;
@ -1868,15 +1970,10 @@ RsDoPinConfigDescriptor (
default:
/*
* PINs come through here, repeatedly. Each PIN must be a WORD.
* NOTE: there is no "length" field for this, so from ACPI spec:
* The number of pins in the table can be calculated from:
* PinCount = (Resource Source Name Offset - Pin Table Offset) / 2
* (implies resource source must immediately follow the pin list.)
* Name: _PIN
*/
*PinList = (UINT16) InitializerOp->Asl.Value.Integer;
PinList++;
PinCount++;
/* Case 8: First pin number in list */
@ -1936,7 +2033,6 @@ RsDoPinGroupDescriptor (
UINT16 PinListLength;
UINT16 DescriptorSize;
UINT32 CurrentByteOffset;
UINT32 PinCount = 0;
UINT32 i;
InitializerOp = Info->DescriptorTypeOp->Asl.Child;
@ -2022,15 +2118,10 @@ RsDoPinGroupDescriptor (
default:
/*
* PINs come through here, repeatedly. Each PIN must be a WORD.
* NOTE: there is no "length" field for this, so from ACPI spec:
* The number of pins in the table can be calculated from:
* PinCount = (Resource Source Name Offset - Pin Table Offset) / 2
* (implies resource source must immediately follow the pin list.)
* Name: _PIN
*/
*PinList = (UINT16) InitializerOp->Asl.Value.Integer;
PinList++;
PinCount++;
/* Case 3: First pin number in list */

2
source/compiler/aslrestype2w.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

2
source/compiler/aslrules.y
View file

@ -11,7 +11,7 @@ NoEcho('
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

2
source/compiler/aslstartup.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

2
source/compiler/aslstubs.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

4
source/compiler/aslsupport.l
View file

@ -9,7 +9,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License
@ -195,7 +195,7 @@ AslParserCleanup (
*
* DESCRIPTION: Handle #line directives emitted by the preprocessor.
*
* The #line directive is emitted by the preprocesser, and is used to
* The #line directive is emitted by the preprocessor, and is used to
* pass through line numbers from the original source code file to the
* preprocessor output file (.i). This allows any compiler-generated
* error messages to be displayed with the correct line number.

2
source/compiler/aslsupport.y
View file

@ -9,7 +9,7 @@ NoEcho('
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

8
source/compiler/asltokens.y
View file

@ -9,7 +9,7 @@ NoEcho('
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License
@ -399,6 +399,12 @@ NoEcho('
%token <i> PARSEOP_PIN_PULLDEFAULT
%token <i> PARSEOP_PIN_PULLDOWN
%token <i> PARSEOP_PIN_PULLUP
%token <i> PARSEOP_CLOCKINPUT
%token <i> PARSEOP_CLOCK_HZ
%token <i> PARSEOP_CLOCK_KHZ
%token <i> PARSEOP_CLOCK_MHZ
%token <i> PARSEOP_CLOCK_FIXED
%token <i> PARSEOP_CLOCK_VARIABLE
%token <i> PARSEOP_POWERRESOURCE
%token <i> PARSEOP_PROCESSOR
%token <i> PARSEOP_QWORDCONST

2
source/compiler/asltransform.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

5
source/compiler/asltree.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License
@ -467,6 +467,7 @@ TrLinkOpChildren (
UINT32 i;
BOOLEAN FirstChild;
ACPI_FUNCTION_NAME (TrLinkOpChildren);
va_start (ap, NumChildren);
@ -624,7 +625,7 @@ TrLinkOpChildren (
if (AcpiGbl_CaptureComments)
{
AslGbl_CommentState.LatestParseOp = Op;
CvDbgPrint ("TrLinkOpChildren=====Set latest parse op to this op.\n");
CvDbgPrint ("%s=====Set latest parse op to this op.\n", ACPI_GET_FUNCTION_NAME);
}
return (Op);

4
source/compiler/asltypes.h
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License
@ -336,7 +336,7 @@ typedef struct asl_file_desc
typedef struct asl_cache_info
{
void *Next;
char Buffer[1];
char Buffer[];
} ASL_CACHE_INFO;

5
source/compiler/asltypes.y
View file

@ -9,7 +9,7 @@ NoEcho('
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License
@ -359,6 +359,8 @@ NoEcho('
%type <n> WireModeKeyword
%type <n> XferSizeKeyword
%type <n> XferTypeKeyword
%type <n> ClockScaleKeyword
%type <n> ClockModeKeyword
/* Types */
@ -411,6 +413,7 @@ NoEcho('
/* Resource Descriptors */
%type <n> ClockInputTerm
%type <n> ConnectionTerm
%type <n> Csi2SerialBusTerm
%type <n> DMATerm

8
source/compiler/aslutils.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License
@ -610,7 +610,7 @@ UtSetParseOpName (
*
* FUNCTION: UtDisplayOneSummary
*
* PARAMETERS: FileID - ID of outpout file
* PARAMETERS: FileID - ID of output file
*
* RETURN: None
*
@ -733,7 +733,7 @@ UtDisplayOneSummary (
*
* FUNCTION: UtDisplayErrorSummary
*
* PARAMETERS: FileID - ID of outpout file
* PARAMETERS: FileID - ID of output file
*
* RETURN: None
*
@ -800,7 +800,7 @@ UtDisplayErrorSummary (
*
* FUNCTION: UtDisplaySummary
*
* PARAMETERS: FileID - ID of outpout file
* PARAMETERS: FileID - ID of output file
*
* RETURN: None
*

2
source/compiler/asluuid.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

2
source/compiler/aslwalks.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

2
source/compiler/aslxref.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

2
source/compiler/aslxrefout.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

2
source/compiler/cvcompiler.c
View file

@ -8,7 +8,7 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp.
* Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
* All rights reserved.
*
* 2. License

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