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Rename the ThunderX CPU identification macros to include the X. This is the
name people know the product by, and is consistent with the later SoC ID macros. Sponsored by: DARPA, AFRL
This commit is contained in:
parent
0014ef8a04
commit
8b47c1ae54
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=335052
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@ -418,7 +418,7 @@ arm_gic_v3_intr(void *arg)
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pic = sc->gic_pic;
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while (1) {
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if (CPU_MATCH_ERRATA_CAVIUM_THUNDER_1_1) {
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if (CPU_MATCH_ERRATA_CAVIUM_THUNDERX_1_1) {
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/*
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* Hardware: Cavium ThunderX
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* Chip revision: Pass 1.0 (early version)
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@ -133,7 +133,7 @@ static const struct cpu_parts cpu_parts_arm[] = {
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};
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/* Cavium */
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static const struct cpu_parts cpu_parts_cavium[] = {
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{ CPU_PART_THUNDER, "Thunder" },
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{ CPU_PART_THUNDERX, "ThunderX" },
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CPU_PART_NONE,
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};
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@ -212,11 +212,11 @@ print_cpu_features(u_int cpu)
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* https://lkml.org/lkml/2016/8/4/722
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*/
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/*
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* XXX: CPU_MATCH_ERRATA_CAVIUM_THUNDER_1_1 on its own also
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* XXX: CPU_MATCH_ERRATA_CAVIUM_THUNDERX_1_1 on its own also
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* triggers on pass 2.0+.
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*/
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if (cpu == 0 && CPU_VAR(PCPU_GET(midr)) == 0 &&
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CPU_MATCH_ERRATA_CAVIUM_THUNDER_1_1)
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CPU_MATCH_ERRATA_CAVIUM_THUNDERX_1_1)
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printf("WARNING: ThunderX Pass 1.1 detected.\nThis has known "
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"hardware bugs that may cause the incorrect operation of "
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"atomic operations.\n");
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@ -159,7 +159,7 @@ thunder_pcie_identify_ecam(device_t dev, int *ecam)
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/* Check if we're running on Cavium ThunderX */
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if (!CPU_MATCH(CPU_IMPL_MASK | CPU_PART_MASK,
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CPU_IMPL_CAVIUM, CPU_PART_THUNDER, 0, 0))
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CPU_IMPL_CAVIUM, CPU_PART_THUNDERX, 0, 0))
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return (EINVAL);
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start = bus_get_resource_start(dev, SYS_RES_MEMORY, 0);
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@ -97,7 +97,7 @@ thunder_pcie_fdt_probe(device_t dev)
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/* Check if we're running on Cavium ThunderX */
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if (!CPU_MATCH(CPU_IMPL_MASK | CPU_PART_MASK,
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CPU_IMPL_CAVIUM, CPU_PART_THUNDER, 0, 0))
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CPU_IMPL_CAVIUM, CPU_PART_THUNDERX, 0, 0))
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return (ENXIO);
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if (!ofw_bus_status_okay(dev))
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@ -89,13 +89,13 @@
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#define CPU_PART_CORTEX_A75 0xD0A
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/* Cavium Part numbers */
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#define CPU_PART_THUNDER 0x0A1
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#define CPU_PART_THUNDERX 0x0A1
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#define CPU_PART_THUNDERX_81XX 0x0A2
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#define CPU_PART_THUNDERX_83XX 0x0A3
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#define CPU_PART_THUNDERX2 0x0AF
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#define CPU_REV_THUNDER_1_0 0x00
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#define CPU_REV_THUNDER_1_1 0x01
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#define CPU_REV_THUNDERX_1_0 0x00
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#define CPU_REV_THUNDERX_1_1 0x01
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#define CPU_IMPL(midr) (((midr) >> 24) & 0xff)
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#define CPU_PART(midr) (((midr) >> 4) & 0xfff)
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@ -137,13 +137,13 @@
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* Revision(s): Pass 1.0, Pass 1.1
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*/
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#ifdef THUNDERX_PASS_1_1_ERRATA
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#define CPU_MATCH_ERRATA_CAVIUM_THUNDER_1_1 \
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#define CPU_MATCH_ERRATA_CAVIUM_THUNDERX_1_1 \
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(CPU_MATCH(CPU_IMPL_MASK | CPU_PART_MASK | CPU_REV_MASK, \
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CPU_IMPL_CAVIUM, CPU_PART_THUNDER, 0, CPU_REV_THUNDER_1_0) || \
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CPU_IMPL_CAVIUM, CPU_PART_THUNDERX, 0, CPU_REV_THUNDERX_1_0) || \
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CPU_MATCH(CPU_IMPL_MASK | CPU_PART_MASK | CPU_REV_MASK, \
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CPU_IMPL_CAVIUM, CPU_PART_THUNDER, 0, CPU_REV_THUNDER_1_1))
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CPU_IMPL_CAVIUM, CPU_PART_THUNDERX, 0, CPU_REV_THUNDERX_1_1))
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#else
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#define CPU_MATCH_ERRATA_CAVIUM_THUNDER_1_1 0
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#define CPU_MATCH_ERRATA_CAVIUM_THUNDERX_1_1 0
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#endif
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