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Make sure the holding descriptor and link pointer are both freed during
a non-loss reset. When the drain functions are called, the holding descriptor and link pointers are NULLed out. But when the processq function is called during a non-loss reset, this doesn't occur. So the next time a DMA occurs, it's chained to a descriptor that no longer exists and the hardware gets angry. Tested: * AR5416, STA mode; use sysctl dev.ath.X.forcebstuck=1 to force a non-loss reset. TODO: * Further AR9380 testing just to check that the behaviour for the EDMA chips is sane. PR: kern/178477
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Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=250444
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@ -4668,9 +4668,21 @@ ath_legacy_tx_drain(struct ath_softc *sc, ATH_RESET_TYPE reset_type)
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if (sc->sc_debug & ATH_DEBUG_RESET)
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ath_tx_dump(sc, &sc->sc_txq[i]);
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#endif /* ATH_DEBUG */
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if (reset_type == ATH_RESET_NOLOSS)
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if (reset_type == ATH_RESET_NOLOSS) {
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ath_tx_processq(sc, &sc->sc_txq[i], 0);
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else
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ATH_TXQ_LOCK(&sc->sc_txq[i]);
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/*
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* Free the holding buffer; DMA is now
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* stopped.
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*/
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ath_txq_freeholdingbuf(sc, &sc->sc_txq[i]);
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/*
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* Reset the link pointer to NULL; there's
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* no frames to chain DMA to.
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*/
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sc->sc_txq[i].axq_link = NULL;
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ATH_TXQ_UNLOCK(&sc->sc_txq[i]);
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} else
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ath_tx_draintxq(sc, &sc->sc_txq[i]);
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}
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}
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@ -551,6 +551,22 @@ ath_edma_tx_drain(struct ath_softc *sc, ATH_RESET_TYPE reset_type)
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*/
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if (reset_type == ATH_RESET_NOLOSS) {
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ath_edma_tx_processq(sc, 0);
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for (i = 0; i < HAL_NUM_TX_QUEUES; i++) {
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if (ATH_TXQ_SETUP(sc, i)) {
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ATH_TXQ_LOCK(&sc->sc_txq[i]);
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/*
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* Free the holding buffer; DMA is now
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* stopped.
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*/
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ath_txq_freeholdingbuf(sc, &sc->sc_txq[i]);
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/*
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* Reset the link pointer to NULL; there's
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* no frames to chain DMA to.
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*/
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sc->sc_txq[i].axq_link = NULL;
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ATH_TXQ_UNLOCK(&sc->sc_txq[i]);
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}
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}
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} else {
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for (i = 0; i < HAL_NUM_TX_QUEUES; i++) {
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if (ATH_TXQ_SETUP(sc, i))
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