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Retire the nve(4) driver; nfe(4) has been the default driver for NVIDIA

Browse source 
nForce MCP adapters for a long time.

Yays:	jhb, remko, yongari
Nays:	none on the current and stable lists
This commit is contained in:
Christian Brueffer 2014-02-16 12:22:43 +00:00
parent 1de5b5eb55
commit 7f47cbd3ce
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=261975
32 changed files with 1 additions and 4328 deletions
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2
release/doc/en_US.ISO8859-1/hardware/article.xml
View file

@ -883,8 +883,6 @@
&hwlist.nge;
&hwlist.nve;
&hwlist.nxge;
&hwlist.oce;

1
release/doc/share/misc/dev.archlist.txt
View file

@ -97,7 +97,6 @@ nfe i386,amd64
ng_bt3c i386,pc98,amd64
ng_ubt i386,pc98,amd64
nsp i386,pc98
nve i386,amd64
nxge i386,amd64
oce i386,amd64
ohci i386,pc98,ia64,amd64,powerpc

4
share/man/man4/Makefile
View file

@ -344,7 +344,6 @@ MAN= aac.4 \
${_ntb.4} \
null.4 \
${_nvd.4} \
${_nve.4} \
${_nvme.4} \
${_nvram.4} \
${_nvram2env.4} \
@ -673,7 +672,6 @@ MLINKS+=${_nfe.4} ${_if_nfe.4}
MLINKS+=nge.4 if_nge.4
MLINKS+=${_ntb.4} ${_if_ntb.4} \
${_ntb.4} ${_ntb_hw.4}
MLINKS+=${_nve.4} ${_if_nve.4}
MLINKS+=${_nxge.4} ${_if_nxge.4}
MLINKS+=patm.4 if_patm.4
MLINKS+=pccbb.4 cbb.4
@ -772,7 +770,6 @@ _ichwd.4= ichwd.4
_if_bxe.4= if_bxe.4
_if_ndis.4= if_ndis.4
_if_nfe.4= if_nfe.4
_if_nve.4= if_nve.4
_if_nxge.4= if_nxge.4
_if_urtw.4= if_urtw.4
_if_vmx.4= if_vmx.4
@ -787,7 +784,6 @@ _ndis.4= ndis.4
_nfe.4= nfe.4
_nfsmb.4= nfsmb.4
_nvd.4= nvd.4
_nve.4= nve.4
_nvme.4= nvme.4
_nvram.4= nvram.4
_nxge.4= nxge.4

1
share/man/man4/altq.4
View file

@ -151,7 +151,6 @@ They have been applied to the following hardware drivers:
.Xr nfe 4 ,
.Xr nge 4 ,
.Xr npe 4 ,
.Xr nve 4 ,
.Xr qlxgb 4 ,
.Xr ral 4 ,
.Xr re 4 ,

3
share/man/man4/miibus.4
View file

@ -87,8 +87,6 @@ Marvell/SysKonnect Yukon II Gigabit Ethernet
NVIDIA nForce MCP Networking Adapter
.It Xr nge 4
National Semiconductor DP83820/DP83821 Gigabit Ethernet
.It Xr nve 4
NVIDIA nForce MCP Networking Adapter
.It Xr pcn 4
AMD Am79C97x PCI 10/100
.It Xr re 4
@ -159,7 +157,6 @@ but as a result are not well behaved newbus device drivers.
.Xr netintro 4 ,
.Xr nfe 4 ,
.Xr nge 4 ,
.Xr nve 4 ,
.Xr pcn 4 ,
.Xr re 4 ,
.Xr rgephy 4 ,

150
share/man/man4/nve.4
View file

@ -1,150 +0,0 @@
.\" Copyright (c) 2003 Quinton Dolan
.\" All rights reserved.
.\"
.\" Redistribution and use in source and binary forms, with or without
.\" modification, are permitted provided that the following conditions
.\" are met:
.\" 1. Redistributions of source code must retain the above copyright
.\" notice, this list of conditions and the following disclaimer.
.\" 2. Redistributions in binary form must reproduce the above copyright
.\" notice, this list of conditions and the following disclaimer in the
.\" documentation and/or other materials provided with the distribution.
.\"
.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
.\" SUCH DAMAGE.
.\"
.\" $Id: nvnet.4,v 1.1 2003/10/09 16:48:01 q Exp $
.\"
.\" $FreeBSD$
.\"
.Dd February 13, 2014
.Dt NVE 4
.Os
.Sh NAME
.Nm nve
.Nd "NVIDIA nForce MCP Networking Adapter device driver"
.Sh SYNOPSIS
.Sy Warning:
This driver is deprecated and will not be available in
.Fx 11.0
and later.
Please consider using the
.Xr nfe 4
driver instead.
.Pp
To compile this driver into the kernel,
place the following lines in your
kernel configuration file:
.Bd -ragged -offset indent
.Cd "device miibus"
.Cd "device nve"
.Ed
.Pp
Alternatively, to load the driver as a
module at boot time, place the following line in
.Xr loader.conf 5 :
.Bd -literal -offset indent
if_nve_load="YES"
.Ed
.Sh DESCRIPTION
The
.Nm
driver provides support for the NVIDIA nForce MCP and nForce2 MCP2
networking adapter that is embedded in the southbridge of most
nForce and nForce2 motherboards.
.Pp
This driver is a reimplementation of the NVIDIA supported Linux
.Nm nvnet
driver and uses the same closed source API library to access
the underlying hardware.
There is currently no programming documentation available for this
device, and therefore little is known about the internal architecture
of the MAC engine itself.
.Pp
The
.Nm
driver supports the following media types:
.Bl -tag -width ".Cm 10baseT/UTP"
.It Cm autoselect
Enable autoselection of the media type and options.
.It Cm 10baseT/UTP
Set 10Mbps operation.
.It Cm 100baseTX
Set 100Mbps (Fast Ethernet) operation.
.It Cm 1000baseTX
Set 1000Mbps (Gigabit Ethernet) operation.
.El
.Pp
The
.Nm
driver supports the following media options:
.Bl -tag -width ".Cm 10baseT/UTP"
.It Cm full-duplex
Set full duplex operation.
.El
.Pp
For more information on configuring this device, see
.Xr ifconfig 8 .
.Sh HARDWARE
The
.Nm
driver supports the NVIDIA MCP onboard adapters of mainboards with
the following chipsets:
.Pp
.Bl -bullet -compact
.It
nForce
.It
nForce2
.It
nForce3
.It
nForce4
.El
.Sh DIAGNOSTICS
.Bl -diag
.It "nve%d: couldn't map memory"
A fatal initialization error has occurred.
.It "nve%d: couldn't map interrupt"
A fatal initialization error has occurred.
.It "nve%d: failed to allocate memory"
There are not enough mbufs available for allocation.
.It "nve%d: device timeout"
The device has stopped responding to the network, or there is a problem with
the network connection (cable).
.El
.Sh SEE ALSO
.Xr altq 4 ,
.Xr arp 4 ,
.Xr miibus 4 ,
.Xr netintro 4 ,
.Xr nfe 4 ,
.Xr ng_ether 4 ,
.Xr rgephy 4 ,
.Xr ifconfig 8
.Sh HISTORY
The
.Nm
driver first appeared in
.Fx 6.0 .
.Sh AUTHORS
.An -nosplit
The
.Nm
driver was written by
.An Quinton Dolan Aq q@onthenet.com.au
and
.An "David E. O'Brien" Aq obrien@FreeBSD.org .
.Sh BUGS
There are reports that when the card is in auto select mode,
ifconfig output reports a 10baseT/UTP output while the LEDs and
bandwidth show that the card is actually in 100baseTX mode.

1
share/man/man4/vlan.4
View file

@ -176,7 +176,6 @@ These interfaces natively support long frames for
.Xr hme 4 ,
.Xr le 4 ,
.Xr nfe 4 ,
.Xr nve 4 ,
.Xr rl 4 ,
.Xr sf 4 ,
.Xr sis 4 ,

1
sys/amd64/conf/GENERIC
View file

@ -235,7 +235,6 @@ device lge # Level 1 LXT1001 gigabit Ethernet
device msk # Marvell/SysKonnect Yukon II Gigabit Ethernet
device nfe # nVidia nForce MCP on-board Ethernet
device nge # NatSemi DP83820 gigabit Ethernet
#device nve # nVidia nForce MCP on-board Ethernet Networking
device pcn # AMD Am79C97x PCI 10/100 (precedence over 'le')
device re # RealTek 8139C+/8169/8169S/8110S
device rl # RealTek 8129/8139

2
sys/amd64/conf/NOTES
View file

@ -309,7 +309,6 @@ options DRM_DEBUG # Include debug printfs (slow)
# mlxen: Mellanox ConnectX HCA Ethernet
# mthca: Mellanox HCA InfiniBand
# nfe: nVidia nForce MCP on-board Ethernet Networking (BSD open source)
# nve: nVidia nForce MCP on-board Ethernet Networking
# sfxge: Solarflare SFC9000 family 10Gb Ethernet adapters
# vmx: VMware VMXNET3 Ethernet (BSD open source)
# wpi: Intel 3945ABG Wireless LAN controller
@ -327,7 +326,6 @@ device mlx4ib # Mellanox ConnectX HCA InfiniBand
device mlxen # Mellanox ConnectX HCA Ethernet
device mthca # Mellanox HCA InfiniBand
device nfe # nVidia nForce MCP on-board Ethernet
device nve # nVidia nForce MCP on-board Ethernet Networking
device sfxge # Solarflare SFC9000 10Gb Ethernet
device vmx # VMware VMXNET3 Ethernet
device wpi # Intel 3945ABG wireless NICs.

1
sys/boot/forth/loader.conf
View file

@ -327,7 +327,6 @@ if_mxge_load="NO" # Myricom Myri10GE 10Gb Ethernet
if_my_load="NO" # Myson PCI Fast Ethernet
if_nfe_load="NO" # NVIDIA nForce MCP Networking Adapter
if_nge_load="NO" # National Semiconductor PCI Gigabit Ethernet
if_nve_load="NO" # NVIDIA nForce MCP Networking Adapter
if_nxge_load="NO" # Neterion Xframe 10Gb Ethernet
if_patm_load="NO" # IDT77252 ATM
if_pcn_load="NO" # AMD PCnet PCI

1
sys/conf/WITHOUT_SOURCELESS_HOST
View file

@ -8,4 +8,3 @@ nodevice hpt27xx
nodevice hptmv
nodevice hptnr
nodevice hptrr
nodevice nve

12
sys/conf/files.amd64
View file

@ -47,17 +47,6 @@ ukbdmap.h optional ukbd_dflt_keymap \
no-obj no-implicit-rule before-depend \
clean "ukbdmap.h"
#
nvenetlib.o optional nve pci \
dependency "$S/contrib/dev/nve/amd64/nvenetlib.o.bz2.uu" \
compile-with "uudecode $S/contrib/dev/nve/amd64/nvenetlib.o.bz2.uu ; bzip2 -df nvenetlib.o.bz2" \
no-implicit-rule
#
os+%DIKED-nve.h optional nve pci \
dependency "$S/contrib/dev/nve/os.h" \
compile-with "sed -e 's/^.*#include.*phy\.h.*$$//' $S/contrib/dev/nve/os.h > os+%DIKED-nve.h" \
no-implicit-rule no-obj before-depend \
clean "os+%DIKED-nve.h"
#
hpt27xx_lib.o optional hpt27xx \
dependency "$S/dev/hpt27xx/amd64-elf.hpt27xx_lib.o.uu" \
compile-with "uudecode < $S/dev/hpt27xx/amd64-elf.hpt27xx_lib.o.uu" \
@ -248,7 +237,6 @@ dev/nfe/if_nfe.c optional nfe pci
dev/ntb/if_ntb/if_ntb.c optional if_ntb
dev/ntb/ntb_hw/ntb_hw.c optional if_ntb ntb_hw
dev/nvd/nvd.c optional nvd nvme
dev/nve/if_nve.c optional nve pci
dev/nvme/nvme.c optional nvme
dev/nvme/nvme_ctrlr.c optional nvme
dev/nvme/nvme_ctrlr_cmd.c optional nvme

12
sys/conf/files.i386
View file

@ -46,17 +46,6 @@ ukbdmap.h optional ukbd_dflt_keymap \
no-obj no-implicit-rule before-depend \
clean "ukbdmap.h"
#
nvenetlib.o optional nve pci \
dependency "$S/contrib/dev/nve/i386/nvenetlib.o.bz2.uu" \
compile-with "uudecode $S/contrib/dev/nve/i386/nvenetlib.o.bz2.uu ; bzip2 -df nvenetlib.o.bz2" \
no-implicit-rule
#
os+%DIKED-nve.h optional nve pci \
dependency "$S/contrib/dev/nve/os.h" \
compile-with "sed -e 's/^.*#include.*phy\.h.*$$//' $S/contrib/dev/nve/os.h > os+%DIKED-nve.h" \
no-implicit-rule no-obj before-depend \
clean "os+%DIKED-nve.h"
#
hpt27xx_lib.o optional hpt27xx \
dependency "$S/dev/hpt27xx/i386-elf.hpt27xx_lib.o.uu" \
compile-with "uudecode < $S/dev/hpt27xx/i386-elf.hpt27xx_lib.o.uu" \
@ -257,7 +246,6 @@ dev/mse/mse.c optional mse
dev/mse/mse_isa.c optional mse isa
dev/nfe/if_nfe.c optional nfe pci
dev/nvd/nvd.c optional nvd nvme
dev/nve/if_nve.c optional nve pci
dev/nvme/nvme.c optional nvme
dev/nvme/nvme_ctrlr.c optional nvme
dev/nvme/nvme_ctrlr_cmd.c optional nvme

583
sys/contrib/dev/nve/adapter.h
View file

@ -1,583 +0,0 @@
/***************************************************************************\
|* *|
|* Copyright 2001-2004 NVIDIA Corporation. All Rights Reserved. *|
|* *|
|* THE INFORMATION CONTAINED HEREIN IS PROPRIETARY AND CONFIDENTIAL *|
|* TO NVIDIA, CORPORATION. USE, REPRODUCTION OR DISCLOSURE TO ANY *|
|* THIRD PARTY IS SUBJECT TO WRITTEN PRE-APPROVAL BY NVIDIA, CORP. *|
|* *|
|* THE INFORMATION CONTAINED HEREIN IS PROVIDED "AS IS" WITHOUT *|
|* EXPRESS OR IMPLIED WARRANTY OF ANY KIND, INCLUDING ALL IMPLIED *|
|* WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A *|
|* PARTICULAR PURPOSE. *|
|* *|
\***************************************************************************/
/*
FILE: adapter.h
DATE: 2/7/00
This file contains the hardware interface to the ethernet adapter.
*/
#ifndef _ADAPTER_H_
#define _ADAPTER_H_
#ifdef __cplusplus
extern "C" {
#endif
#define HDA_VERSION_STRING "HDR A: $Revision: #46 $"
#ifdef MODS_NETWORK_BUILD
#ifndef _DRVAPP_H_
#include "drvapp.h"
#endif
#endif
//////////////////////////////////////////////////////////////////
// For the set and get configuration calls.
typedef struct _ADAPTER_CONFIG
{
NV_UINT32 ulFlags;
} ADAPTER_CONFIG, *PADAPTER_CONFIG;
//////////////////////////////////////////////////////////////////
typedef struct _ADAPTER_WRITE_OFFLOAD
{
NV_UINT32 usBitmask;
NV_UINT32 ulMss;
} ADAPTER_WRITE_OFFLOAD;
//////////////////////////////////////////////////////////////////
// For the ADAPTER_Write1 call.
/* This scatter gather list should be same as defined in ndis.h by MS.
For ULONG_PTR MS header file says that it will be of same size as
pointer. It has been defined to take care of casting between differenet
sizes.
*/
typedef struct _NVSCATTER_GATHER_ELEMENT {
NV_UINT32 PhysLow;
NV_UINT32 PhysHigh;
NV_UINT32 Length;
NV_VOID *Reserved;
} NVSCATTER_GATHER_ELEMENT, *PNVSCATTER_GATHER_ELEMENT;
#ifndef linux
#pragma warning(disable:4200)
#endif
typedef struct _NVSCATTER_GATHER_LIST {
NV_UINT32 NumberOfElements;
NV_VOID *Reserved;
NVSCATTER_GATHER_ELEMENT Elements[0]; // Made 0 sized element to remove MODS compilation error
// Elements[0] and Elements[] have the same effect.
// sizeof(NVSCATTER_GATHER_LIST) is the same (value of 8) in both cases
// And both lead to Warning 4200 in MSVC
} NVSCATTER_GATHER_LIST, *PNVSCATTER_GATHER_LIST;
#ifndef linux
#pragma warning(default:4200)
#endif
typedef struct _ADAPTER_WRITE_DATA1
{
NV_UINT32 ulTotalLength;
PNV_VOID pvID;
NV_UINT8 uc8021pPriority;
ADAPTER_WRITE_OFFLOAD *psOffload;
PNVSCATTER_GATHER_LIST pNVSGL;
} ADAPTER_WRITE_DATA1, *PADAPTER_WRITE_DATA1;
//////////////////////////////////////////////////////////////////
// For the ADAPTER_Write call.
typedef struct _ADAPTER_WRITE_ELEMENT
{
PNV_VOID pPhysical;
NV_UINT32 ulLength;
} ADAPTER_WRITE_ELEMENT, *PADAPTER_WRITE_ELEMENT;
#define ADAPTER_WRITE_OFFLOAD_BP_SEGOFFLOAD 0
#define ADAPTER_WRITE_OFFLOAD_BP_IPV4CHECKSUM 1
#define ADAPTER_WRITE_OFFLOAD_BP_IPV6CHECKSUM 2
#define ADAPTER_WRITE_OFFLOAD_BP_TCPCHECKSUM 3
#define ADAPTER_WRITE_OFFLOAD_BP_UDPCHECKSUM 4
#define ADAPTER_WRITE_OFFLOAD_BP_IPCHECKSUM 5
// pvID is a value that will be passed back into OSAPI.pfnPacketWasSent
// when the transmission completes. if pvID is NULL, the ADAPTER code
// assumes the caller does not want the pfnPacketWasSent callback.
typedef struct _ADAPTER_WRITE_DATA
{
NV_UINT32 ulNumberOfElements;
NV_UINT32 ulTotalLength;
PNV_VOID pvID;
NV_UINT8 uc8021pPriority;
ADAPTER_WRITE_OFFLOAD *psOffload;
#ifdef linux
ADAPTER_WRITE_ELEMENT sElement[32];
#else
ADAPTER_WRITE_ELEMENT sElement[100];
#endif
} ADAPTER_WRITE_DATA, *PADAPTER_WRITE_DATA;
//////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////
// For the ADAPTER_Read call.
typedef struct _ADAPTER_READ_ELEMENT
{
PNV_VOID pPhysical;
NV_UINT32 ulLength;
} ADAPTER_READ_ELEMENT, *PADAPTER_READ_ELEMENT;
typedef struct _ADAPTER_READ_OFFLOAD
{
NV_UINT8 ucChecksumStatus;
} ADAPTER_READ_OFFLOAD;
typedef struct _ADAPTER_READ_DATA
{
NV_UINT32 ulNumberOfElements;
NV_UINT32 ulTotalLength;
PNV_VOID pvID;
NV_UINT32 ulFilterMatch;
ADAPTER_READ_OFFLOAD sOffload;
ADAPTER_READ_ELEMENT sElement[10];
} ADAPTER_READ_DATA, *PADAPTER_READ_DATA;
#define RDFLAG_CHK_NOCHECKSUM 0
#define RDFLAG_CHK_IPPASSTCPFAIL 1
#define RDFLAG_CHK_IPPASSUDPFAIL 2
#define RDFLAG_CHK_IPFAIL 3
#define RDFLAG_CHK_IPPASSNOTCPUDP 4
#define RDFLAG_CHK_IPPASSTCPPASS 5
#define RDFLAG_CHK_IPPASSUDPPASS 6
#define RDFLAG_CHK_RESERVED 7
// The ulFilterMatch flag can be a logical OR of the following
#define ADREADFL_UNICAST_MATCH 0x00000001
#define ADREADFL_MULTICAST_MATCH 0x00000002
#define ADREADFL_BROADCAST_MATCH 0x00000004
//////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////
// For the ADAPTER_GetPowerCapabilities call.
typedef struct _ADAPTER_POWERCAPS
{
NV_UINT32 ulPowerFlags;
NV_UINT32 ulMagicPacketWakeUpFlags;
NV_UINT32 ulPatternWakeUpFlags;
NV_UINT32 ulLinkChangeWakeUpFlags;
NV_SINT32 iMaxWakeUpPatterns;
} ADAPTER_POWERCAPS, *PADAPTER_POWERCAPS;
// For the ADAPTER_GetPowerState and ADAPTER_SetPowerState call.
typedef struct _ADAPTER_POWERSTATE
{
NV_UINT32 ulPowerFlags;
NV_UINT32 ulMagicPacketWakeUpFlags;
NV_UINT32 ulPatternWakeUpFlags;
NV_UINT32 ulLinkChangeWakeUpFlags;
} ADAPTER_POWERSTATE, *PADAPTER_POWERSTATE;
// Each of the flag fields in the POWERCAPS structure above can have
// any of the following bitflags set giving the capabilites of the
// adapter. In the case of the wake up fields, these flags mean that
// wake up can happen from the specified power state.
// For the POWERSTATE structure, the ulPowerFlags field should just
// have one of these bits set to go to that particular power state.
// The WakeUp fields can have one or more of these bits set to indicate
// what states should be woken up from.
#define POWER_STATE_D0 0x00000001
#define POWER_STATE_D1 0x00000002
#define POWER_STATE_D2 0x00000004
#define POWER_STATE_D3 0x00000008
#define POWER_STATE_ALL (POWER_STATE_D0 | \
POWER_STATE_D1 | \
POWER_STATE_D2 | \
POWER_STATE_D3)
//////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////
// The ADAPTER_GetPacketFilterCaps call returns a NV_UINT32 that can
// have the following capability bits set.
#define ACCEPT_UNICAST_PACKETS 0x00000001
#define ACCEPT_MULTICAST_PACKETS 0x00000002
#define ACCEPT_BROADCAST_PACKETS 0x00000004
#define ACCEPT_ALL_PACKETS 0x00000008
#define ETH_LENGTH_OF_ADDRESS 6
// The ADAPTER_SetPacketFilter call uses this structure to know what
// packet filter to set. The ulPacketFilter field can contain some
// union of the bit flags above. The acMulticastMask array holds a
// 48 bit MAC address mask with a 0 in every bit position that should
// be ignored on compare and a 1 in every bit position that should
// be taken into account when comparing to see if the destination
// address of a packet should be accepted for multicast.
typedef struct _PACKET_FILTER
{
NV_UINT32 ulFilterFlags;
NV_UINT8 acMulticastAddress[ETH_LENGTH_OF_ADDRESS];
NV_UINT8 acMulticastMask[ETH_LENGTH_OF_ADDRESS];
} PACKET_FILTER, *PPACKET_FILTER;
//////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////
// A WAKE_UP_PATTERN is a 128-byte pattern that the adapter can
// look for in incoming packets to decide when to wake up. Higher-
// level protocols can use this to, for example, wake up the
// adapter whenever it sees an IP packet that is addressed to it.
// A pattern consists of 128 bits of byte masks that indicate
// which bytes in the packet are relevant to the pattern, plus
// values for each byte.
#define WAKE_UP_PATTERN_SIZE 128
typedef struct _WAKE_UP_PATTERN
{
NV_UINT32 aulByteMask[WAKE_UP_PATTERN_SIZE/32];
NV_UINT8 acData[WAKE_UP_PATTERN_SIZE];
} WAKE_UP_PATTERN, *PWAKE_UP_PATTERN;
//
//
// Adapter offload
//
typedef struct _ADAPTER_OFFLOAD {
NV_UINT32 Type;
NV_UINT32 Value0;
} ADAPTER_OFFLOAD, *PADAPTER_OFFLOAD;
#define ADAPTER_OFFLOAD_VLAN 0x00000001
#define ADAPTER_OFFLOAD_IEEE802_1P 0x00000002
#define ADAPTER_OFFLOAD_IEEE802_1PQ_PAD 0x00000004
//////////////////////////////////////////////////////////////////
// CMNDATA_OS_ADAPTER
// Structure common to OS and Adapter layers
// Used for moving data from the OS layer to the adapter layer through SetCommonData
// function call from OS layer to Adapter layer
//
typedef struct _CMNDATA_OS_ADAPTER
{
#ifndef linux
ASF_SEC0_BASE sRegSec0Base;
#endif
NV_UINT32 bFPGA;
NV_UINT32 ulFPGAEepromSize;
NV_UINT32 bChecksumOffloadEnable;
NV_UINT32 ulChecksumOffloadBM;
NV_UINT32 ulChecksumOffloadOS;
NV_UINT32 ulMediaIF;
NV_UINT32 bOemCustomEventRead;
// Debug only right now
//!!! Beware mods is relying on the fields blow.
NV_UINT32 ulWatermarkTFBW;
NV_UINT32 ulBackoffRseed;
NV_UINT32 ulBackoffSlotTime;
NV_UINT32 ulModeRegTxReadCompleteEnable;
NV_UINT32 ulFatalErrorRegister;
} CMNDATA_OS_ADAPTER;
//////////////////////////////////////////////////////////////////
// The functional typedefs for the ADAPTER Api
typedef NV_API_CALL NV_SINT32 (* PFN_ADAPTER_CLOSE) (PNV_VOID pvContext, NV_UINT8 ucIsPowerDown);
typedef NV_API_CALL NV_SINT32 (* PFN_ADAPTER_INIT) (PNV_VOID pvContext, NV_UINT16 usForcedSpeed, NV_UINT8 ucForceDpx, NV_UINT8 ucForceMode, NV_UINT8 ucAsyncMode, NV_UINT32 *puiLinkState);
typedef NV_API_CALL NV_SINT32 (* PFN_ADAPTER_DEINIT) (PNV_VOID pvContext, NV_UINT8 ucIsPowerDown);
typedef NV_API_CALL NV_SINT32 (* PFN_ADAPTER_START) (PNV_VOID pvContext);
typedef NV_API_CALL NV_SINT32 (* PFN_ADAPTER_STOP) (PNV_VOID pvContext, NV_UINT8 ucIsPowerDown);
typedef NV_API_CALL NV_SINT32 (* PFN_ADAPTER_QUERY_WRITE_SLOTS) (PNV_VOID pvContext);
typedef NV_API_CALL NV_SINT32 (* PFN_ADAPTER_WRITE) (PNV_VOID pvContext, ADAPTER_WRITE_DATA *pADWriteData);
typedef NV_API_CALL NV_SINT32 (* PFN_ADAPTER_WRITE1) (PNV_VOID pvContext, ADAPTER_WRITE_DATA1 *pADWriteData1);
typedef NV_API_CALL NV_SINT32 (* PFN_ADAPTER_QUERY_INTERRUPT) (PNV_VOID pvContext);
typedef NV_API_CALL NV_SINT32 (* PFN_ADAPTER_HANDLE_INTERRUPT) (PNV_VOID pvContext);
typedef NV_API_CALL NV_SINT32 (* PFN_ADAPTER_DISABLE_INTERRUPTS) (PNV_VOID pvContext);
typedef NV_API_CALL NV_SINT32 (* PFN_ADAPTER_ENABLE_INTERRUPTS) (PNV_VOID pvContext);
typedef NV_API_CALL NV_SINT32 (* PFN_ADAPTER_CLEAR_INTERRUPTS) (PNV_VOID pvContext);
typedef NV_API_CALL NV_SINT32 (* PFN_ADAPTER_CLEAR_TX_DESC) (PNV_VOID pvContext);
typedef NV_API_CALL NV_SINT32 (* PFN_ADAPTER_GET_LINK_SPEED) (PNV_VOID pvContext);
typedef NV_API_CALL NV_SINT32 (* PFN_ADAPTER_GET_LINK_MODE) (PNV_VOID pvContext);
typedef NV_API_CALL NV_SINT32 (* PFN_ADAPTER_GET_LINK_STATE) (PNV_VOID pvContext, NV_UINT32 *pulLinkState);
typedef NV_API_CALL NV_SINT32 (* PFN_ADAPTER_IS_LINK_INITIALIZING) (PNV_VOID pvContext);
typedef NV_API_CALL NV_SINT32 (* PFN_ADAPTER_RESET_PHY_INIT_STATE) (PNV_VOID pvContext);
typedef NV_API_CALL NV_SINT32 (* PFN_ADAPTER_GET_TRANSMIT_QUEUE_SIZE) (PNV_VOID pvContext);
typedef NV_API_CALL NV_SINT32 (* PFN_ADAPTER_GET_RECEIVE_QUEUE_SIZE) (PNV_VOID pvContext);
typedef NV_API_CALL NV_SINT32 (* PFN_ADAPTER_GET_STATISTICS) (PNV_VOID pvContext, PADAPTER_STATS pADStats);
typedef NV_API_CALL NV_SINT32 (* PFN_ADAPTER_GET_POWER_CAPS) (PNV_VOID pvContext, PADAPTER_POWERCAPS pADPowerCaps);
typedef NV_API_CALL NV_SINT32 (* PFN_ADAPTER_GET_POWER_STATE) (PNV_VOID pvContext, PADAPTER_POWERSTATE pADPowerState);
typedef NV_API_CALL NV_SINT32 (* PFN_ADAPTER_SET_POWER_STATE) (PNV_VOID pvContext, PADAPTER_POWERSTATE pADPowerState);
typedef NV_API_CALL NV_SINT32 (* PFN_ADAPTER_SET_LOW_SPEED_FOR_PM) (PNV_VOID pvContext);
typedef NV_API_CALL NV_SINT32 (* PFN_ADAPTER_GET_PACKET_FILTER_CAPS) (PNV_VOID pvContext);
typedef NV_API_CALL NV_SINT32 (* PFN_ADAPTER_SET_PACKET_FILTER) (PNV_VOID pvContext, PPACKET_FILTER pPacketFilter);
typedef NV_API_CALL NV_SINT32 (* PFN_ADAPTER_SET_WAKE_UP_PATTERN) (PNV_VOID pvContext, NV_SINT32 iPattern, PWAKE_UP_PATTERN pPattern);
typedef NV_API_CALL NV_SINT32 (* PFN_ADAPTER_ENABLE_WAKE_UP_PATTERN) (PNV_VOID pvContext, NV_SINT32 iPattern, NV_SINT32 iEnable);
typedef NV_API_CALL NV_SINT32 (* PFN_SET_NODE_ADDRESS) (PNV_VOID pvContext, NV_UINT8 *pNodeAddress);
typedef NV_API_CALL NV_SINT32 (* PFN_GET_NODE_ADDRESS) (PNV_VOID pvContext, NV_UINT8 *pNodeAddress);
typedef NV_API_CALL NV_SINT32 (* PFN_GET_ADAPTER_INFO) (PNV_VOID pvContext, PNV_VOID pVoidPtr, NV_SINT32 iType, NV_SINT32 *piLength);
typedef NV_API_CALL NV_SINT32 (* PFN_ADAPTER_READ_PHY) (PNV_VOID pvContext, NV_UINT32 ulPhyAddr, NV_UINT32 ulPhyReg, NV_UINT32 *pulValue);
typedef NV_API_CALL NV_SINT32 (* PFN_ADAPTER_WRITE_PHY) (PNV_VOID pvContext, NV_UINT32 ulPhyAddr, NV_UINT32 ulPhyReg, NV_UINT32 ulValue);
typedef NV_API_CALL NV_VOID(* PFN_ADAPTER_SET_SPPED_DUPLEX) (PNV_VOID pvContext);
typedef NV_API_CALL NV_SINT32 (*PFN_REGISTER_OFFLOAD) (PNV_VOID pvContext, PADAPTER_OFFLOAD pOffload);
typedef NV_API_CALL NV_SINT32 (*PFN_DEREGISTER_OFFLOAD) (PNV_VOID pvContext, PADAPTER_OFFLOAD pOffload);
typedef NV_API_CALL NV_SINT32 (*PFN_RX_BUFF_READY) (PNV_VOID pvContext, PMEMORY_BLOCK pMemBlock, PNV_VOID pvID);
#ifndef linux
typedef NV_SINT32 (*PFN_ADAPTER_ASF_SETUPREGISTERS) (PNV_VOID pvContext, NV_SINT32 bInitTime);
typedef NV_SINT32 (*PFN_ADAPTER_ASF_GETSEC0BASEADDRESS) (PNV_VOID pvContext, ASF_SEC0_BASE **ppsSec0Base);
typedef NV_SINT32 (*PFN_ADAPTER_ASF_SETSOURCEIPADDRESS) (PNV_VOID pvContext, NV_UINT8 *pucSrcIPAddress);
typedef NV_SINT32 (*PFN_ADAPTER_ASF_GETDESTIPADDRESS) (PNV_VOID pvContext, NV_UINT8 *pucDestIPAddress);
typedef NV_SINT32 (*PFN_ADAPTER_ASF_SETDESTIPADDRESS) (PNV_VOID pvContext, NV_UINT8 *pucDestIPAddress);
typedef NV_SINT32 (*PFN_ADAPTER_ASF_WRITEEEPROMANDSETUPREGISTERS) (PNV_VOID pvContext, NV_BOOLEAN bCompare, PNV_VOID pucValue, PNV_VOID pszSec0BaseMember,
NV_UINT16 usCount, NV_UINT32 ulAddressOffset);
typedef NV_SINT32 (*PFN_ADAPTER_ASF_ISASFREADY) (PNV_VOID pvContext, ASF_ASFREADY *psASFReady);
typedef NV_SINT32 (*PFN_ADAPTER_ASF_SETDESTMACADDRESS) (PNV_VOID pvContext, NV_UINT8 *pucDestMACAddress);
typedef NV_SINT32 (*PFN_ADAPTER_ASF_GETSOURCEMACADDRESS) (PNV_VOID pvContext, NV_UINT8 *pucSrcMACAddress);
typedef NV_SINT32 (*PFN_ADAPTER_ASF_CHECK_FOR_EEPROM_PRESENCE) (PNV_VOID pvContext);
#endif
typedef NV_API_CALL NV_VOID (*PFN_ADAPTER_SET_COMMONDATA) (PNV_VOID pvContext, CMNDATA_OS_ADAPTER *psOSAdpater);
typedef NV_API_CALL NV_VOID (*PFN_ADAPTER_SET_CHECKSUMOFFLOAD) (PNV_VOID pvContext, NV_UINT32 bSet);
typedef struct _ADAPTER_API
{
// The adapter context
PNV_VOID pADCX;
// The adapter interface
PFN_ADAPTER_CLOSE pfnClose;
PFN_ADAPTER_INIT pfnInit;
PFN_ADAPTER_DEINIT pfnDeinit;
PFN_ADAPTER_START pfnStart;
PFN_ADAPTER_STOP pfnStop;
PFN_ADAPTER_QUERY_WRITE_SLOTS pfnQueryWriteSlots;
PFN_ADAPTER_WRITE pfnWrite;
PFN_ADAPTER_WRITE1 pfnWrite1;
PFN_ADAPTER_QUERY_INTERRUPT pfnQueryInterrupt;
PFN_ADAPTER_HANDLE_INTERRUPT pfnHandleInterrupt;
PFN_ADAPTER_DISABLE_INTERRUPTS pfnDisableInterrupts;
PFN_ADAPTER_ENABLE_INTERRUPTS pfnEnableInterrupts;
PFN_ADAPTER_CLEAR_INTERRUPTS pfnClearInterrupts;
PFN_ADAPTER_CLEAR_TX_DESC pfnClearTxDesc;
PFN_ADAPTER_GET_LINK_SPEED pfnGetLinkSpeed;
PFN_ADAPTER_GET_LINK_MODE pfnGetLinkMode;
PFN_ADAPTER_GET_LINK_STATE pfnGetLinkState;
PFN_ADAPTER_IS_LINK_INITIALIZING pfnIsLinkInitializing;
PFN_ADAPTER_RESET_PHY_INIT_STATE pfnResetPhyInitState;
PFN_ADAPTER_GET_TRANSMIT_QUEUE_SIZE pfnGetTransmitQueueSize;
PFN_ADAPTER_GET_RECEIVE_QUEUE_SIZE pfnGetReceiveQueueSize;
PFN_ADAPTER_GET_STATISTICS pfnGetStatistics;
PFN_ADAPTER_GET_POWER_CAPS pfnGetPowerCaps;
PFN_ADAPTER_GET_POWER_STATE pfnGetPowerState;
PFN_ADAPTER_SET_POWER_STATE pfnSetPowerState;
PFN_ADAPTER_SET_LOW_SPEED_FOR_PM pfnSetLowSpeedForPM;
PFN_ADAPTER_GET_PACKET_FILTER_CAPS pfnGetPacketFilterCaps;
PFN_ADAPTER_SET_PACKET_FILTER pfnSetPacketFilter;
PFN_ADAPTER_SET_WAKE_UP_PATTERN pfnSetWakeUpPattern;
PFN_ADAPTER_ENABLE_WAKE_UP_PATTERN pfnEnableWakeUpPattern;
PFN_SET_NODE_ADDRESS pfnSetNodeAddress;
PFN_GET_NODE_ADDRESS pfnGetNodeAddress;
PFN_GET_ADAPTER_INFO pfnGetAdapterInfo;
PFN_ADAPTER_SET_SPPED_DUPLEX pfnSetSpeedDuplex;
PFN_ADAPTER_READ_PHY pfnReadPhy;
PFN_ADAPTER_WRITE_PHY pfnWritePhy;
PFN_REGISTER_OFFLOAD pfnRegisterOffload;
PFN_DEREGISTER_OFFLOAD pfnDeRegisterOffload;
PFN_RX_BUFF_READY pfnRxBuffReady;
#ifndef linux
PFN_ADAPTER_ASF_SETUPREGISTERS pfnASFSetupRegisters;
PFN_ADAPTER_ASF_GETSEC0BASEADDRESS pfnASFGetSec0BaseAddress;
PFN_ADAPTER_ASF_SETSOURCEIPADDRESS pfnASFSetSourceIPAddress;
PFN_ADAPTER_ASF_GETDESTIPADDRESS pfnASFGetDestIPAddress;
PFN_ADAPTER_ASF_SETDESTIPADDRESS pfnASFSetDestIPAddress;
PFN_ADAPTER_ASF_WRITEEEPROMANDSETUPREGISTERS pfnASFWriteEEPROMAndSetupRegisters;
PFN_ADAPTER_ASF_SETDESTMACADDRESS pfnASFSetDestMACAddress;
PFN_ADAPTER_ASF_GETSOURCEMACADDRESS pfnASFGetSourceMACAddress;
PFN_ADAPTER_ASF_ISASFREADY pfnASFIsASFReady;
PFN_ADAPTER_ASF_CHECK_FOR_EEPROM_PRESENCE pfnASFCheckForEepromPresence;
#endif
PFN_ADAPTER_SET_COMMONDATA pfnSetCommonData;
PFN_ADAPTER_SET_CHECKSUMOFFLOAD pfnSetChecksumOffload;
} ADAPTER_API, *PADAPTER_API;
//////////////////////////////////////////////////////////////////
#define MAX_PACKET_TO_ACCUMULATE 16
typedef struct _ADAPTER_OPEN_PARAMS
{
PNV_VOID pOSApi; //pointer to OSAPI structure passed from higher layer
PNV_VOID pvHardwareBaseAddress; //memory mapped address passed from higher layer
NV_UINT32 ulPollInterval; //poll interval in micro seconds. Used in polling mode
NV_UINT32 MaxDpcLoop; //Maximum number of times we loop to in function ADAPTER_HandleInterrupt
NV_UINT32 MaxRxPkt; //Maximum number of packet we process each time in function UpdateReceiveDescRingData
NV_UINT32 MaxTxPkt; //Maximum number of packet we process each time in function UpdateTransmitDescRingData
NV_UINT32 MaxRxPktToAccumulate; //maximum number of rx packet we accumulate in UpdateReceiveDescRingData before
//indicating packets to OS.
NV_UINT32 SentPacketStatusSuccess; //Status returned from adapter layer to higher layer when packet was sent successfully
NV_UINT32 SentPacketStatusFailure; ////Status returned from adapter layer to higher layer when packet send was unsuccessful
NV_UINT32 SetForcedModeEveryNthRxPacket; //NOT USED: For experiment with descriptor based interrupt
NV_UINT32 SetForcedModeEveryNthTxPacket; //NOT USED: For experiment with descriptor based interrupt
NV_UINT32 RxForcedInterrupt; //NOT USED: For experiment with descriptor based interrupt
NV_UINT32 TxForcedInterrupt; //NOT USED: For experiment with descriptor based interrupt
NV_UINT32 DeviceId; //Of MAC
NV_UINT32 DeviceType;
NV_UINT32 PollIntervalInusForThroughputMode; //Of MAC
NV_UINT32 bASFEnabled;
NV_UINT32 ulDescriptorVersion;
NV_UINT32 ulMaxPacketSize;
#define MEDIA_IF_AUTO 0
#define MEDIA_IF_RGMII 1
#define MEDIA_IF_MII 2
NV_UINT32 ulMediaIF;
NV_UINT32 PhyPowerIsolationTimeoutInms;
NV_UINT32 PhyResetTimeoutInms;
NV_UINT32 PhyAutonegotiateTimeoutInms;
NV_UINT32 PhyLinkupTimeoutInms;
NV_UINT32 PhyRdWrTimeoutInus;
NV_UINT32 PhyPowerdownOnClose;
// Added for Bug 100715
NV_UINT32 bDisableMIIInterruptAndReadPhyStatus;
}ADAPTER_OPEN_PARAMS, *PADAPTER_OPEN_PARAMS;
//////////////////////////////////////////////////////////////////
// This is the one function in the adapter interface that is publicly
// available. The rest of the interface is returned in the pAdapterApi.
// The first argument needs to be cast to a OSAPI structure pointer.
// The second argument should be cast to a ADPATER_API structure pointer.
NV_API_CALL NV_SINT32 ADAPTER_Open (PADAPTER_OPEN_PARAMS pAdapterOpenParams, PNV_VOID *pvpAdapterApi, NV_UINT32 *pulPhyAddr);
//////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////
// Here are the error codes the adapter function calls return.
#define ADAPTERERR_NONE 0x0000
#define ADAPTERERR_COULD_NOT_ALLOC_CONTEXT 0x0001
#define ADAPTERERR_COULD_NOT_CREATE_CONTEXT 0x0002
#define ADAPTERERR_COULD_NOT_OPEN_PHY 0x0003
#define ADAPTERERR_TRANSMIT_QUEUE_FULL 0x0004
#define ADAPTERERR_COULD_NOT_INIT_PHY 0x0005
#define ADAPTERERR_PHYS_SIZE_SMALL 0x0006
#define ADAPTERERR_ERROR 0x0007 // Generic error
//////////////////////////////////////////////////////////////////
// This block moved from myadap.h
// nFlag for Stop/Start ReceiverAndOrTransmitter can be an OR of
// the following two flags
#define AFFECT_RECEIVER 0x01
#define AFFECT_TRANSMITTER 0x02
#define REDUCE_LENGTH_BY 48
#define EXTRA_WRITE_SLOT_TO_REDUCE_PER_SEND 4
#define MAX_TX_DESCS 256
#define MAX_TX_DESCS_VER2 (256 * 4)
typedef struct _TX_INFO_ADAP
{
NV_UINT32 NoOfDesc;
PNV_VOID pvVar2;
}TX_INFO_ADAP, *PTX_INFO_ADAP;
#define WORKAROUND_FOR_MCP3_TX_STALL
#ifdef WORKAROUND_FOR_MCP3_TX_STALL
NV_SINT32 ADAPTER_WorkaroundTXHang(PNV_VOID pvContext);
#endif
//#define TRACK_INIT_TIME
#ifdef TRACK_INIT_TIME
//This routine is defined in entry.c adapter doesn't link int64.lib
//We defined here so that its easy to use it in phy as well as mswin
#define MAX_PRINT_INDEX 32
extern NV_VOID PrintTime(NV_UINT32 ulIndex);
#define PRINT_INIT_TIME(_a) PrintTime((_a))
#else
#define PRINT_INIT_TIME(_a)
#endif
// Segmentation offload info
#define DEVCAPS_SEGOL_BP_ENABLE 0
#define DEVCAPS_SEGOL_BP_IPOPTIONS 1
#define DEVCAPS_SEGOL_BP_TCPOPTIONS 2
#define DEVCAPS_SEGOL_BP_SEGSIZE_LO 8
#define DEVCAPS_SEGOL_BP_SEGSIZE_HI 31
// Checksum offload info
// Byte 0 : V4 TX
#define DEVCAPS_V4_TX_BP_IPOPTIONS 0
#define DEVCAPS_V4_TX_BP_TCPOPTIONS 1
#define DEVCAPS_V4_TX_BP_TCPCHECKSUM 2
#define DEVCAPS_V4_TX_BP_UDPCHECKSUM 3
#define DEVCAPS_V4_TX_BP_IPCHECKSUM 4
// Byte 0 : V4 RX
#define DEVCAPS_V4_RX_BP_IPOPTIONS 8
#define DEVCAPS_V4_RX_BP_TCPOPTIONS 9
#define DEVCAPS_V4_RX_BP_TCPCHECKSUM 10
#define DEVCAPS_V4_RX_BP_UDPCHECKSUM 11
#define DEVCAPS_V4_RX_BP_IPCHECKSUM 12
// Byte 1 : V6 TX
#define DEVCAPS_V6_TX_BP_IPOPTIONS 16
#define DEVCAPS_V6_TX_BP_TCPOPTIONS 17
#define DEVCAPS_V6_TX_BP_TCPCHECKSUM 18
#define DEVCAPS_V6_TX_BP_UDPCHECKSUM 19
// Byte 2 : V6 RX
#define DEVCAPS_V6_RX_BP_IPOPTIONS 24
#define DEVCAPS_V6_RX_BP_TCPOPTIONS 25
#define DEVCAPS_V6_RX_BP_TCPCHECKSUM 26
#define DEVCAPS_V6_RX_BP_UDPCHECKSUM 27
#define DESCR_VER_1 1 // MCP1, MCP2 and CK8 descriptor version
#define DESCR_VER_2 2 // The decsriptor structure for CK8G
// Get device and vendor IDs from 32 bit DeviceVendorID
#define GET_DEVICEID(x) (((x) >> 16) & 0xFFFF)
#define GET_VENDORID(x) ((x) & 0xFFFF)
#ifdef __cplusplus
} // extern "C"
#endif
#endif // _ADAPTER_H_

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@ -1,52 +0,0 @@
$FreeBSD$
The installation and use of this software is subject to the following license terms and conditions:
License For Customer Use of NVIDIA Software
IMPORTANT NOTICE -- READ CAREFULLY: This License For Customer Use of NVIDIA Software ("LICENSE") is the agreement which governs use of the software of NVIDIA Corporation and its subsidiaries ("NVIDIA") enclosed herewith, including computer software and associated printed materials ("SOFTWARE"). By downloading, installing, copying, or otherwise using the SOFTWARE, you agree to be bound by the terms of this LICENSE. If you do not agree to the terms of this LICENSE, do not download, install or use the SOFTWARE.
RECITALS
Use of NVIDIA's products requires three elements: the SOFTWARE, the hardware on a computer motherboard, and a personal computer. The SOFTWARE is protected by copyright laws and international copyright treaties, as well as other intellectual property laws and treaties. The SOFTWARE is not sold, and instead is only licensed for use, strictly in accordance with this document. The hardware is protected by various patents, and is sold, but this agreement does not cover that sale, since it may not necessarily be sold as a package with the SOFTWARE. This agreement sets forth the terms and conditions of the SOFTWARE LICENSE only.
1. DEFINITIONS
1.1 Customer. Customer means the entity or individual that installs or uses the SOFTWARE.
2. GRANT OF LICENSE
2.1 Rights and Limitations of Grant. NVIDIA hereby grants Customer the following non-exclusive, non-transferable right to use the SOFTWARE, with the following limitations:
2.1.1 Rights. Customer may install and use one copy of the SOFTWARE on a single computer, and except for making one back-up copy of the Software, may not otherwise copy the SOFTWARE. This LICENSE of SOFTWARE may not be shared or used concurrently on different computers.
2.1.2 Linux/FreeBSD Exception. Notwithstanding the foregoing terms of Section 2.1.1, SOFTWARE designed exclusively for use on the Linux operating system may be copied and redistributed, provided that the binary files thereof are not modified in any way (except for uncompressing/compressing files). SOFTWARE designed exclusively for use on the Linux Operating system but which has been authorized by NVIDIA for use on the FreeBSD Operating System may also be copied and redistributed, provided that the binary files thereof are not modified in any way (except for unzipping of compressed files).
2.1.3 Limitations.
No Reverse Engineering. Customer may not reverse engineer, decompile, or disassemble the SOFTWARE, nor attempt in any other manner to obtain the source code.
No Separation of Components. The SOFTWARE is licensed as a single product. Its component parts may not be separated for use on more than one computer, nor otherwise used separately from the other parts.
No Rental. Customer may not rent or lease the SOFTWARE to someone else.
3. TERMINATION
This LICENSE will automatically terminate if Customer fails to comply with any of the terms and conditions hereof. In such event, Customer must destroy all copies of the SOFTWARE and all of its component parts.
4. COPYRIGHT
All title and copyrights in and to the SOFTWARE (including but not limited to all images, photographs, animations, video, audio, music, text, and other information incorporated into the SOFTWARE), the accompanying printed materials, and any copies of the SOFTWARE, are owned by NVIDIA, or its suppliers. The SOFTWARE is protected by copyright laws and international treaty provisions. Accordingly, Customer is required to treat the SOFTWARE like any other copyrighted material, except as otherwise allowed pursuant to this LICENSE and that it may make one copy of the SOFTWARE solely for backup or archive purposes.
5. APPLICABLE LAW
This agreement shall be deemed to have been made in, and shall be construed pursuant to, the laws of the State of California.
6. DISCLAIMER OF WARRANTIES AND LIMITATION ON LIABILITY
6.1 No Warranties. TO THE MAXIMUM EXTENT PERMITTED BY APPLICABLE LAW, THE SOFTWARE IS PROVIDED "AS IS" AND NVIDIA AND ITS SUPPLIERS DISCLAIM ALL WARRANTIES, EITHER EXPRESS OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
6.2 No Liability for Consequential Damages. TO THE MAXIMUM EXTENT PERMITTED BY APPLICABLE LAW, IN NO EVENT SHALL NVIDIA OR ITS SUPPLIERS BE LIABLE FOR ANY SPECIAL, INCIDENTAL, INDIRECT, OR CONSEQUENTIAL DAMAGES WHATSOEVER (INCLUDING, WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR ANY OTHER PECUNIARY LOSS) ARISING OUT OF THE USE OF OR INABILITY TO USE THE SOFTWARE, EVEN IF NVIDIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
7. MISCELLANEOUS
The United Nations Convention on Contracts for the International Sale of Goods is specifically disclaimed. If any provision of this LICENSE is inconsistent with, or cannot be fully enforced under, the law, such provision will be construed as limited to the extent necessary to be consistent with and fully enforceable under the law. This agreement is the final, complete and exclusive agreement between the parties relating to the subject matter hereof, and supersedes all prior or contemporaneous understandings and agreements relating to such subject matter, whether oral or written. Customer agrees that it will not ship, transfer or export the SOFTWARE into any country, or use the SOFTWARE in any manner, prohibited by the United States Bureau of Export Administration or any export laws, restrictions or regulations. This LICENSE may only be modified in writing signed by an authorized officer of NVIDIA.

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pui7x3AO3wuCfSc+mpitbEfRDSxGZr5U+ISyGUXVglpmcgntVcmY7KnYQxjFjUdelILTRtHVnWhZ
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mmOq688biIiHrlhOy7DrVrNvEKYlkK9eqNzYBcEGQ8aaDssiqq7tILG6xfkzUNopOX7/mXJnCs5n
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0X8LIz06B4qN92mAG2MmyTIxmqwarDLaCCcTU7ML6unv4MPh0kp2bRaLNPeh0two3voe79vzupzP
m6brs46loSbSLouhIzyiFnDEkjV6ORIMIGVA25qQBIsFzzCjDgUTe7Cc5jIIAmDAGiAa2P+8trdt
CcQ9N9pYTyEJ5hBXsjR+wG+i552kh4XyTbrwgWIqGEmr6pmGMUKs7kswFj7HpKQSXyj5cG9ZQ1u+
TFvOZmKAyUh6dx/b9X2UWpgQ7pLZHB99NEJNHcV9t2nlZqb17+8MqYs6G3BwjpCevgHBnh99QYDs
WdM4zC6e0LJZUmIQGzaLGDK5/0/7Z3JVA6e83EzNrpDk4n0iSpenTMRgJoYJCxQ+n+f8t7nJn1a9
6e5tIR140NovoAX/8XckU4UJAK1QopA=
====

281
sys/contrib/dev/nve/basetype.h
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@ -1,281 +0,0 @@
/***************************************************************************\
|* *|
|* Copyright 2001-2004 NVIDIA Corporation. All Rights Reserved. *|
|* *|
|* THE INFORMATION CONTAINED HEREIN IS PROPRIETARY AND CONFIDENTIAL *|
|* TO NVIDIA, CORPORATION. USE, REPRODUCTION OR DISCLOSURE TO ANY *|
|* THIRD PARTY IS SUBJECT TO WRITTEN PRE-APPROVAL BY NVIDIA, CORP. *|
|* *|
|* THE INFORMATION CONTAINED HEREIN IS PROVIDED "AS IS" WITHOUT *|
|* EXPRESS OR IMPLIED WARRANTY OF ANY KIND, INCLUDING ALL IMPLIED *|
|* WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A *|
|* PARTICULAR PURPOSE. *|
|* *|
\***************************************************************************/
/*++
File:
basetype.h
Abstract:
This file contains the base type definitions used by the networking driver.
Revision History:
SNo. Date Author Description
1. 2/7/2000 AJha Created
*/
#ifndef _BASETYPE_H_
#define _BASETYPE_H_
#ifndef IN
#define IN
#endif
#ifndef OUT
#define OUT
#endif
//
// Useful "types"
#ifndef NULL
#define NULL 0
#endif
#ifndef TRUE
#define TRUE 1
#endif
#ifndef FALSE
#define FALSE 0
#endif
#if 1
//
// Don't use as these are going to be deleted soon. Use NV_ instead
//
#define VOID void
typedef VOID *PVOID;
typedef unsigned char UCHAR;
typedef UCHAR * PUCHAR;
typedef unsigned short USHORT;
typedef USHORT * PUSHORT;
#ifdef linux
typedef unsigned int ULONG;
#else
typedef unsigned long ULONG;
#endif
typedef ULONG * PULONG;
typedef char CHAR;
typedef short SHORT;
typedef long LONG;
typedef unsigned int UINT;
typedef unsigned int *PUINT;
#endif
#define NV_VOID void
typedef NV_VOID *PNV_VOID;
typedef unsigned long NV_BOOLEAN, *PNV_BOOLEAN;
typedef unsigned char NV_UINT8, *PNV_UINT8;
typedef unsigned short NV_UINT16, *PNV_UINT16;
#ifdef linux
typedef unsigned int NV_UINT32, *PNV_UINT32;
#else
typedef unsigned long NV_UINT32, *PNV_UINT32;
#endif
typedef signed char NV_SINT8, *PNV_SINT8;
typedef signed short NV_SINT16, *PNV_SINT16;
typedef signed long NV_SINT32, *PNV_SINT32;
#if defined(linux)
typedef unsigned long long NV_UINT64, *PNV_UINT64;
typedef signed long long NV_SINT64, *PNV_SINT64;
#else
#if _MSC_VER >= 1200 // MSVC 6.0 onwards
typedef unsigned __int64 NV_UINT64, *PNV_UINT64;
typedef signed __int64 NV_SINT64, *PNV_SINT64;
#else
typedef unsigned long NV_UINT64, *PNV_UINT64;
typedef signed long NV_SINT64, *PNV_SINT64;
#endif
#endif
#ifndef _AMD64_
typedef unsigned int NV_UINT;
typedef signed int NV_INT;
#else
#if defined(linux)
typedef unsigned long long NV_UINT;
typedef signed long long NV_INT;
#else
typedef unsigned __int64 NV_UINT;
typedef signed __int64 NV_INT;
#endif
#endif
//
// Floating point definitions
//
typedef float NV_REAL32; // 4-byte floating point
typedef double NV_REAL64; // 8-byte floating point
//
// Bit defintions
//
#define NV_BIT(bitpos) (1 << (bitpos))
// NV_BIT_SET
// Sets the specified bit position (0..31).
// Parameter bits can be 1 byte to 4 bytes, but the caller needs to make sure bitpos fits into it.
// x = 0xA0
// NV_BIT_SET(x, 1)
// Result: x = 0xA2
#define NV_BIT_SET(bits, bitpos) ((bits) |= (NV_BIT(bitpos)))
// NV_BIT_CLEAR
// Clears the specified bit position (0..31)
// Parameter bits can be 1 byte to 4 bytes, but the caller needs to make sure bitpos fits into it.
// x = 0xAA
// NV_BIT_CLEAR(x, 1)
// Result: x = 0xA8
#define NV_BIT_CLEAR(bits, bitpos) ((bits) &= (~NV_BIT(bitpos)))
// NV_BIT_GET
// Gets the bit at the specified bit position (0..31)
// Parameter bits can be 1 byte to 4 bytes, but the caller needs to make sure bitpos fits into it.
// Result is either 1 or 0.
// x = 0xAA
// NV_BIT_GET(x, 1)
// Result: x = 1
#define NV_BIT_GET(bits, bitpos) (((bits) >> (bitpos)) & 0x0001)
// NV_BIT_GETVALUE
// Gets the value from a 32 bit ULONG at specified bit position.
// Parameter bits needs to be 4 bytes long.
// Ex. ul32 = 0xFEDCBA98
// ulVal = NV_BIT_GETVALUE(ul32, 3, 0) : Gets value from Bit position 3 to 0
// Result : ulVal = 8
#define NV_BIT_GETVALUE(ulOrigValue, bitposHi, bitposLow) (((ulOrigValue) >> (bitposLow)) & (~(0xFFFFFFFF << ((bitposHi) - (bitposLow) +1))))
// NV_BIT_SETVALUE
// Set a value in a 32 bit ULONG at a specific bit position.
// Parameter bits needs to be 4 bytes long.
// Ex. ul32 = 0xFEDCBA98
// NV_BIT_SETVALUE(ul32, 0xF, 3, 0) : Sets value at Bit position 3 to 0
// Result : ul32 becomes 0xFEDCBA9F
#define NV_BIT_SETVALUE(ulOrigValue, ulWindowValue, bitposHi, bitposLow) \
((ulOrigValue) = ((((ulOrigValue) & (~ ((0xFFFFFFFF >> (31 - (bitposHi))) & (0xFFFFFFFF << (bitposLow))))) | ((ulWindowValue) << (bitposLow)))))
#define NV_BYTE(ulus, bytepos) ((ulus >> (8 * (bytepos))) & 0xFF)
#define SWAP_U16(us) ((((us) & 0x00FF) << 8) | \
(((us) & 0xFF00) >> 8))
#define SWAP_U32(ul) ((((ul) & 0x000000FF) << 24) | \
(((ul) & 0x0000FF00) << 8) | \
(((ul) & 0x00FF0000) >> 8) | \
(((ul) & 0xFF000000) >> 24))
#define NV_FIELD_OFFSET(TYPE, FIELD) ((NV_UINT32)((NV_UINT64)&((TYPE *)0)->FIELD))
#define ADDRESS_OFFSET(structure, member) ((NV_UINT32) ((NV_UINT8 *) &(structure).member \
- (NV_UINT8 *) &(structure)))
#define NV_MIN(a, b) ((a < b) ? a : b)
#define NV_MAX(a, b) ((a > b) ? a : b)
#ifdef AMD64
#define PNV_VOID_TO_NV_UINT64(x) ((NV_UINT64)(x))
#define PNV_VOID_TO_NV_UINT32(x) ((NV_UINT32)(NV_UINT64)(x))
#define NV_UINT64_TO_PNV_VOID(x) ((PNV_VOID)(x))
#define NV_UINT32_TO_PNV_VOID(x) ((PNV_VOID)(NV_UINT64)(x))
#else
#define PNV_VOID_TO_NV_UINT64(x) ((NV_UINT64)(NV_UINT32)(x))
#define PNV_VOID_TO_NV_UINT32(x) ((NV_UINT32)(x))
#define NV_UINT64_TO_PNV_VOID(x) ((PNV_VOID)(NV_UINT32)(x))
#define NV_UINT32_TO_PNV_VOID(x) ((PNV_VOID)(x))
#endif
#define NV_MAKE_TAG32(s) (((NV_UINT32)((s)[3]) << 24) | ((NV_UINT32)((s)[2]) << 16) | \
((NV_UINT32)((s)[1]) << 8) | ((NV_UINT32)((s)[0])))
#define NV_MAKE_TAG64(s) (((NV_UINT64)((s)[7]) << 56) | ((NV_UINT64)((s)[6]) << 48) | \
((NV_UINT64)((s)[5]) << 40) | ((NV_UINT64)((s)[4]) << 32) | \
((NV_UINT64)((s)[3]) << 24) | ((NV_UINT64)((s)[2]) << 16) | \
((NV_UINT64)((s)[1]) << 8) | ((NV_UINT64)((s)[0])))
typedef union _NVLARGE_INTEGER {
#if 0
// NO UNNAMED UNIONS ALLOWED !@
struct {
NV_UINT32 LowPart;
NV_SINT32 HighPart;
};
#endif
struct {
NV_UINT32 LowPart;
NV_SINT32 HighPart;
} u;
NV_SINT64 QuadPart;
} NVLARGE_INTEGER, *PNVLARGE_INTEGER;
#ifndef LINUX
typedef unsigned short NV_WCHAR;
#else
typedef unsigned long NV_WCHAR;
#endif
typedef NV_WCHAR *PNV_WSTR;
#if defined(linux)
#if !defined(NV_API_CALL)
#if defined (__i386__)
#define NV_API_CALL __attribute__ ((regparm(0)))
#else
#define NV_API_CALL
#endif
#endif
#else
#define NV_API_CALL
#endif
#endif // _BASETYPE_H_

190
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@ -1,190 +0,0 @@
/***************************************************************************\
|* *|
|* Copyright 2001-2003 NVIDIA, Corporation. All rights reserved. *|
|* *|
|* THE INFORMATION CONTAINED HEREIN IS PROPRIETARY AND CONFIDENTIAL *|
|* TO NVIDIA, CORPORATION. USE, REPRODUCTION OR DISCLOSURE TO ANY *|
|* THIRD PARTY IS SUBJECT TO WRITTEN PRE-APPROVAL BY NVIDIA, CORP. *|
|* *|
|* THE INFORMATION CONTAINED HEREIN IS PROVIDED "AS IS" WITHOUT *|
|* EXPRESS OR IMPLIED WARRANTY OF ANY KIND, INCLUDING ALL IMPLIED *|
|* WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A *|
|* PARTICULAR PURPOSE. *|
|* *|
\***************************************************************************/
/*
* This file contains the header info common to the network drivers and applications.
* Currently, these applications include ASF, co-installers, and qstats.
*
*
*/
#ifndef _DRVINFO_H_
#define _DRVINFO_H_
// Switch to byte packing, regardless of global packing specified by the compiler switch
#pragma pack(1)
//////////////////////////////////////////////////////////////////
// For the ADAPTER_GetStatistics call used by qstats. This
// is the template used by the legacy driver.
#define MAX_TRANSMIT_COLISION_STATS 16
#define ADAPTER_STATS_LEGACY_VERSION 1
#define ADAPTER_STATS_RM_VERSION 2
typedef struct _ADAPTER_STATS_V1
{
NV_UINT32 ulVersion;
NV_UINT32 ulSuccessfulTransmissions;
NV_UINT32 ulFailedTransmissions;
NV_UINT32 ulRetryErrors;
NV_UINT32 ulUnderflowErrors;
NV_UINT32 ulLossOfCarrierErrors;
NV_UINT32 ulLateCollisionErrors;
NV_UINT32 ulDeferredTransmissions;
NV_UINT32 ulExcessDeferredTransmissions;
NV_UINT32 aulSuccessfulTransmitsAfterCollisions[MAX_TRANSMIT_COLISION_STATS];
NV_UINT32 ulMissedFrames;
NV_UINT32 ulSuccessfulReceptions;
NV_UINT32 ulFailedReceptions;
NV_UINT32 ulCRCErrors;
NV_UINT32 ulFramingErrors;
NV_UINT32 ulOverFlowErrors;
NV_UINT32 ulFrameErrorsPrivate; //Not for public.
NV_UINT32 ulNullBufferReceivePrivate; //Not for public, These are the packets which we didn't indicate to OS
//interrupt related statistics
NV_UINT32 ulRxInterrupt;
NV_UINT32 ulRxInterruptUnsuccessful;
NV_UINT32 ulTxInterrupt;
NV_UINT32 ulTxInterruptUnsuccessful;
NV_UINT32 ulPhyInterrupt;
} ADAPTER_STATS_V1, *PADAPTER_STATS_V1;
//////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////
// For the ADAPTER_GetStatistics call used by qstats. This
// is the template used by the FD.
typedef struct _ADAPTER_STATS
{
NV_UINT32 ulVersion;
NV_UINT8 ulMacAddress[6];
//
// Tx counters.
//
NV_UINT64 ulSuccessfulTransmissions;
NV_UINT64 ulFailedTransmissions;
NV_UINT64 ulRetryErrors;
NV_UINT64 ulUnderflowErrors;
NV_UINT64 ulLossOfCarrierErrors;
NV_UINT64 ulLateCollisionErrors;
NV_UINT64 ulDeferredTransmissions;
NV_UINT64 ulExcessDeferredTransmissions;
NV_UINT64 aulSuccessfulTransmitsAfterCollisions[MAX_TRANSMIT_COLISION_STATS];
//
// New Tx counters for GigE.
//
NV_UINT64 ulTxByteCount;
//
// Rx counters.
//
NV_UINT64 ulMissedFrames;
NV_UINT64 ulSuccessfulReceptions;
NV_UINT64 ulFailedReceptions;
NV_UINT64 ulCRCErrors;
NV_UINT64 ulLengthErrors;
NV_UINT64 ulFramingErrors;
NV_UINT64 ulOverFlowErrors;
NV_UINT64 ulRxNoBuffer;
NV_UINT64 ulFrameErrorsPrivate; //Not for public.
NV_UINT64 ulNullBufferReceivePrivate; //Not for public, These are the packets which we didn't indicate to OS
//
// New Rx counters for GigE.
//
NV_UINT64 ulRxExtraByteCount;
NV_UINT64 ulRxFrameTooLongCount;
NV_UINT64 ulRxFrameAlignmentErrorCount;
NV_UINT64 ulRxLateCollisionErrors;
NV_UINT64 ulRxRuntPacketErrors;
NV_UINT64 ulRxUnicastFrameCount;
NV_UINT64 ulRxMulticastFrameCount;
NV_UINT64 ulRxBroadcastFrameCount;
NV_UINT64 ulRxPromiscuousModeFrameCount;
//Interrupt related statistics
NV_UINT64 ulRxInterrupt;
NV_UINT64 ulRxInterruptUnsuccessful;
NV_UINT64 ulTxInterrupt;
NV_UINT64 ulTxInterruptUnsuccessful;
NV_UINT64 ulPhyInterrupt;
//
// Handy things to know
//
NV_UINT64 ulDescriptorVersion;
NV_UINT64 ulPollingCfg; // configured for cpu or throughput
NV_UINT64 ulPollingState; // current optimizefor state.
NV_UINT64 ulNumTxDesc;
NV_UINT64 ulNumRxDesc;
//
// Useful to determine if TX is stuck.
//
NV_UINT64 ulNumTxPktsQueued;
NV_UINT64 ulNumTxPktsInProgress;
//
// Rx Xsum Cntrs
//
NV_UINT64 ulNoRxPktsNoXsum;
NV_UINT64 ulNoRxPktsXsumIpPassTcpFail;
NV_UINT64 ulNoRxPktsXsumIpPassUdpFail;
NV_UINT64 ulNoRxPktsXsumIpFail;
NV_UINT64 ulNoRxPktsXsumIpPassNoTcpUdp;
NV_UINT64 ulNoRxPktsXsumIpPassTcpPass;
NV_UINT64 ulNoRxPktsXsumIpPassUdpPass;
NV_UINT64 ulNoRxPktsXsumReserved;
#ifdef _PERF_LOOP_CNTRS
NV_UINT64 ulNumTxCmplsToProcess;
NV_UINT64 ulNumRxCmplsToProcess;
NV_UINT64 ulNumIntsToProcess;
NV_UINT64 IntLoop0Cnt;
NV_UINT64 IntLoop1Cnt;
NV_UINT64 IntLoop2Cnt;
NV_UINT64 IntLoop3Cnt;
NV_UINT64 IntLoop4Cnt;
NV_UINT64 IntLoop5Cnt;
NV_UINT64 IntLoop6To10Cnt;
NV_UINT64 IntLoop11Cnt;
NV_UINT64 IntMaxLoopCnt;
NV_UINT64 IntRxCnt0;
NV_UINT64 IntTxCnt0;
NV_UINT64 MaxRxLoopCnt;
NV_UINT64 MaxTxLoopCnt;
#endif
} ADAPTER_STATS, *PADAPTER_STATS;
//////////////////////////////////////////////////////////////////
#pragma pack()
#endif // #define _DRVINFO_H_

52
sys/contrib/dev/nve/i386/nvenetlib.README
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@ -1,52 +0,0 @@
$FreeBSD$
The installation and use of this software is subject to the following license terms and conditions:
License For Customer Use of NVIDIA Software
IMPORTANT NOTICE -- READ CAREFULLY: This License For Customer Use of NVIDIA Software ("LICENSE") is the agreement which governs use of the software of NVIDIA Corporation and its subsidiaries ("NVIDIA") enclosed herewith, including computer software and associated printed materials ("SOFTWARE"). By downloading, installing, copying, or otherwise using the SOFTWARE, you agree to be bound by the terms of this LICENSE. If you do not agree to the terms of this LICENSE, do not download, install or use the SOFTWARE.
RECITALS
Use of NVIDIA's products requires three elements: the SOFTWARE, the hardware on a computer motherboard, and a personal computer. The SOFTWARE is protected by copyright laws and international copyright treaties, as well as other intellectual property laws and treaties. The SOFTWARE is not sold, and instead is only licensed for use, strictly in accordance with this document. The hardware is protected by various patents, and is sold, but this agreement does not cover that sale, since it may not necessarily be sold as a package with the SOFTWARE. This agreement sets forth the terms and conditions of the SOFTWARE LICENSE only.
1. DEFINITIONS
1.1 Customer. Customer means the entity or individual that installs or uses the SOFTWARE.
2. GRANT OF LICENSE
2.1 Rights and Limitations of Grant. NVIDIA hereby grants Customer the following non-exclusive, non-transferable right to use the SOFTWARE, with the following limitations:
2.1.1 Rights. Customer may install and use one copy of the SOFTWARE on a single computer, and except for making one back-up copy of the Software, may not otherwise copy the SOFTWARE. This LICENSE of SOFTWARE may not be shared or used concurrently on different computers.
2.1.2 Linux/FreeBSD Exception. Notwithstanding the foregoing terms of Section 2.1.1, SOFTWARE designed exclusively for use on the Linux operating system may be copied and redistributed, provided that the binary files thereof are not modified in any way (except for uncompressing/compressing files). SOFTWARE designed exclusively for use on the Linux Operating system but which has been authorized by NVIDIA for use on the FreeBSD Operating System may also be copied and redistributed, provided that the binary files thereof are not modified in any way (except for unzipping of compressed files).
2.1.3 Limitations.
No Reverse Engineering. Customer may not reverse engineer, decompile, or disassemble the SOFTWARE, nor attempt in any other manner to obtain the source code.
No Separation of Components. The SOFTWARE is licensed as a single product. Its component parts may not be separated for use on more than one computer, nor otherwise used separately from the other parts.
No Rental. Customer may not rent or lease the SOFTWARE to someone else.
3. TERMINATION
This LICENSE will automatically terminate if Customer fails to comply with any of the terms and conditions hereof. In such event, Customer must destroy all copies of the SOFTWARE and all of its component parts.
4. COPYRIGHT
All title and copyrights in and to the SOFTWARE (including but not limited to all images, photographs, animations, video, audio, music, text, and other information incorporated into the SOFTWARE), the accompanying printed materials, and any copies of the SOFTWARE, are owned by NVIDIA, or its suppliers. The SOFTWARE is protected by copyright laws and international treaty provisions. Accordingly, Customer is required to treat the SOFTWARE like any other copyrighted material, except as otherwise allowed pursuant to this LICENSE and that it may make one copy of the SOFTWARE solely for backup or archive purposes.
5. APPLICABLE LAW
This agreement shall be deemed to have been made in, and shall be construed pursuant to, the laws of the State of California.
6. DISCLAIMER OF WARRANTIES AND LIMITATION ON LIABILITY
6.1 No Warranties. TO THE MAXIMUM EXTENT PERMITTED BY APPLICABLE LAW, THE SOFTWARE IS PROVIDED "AS IS" AND NVIDIA AND ITS SUPPLIERS DISCLAIM ALL WARRANTIES, EITHER EXPRESS OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
6.2 No Liability for Consequential Damages. TO THE MAXIMUM EXTENT PERMITTED BY APPLICABLE LAW, IN NO EVENT SHALL NVIDIA OR ITS SUPPLIERS BE LIABLE FOR ANY SPECIAL, INCIDENTAL, INDIRECT, OR CONSEQUENTIAL DAMAGES WHATSOEVER (INCLUDING, WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR ANY OTHER PECUNIARY LOSS) ARISING OUT OF THE USE OF OR INABILITY TO USE THE SOFTWARE, EVEN IF NVIDIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
7. MISCELLANEOUS
The United Nations Convention on Contracts for the International Sale of Goods is specifically disclaimed. If any provision of this LICENSE is inconsistent with, or cannot be fully enforced under, the law, such provision will be construed as limited to the extent necessary to be consistent with and fully enforceable under the law. This agreement is the final, complete and exclusive agreement between the parties relating to the subject matter hereof, and supersedes all prior or contemporaneous understandings and agreements relating to such subject matter, whether oral or written. Customer agrees that it will not ship, transfer or export the SOFTWARE into any country, or use the SOFTWARE in any manner, prohibited by the United States Bureau of Export Administration or any export laws, restrictions or regulations. This LICENSE may only be modified in writing signed by an authorized officer of NVIDIA.

320
sys/contrib/dev/nve/i386/nvenetlib.o.bz2.uu
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TggdU58m00/U7729xLY50Y2c49YkJkwYViRGskH5P8a+xom3wLYg0KO7ZXnzEqGR+lgsHi4SmxDa
vYmTVVGKog14b8IdmqeCwX8HnnnlcbtP42MTYeFi39WRAAnsIFaD+cn/rcdfkfbudry+vTv8K5qu
f+WlY9DDfBbflz2r9HrfVQjzsx7dXUUm8n1ztYvhQ7ENAsacxQiMPfgl7Gr+Ks6DFx1fLVJ0vN9v
6OT08VJ3+T63z7/N3HE8jF3+Dg7uu28PKZX78fPW15vI+srPwsK2TW2cua+apptrW8DJfwJHU733
JKoptLHdr8c7D8LmOgq7TfZvLYi9jWgdcgUiADjLhJLPwl76z4B02s5CCScIpyUCICIuxFDB2zYJ
s0SIZ4M6ahruHqIbl6Rt06HRkoClYAwokbTowKUoCIgkYm0oMmMNJQ6pSQSaWBReQyaJsggjwGSX
n1CAv8YxT7Eyff2KAIoyB2nQyQnyo9lkJD2JooQnSkIeFOSB2SNoUUiwEWLEFixY9R4f8HpOUnYY
AbOhpDhToyFiY+kskk6tsvZwR7oTOeQggjNDB6xGn8m6dJJ62Iih2CYG/lWLDCuIj5/k4zufW0tJ
5sQySTCQBiZDmKkMQgVtoqIttiiT+v7zw+H/F2s4H8xSc4Y3oaK23v2VURWIojDqbytV27Sa1LDi
27os3opje9eGfRunfJcjci4iy2iqThObvVDbIcsMmFO7cwbCptAuLSsOpMZwzw47dCW0637iMYwC
cw/3fxqI4BkB5hhuiS58PK4Cx4+zT/hgAc71UArDKx0d5pXcpvb76myEXZVKgHO07fxvN7WQ1+Y2
ZKVzdT9efaG7Oa+TmTX7/UjtD15109XfGOq5oIK5LI38PscHDwRPr3WG6X9ud/qL0Kvn04cD5uJi
PLlZTv65C9kwB8D7A/bl+OzUvUICWMgUpUcXLSdaj3+lT6qDLhfecjue+QEwo0AWYZWiIi1IGbIL
WmiaD/8XckU4UJAgx4Xl
====

29
sys/contrib/dev/nve/nvenet_version.h
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@ -1,29 +0,0 @@
/****************************************************************** \
|* *|
|* *|
|* (c) NVIDIA Corporation. All rights reserved *|
|* *|
|* THE INFORMATION CONTAINED HEREIN IS PROPRIETARY AND *|
|* CONFIDENTIAL *|
|* TO NVIDIA, CORPORATION. USE, REPORDUCTION OR DISCLOSURE TO ANY *|
|* THIRD PARTY IS SUBJECT TO WRITTEN PRE-APPROVAL BY NVIDIA CORP. *|
|* *|
|* THE INFORMATION CONTAINED HEREIN IS PROVIDED "AS IS" WITHOUT *|
|* EXPRESS OR IMPLIED WARRANTY OF ANY KIND, INCLUDING ALL IMPLIED *|
|* WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS *|
|* FOR A PARTICULAR PURPOSE. *|
|* *|
********************************************************************/
#ifndef __NVENET_VERSION_H__
#define __NVENET_VERSION_H__
#define DRIVER_VERSION_MAJOR "1"
#define DRIVER_VERSION_MINOR "0"
#define DRIVER_VERSION_PATCH "13"
#define DRIVER_VERSION DRIVER_VERSION_MAJOR"."\
DRIVER_VERSION_MINOR"-"\
DRIVER_VERSION_PATCH
#endif

128
sys/contrib/dev/nve/os.h
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@ -1,128 +0,0 @@
/***************************************************************************\
|* *|
|* Copyright 2001-2004 NVIDIA Corporation. All Rights Reserved. *|
|* *|
|* THE INFORMATION CONTAINED HEREIN IS PROPRIETARY AND CONFIDENTIAL *|
|* TO NVIDIA, CORPORATION. USE, REPRODUCTION OR DISCLOSURE TO ANY *|
|* THIRD PARTY IS SUBJECT TO WRITTEN PRE-APPROVAL BY NVIDIA, CORP. *|
|* *|
|* THE INFORMATION CONTAINED HEREIN IS PROVIDED "AS IS" WITHOUT *|
|* EXPRESS OR IMPLIED WARRANTY OF ANY KIND, INCLUDING ALL IMPLIED *|
|* WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A *|
|* PARTICULAR PURPOSE. *|
|* *|
\***************************************************************************/
/*
FILE: os.h
DATE: 2/7/00
This file contains the os interface. Note that the os interface is
itself an OS-independent API. The OS specific module is implemented
by ndis.c for Win9X/NT and linuxnet.c for linux.
*/
#ifndef _OS_H_
#define _OS_H_
#include "phy.h"
#define HDO_VERSION_STRING "HDR O: $Revision: #21 $";
// This is the maximum packet size that we will be sending
// #define MAX_PACKET_SIZE 2048
//#define RX_BUFFER_SIZE 2048
#define MIN_PACKET_MTU_SIZE 576
#define MAX_PACKET_MTU_SIZE 9202
#define MAX_PACKET_SIZE_2048 2048
#define MAX_PACKET_SIZE_1514 1514
#define MAX_PACKET_SIZE_1518 1518
#define MAX_PACKET_SIZE_JUMBO (9 * 1024)
typedef struct _MEMORY_BLOCK
{
PNV_VOID pLogical;
PNV_VOID pPhysical;
NV_UINT32 uiLength;
} MEMORY_BLOCK, *PMEMORY_BLOCK;
#define ALLOC_MEMORY_NONCACHED 0x0001
#define ALLOC_MEMORY_ALIGNED 0x0002
typedef struct _MEMORY_BLOCKEX
{
PNV_VOID pLogical;
PNV_VOID pPhysical;
NV_UINT32 uiLength;
/* Parameter to OS layer to indicate what type of memory is needed */
NV_UINT16 AllocFlags;
NV_UINT16 AlignmentSize; //always power of 2
/* Following three fields used for aligned memory allocation */
PNV_VOID pLogicalOrig;
NV_UINT32 pPhysicalOrigLow;
NV_UINT32 pPhysicalOrigHigh;
NV_UINT32 uiLengthOrig;
} MEMORY_BLOCKEX, *PMEMORY_BLOCKEX;
// The typedefs for the OS functions
typedef NV_API_CALL NV_SINT32 (* PFN_MEMORY_ALLOC) (PNV_VOID pOSCX, PMEMORY_BLOCK pMem);
typedef NV_API_CALL NV_SINT32 (* PFN_MEMORY_FREE) (PNV_VOID pOSCX, PMEMORY_BLOCK pMem);
typedef NV_API_CALL NV_SINT32 (* PFN_MEMORY_ALLOCEX) (PNV_VOID pOSCX, PMEMORY_BLOCKEX pMem);
typedef NV_API_CALL NV_SINT32 (* PFN_MEMORY_FREEEX) (PNV_VOID pOSCX, PMEMORY_BLOCKEX pMem);
typedef NV_API_CALL NV_SINT32 (* PFN_CLEAR_MEMORY) (PNV_VOID pOSCX, PNV_VOID pMem, NV_SINT32 iLength);
typedef NV_API_CALL NV_SINT32 (* PFN_STALL_EXECUTION) (PNV_VOID pOSCX, NV_UINT32 ulTimeInMicroseconds);
typedef NV_API_CALL NV_SINT32 (* PFN_ALLOC_RECEIVE_BUFFER) (PNV_VOID pOSCX, PMEMORY_BLOCK pMem, PNV_VOID *ppvID);
typedef NV_API_CALL NV_SINT32 (* PFN_FREE_RECEIVE_BUFFER) (PNV_VOID pOSCX, PMEMORY_BLOCK pMem, PNV_VOID pvID);
typedef NV_API_CALL NV_SINT32 (* PFN_PACKET_WAS_SENT) (PNV_VOID pOSCX, PNV_VOID pvID, NV_UINT32 ulSuccess);
typedef NV_API_CALL NV_SINT32 (* PFN_PACKET_WAS_RECEIVED) (PNV_VOID pOSCX, PNV_VOID pvADReadData, NV_UINT32 ulSuccess, NV_UINT8 *pNewBuffer, NV_UINT8 uc8021pPriority);
typedef NV_API_CALL NV_SINT32 (* PFN_LINK_STATE_HAS_CHANGED) (PNV_VOID pOSCX, NV_SINT32 nEnabled);
typedef NV_API_CALL NV_SINT32 (* PFN_ALLOC_TIMER) (PNV_VOID pvContext, PNV_VOID *ppvTimer);
typedef NV_API_CALL NV_SINT32 (* PFN_FREE_TIMER) (PNV_VOID pvContext, PNV_VOID pvTimer);
typedef NV_API_CALL NV_SINT32 (* PFN_INITIALIZE_TIMER) (PNV_VOID pvContext, PNV_VOID pvTimer, PTIMER_FUNC pvFunc, PNV_VOID pvFuncParameter);
typedef NV_API_CALL NV_SINT32 (* PFN_SET_TIMER) (PNV_VOID pvContext, PNV_VOID pvTimer, NV_UINT32 dwMillisecondsDelay);
typedef NV_API_CALL NV_SINT32 (* PFN_CANCEL_TIMER) (PNV_VOID pvContext, PNV_VOID pvTimer);
typedef NV_API_CALL NV_SINT32 (* PFN_PREPROCESS_PACKET) (PNV_VOID pvContext, PNV_VOID pvADReadData, PNV_VOID *ppvID,
NV_UINT8 *pNewBuffer, NV_UINT8 uc8021pPriority);
typedef NV_API_CALL PNV_VOID (* PFN_PREPROCESS_PACKET_NOPQ) (PNV_VOID pvContext, PNV_VOID pvADReadData);
typedef NV_API_CALL NV_SINT32 (* PFN_INDICATE_PACKETS) (PNV_VOID pvContext, PNV_VOID *ppvID, NV_UINT32 ulNumPacket);
typedef NV_API_CALL NV_SINT32 (* PFN_LOCK_ALLOC) (PNV_VOID pOSCX, NV_SINT32 iLockType, PNV_VOID *ppvLock);
typedef NV_API_CALL NV_SINT32 (* PFN_LOCK_ACQUIRE) (PNV_VOID pOSCX, NV_SINT32 iLockType, PNV_VOID pvLock);
typedef NV_API_CALL NV_SINT32 (* PFN_LOCK_RELEASE) (PNV_VOID pOSCX, NV_SINT32 iLockType, PNV_VOID pvLock);
typedef NV_API_CALL PNV_VOID (* PFN_RETURN_BUFFER_VIRTUAL) (PNV_VOID pvContext, PNV_VOID pvADReadData);
// Here are the OS functions that those objects below the OS interface
// can call up to.
typedef struct _OS_API
{
// OS Context -- this is a parameter to every OS API call
PNV_VOID pOSCX;
// Basic OS functions
PFN_MEMORY_ALLOC pfnAllocMemory;
PFN_MEMORY_FREE pfnFreeMemory;
PFN_MEMORY_ALLOCEX pfnAllocMemoryEx;
PFN_MEMORY_FREEEX pfnFreeMemoryEx;
PFN_CLEAR_MEMORY pfnClearMemory;
PFN_STALL_EXECUTION pfnStallExecution;
PFN_ALLOC_RECEIVE_BUFFER pfnAllocReceiveBuffer;
PFN_FREE_RECEIVE_BUFFER pfnFreeReceiveBuffer;
PFN_PACKET_WAS_SENT pfnPacketWasSent;
PFN_PACKET_WAS_RECEIVED pfnPacketWasReceived;
PFN_LINK_STATE_HAS_CHANGED pfnLinkStateHasChanged;
PFN_ALLOC_TIMER pfnAllocTimer;
PFN_FREE_TIMER pfnFreeTimer;
PFN_INITIALIZE_TIMER pfnInitializeTimer;
PFN_SET_TIMER pfnSetTimer;
PFN_CANCEL_TIMER pfnCancelTimer;
PFN_PREPROCESS_PACKET pfnPreprocessPacket;
PFN_PREPROCESS_PACKET_NOPQ pfnPreprocessPacketNopq;
PFN_INDICATE_PACKETS pfnIndicatePackets;
PFN_LOCK_ALLOC pfnLockAlloc;
PFN_LOCK_ACQUIRE pfnLockAcquire;
PFN_LOCK_RELEASE pfnLockRelease;
PFN_RETURN_BUFFER_VIRTUAL pfnReturnBufferVirtual;
} OS_API, *POS_API;
#endif // _OS_H_

164
sys/contrib/dev/nve/phy.h
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@ -1,164 +0,0 @@
/***************************************************************************\
|* *|
|* Copyright 2001-2004 NVIDIA Corporation. All Rights Reserved. *|
|* *|
|* THE INFORMATION CONTAINED HEREIN IS PROPRIETARY AND CONFIDENTIAL *|
|* TO NVIDIA, CORPORATION. USE, REPRODUCTION OR DISCLOSURE TO ANY *|
|* THIRD PARTY IS SUBJECT TO WRITTEN PRE-APPROVAL BY NVIDIA, CORP. *|
|* *|
|* THE INFORMATION CONTAINED HEREIN IS PROVIDED "AS IS" WITHOUT *|
|* EXPRESS OR IMPLIED WARRANTY OF ANY KIND, INCLUDING ALL IMPLIED *|
|* WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A *|
|* PARTICULAR PURPOSE. *|
|* *|
\***************************************************************************/
/*
FILE: phy.h
DATE: 2/7/00
This file contains the functional interface to the PHY.
*/
#ifndef _PHY_H_
#define _PHY_H_
//#include "basetype.h"
//#include "nvevent.h"
#ifdef __cplusplus
extern "C" {
#endif
#define DEFAULT_PHY_ADDRESS 1
#define HDP_VERSION_STRING "HDR P: $Revision: #23 $"
//
// Defaults for PHY timeout values.
//
#define PHY_POWER_ISOLATION_MS_TIMEOUT_DEFAULT 50
#define PHY_RESET_MS_TIMEOUT_DEFAULT 50
#define PHY_AUTONEG_MS_TIMEOUT_DEFAULT 3000
#define PHY_LINK_UP_MS_TIMEOUT_DEFAULT 2400
#define PHY_RDWR_US_TIMEOUT_DEFAULT 2048
#define PHY_POWER_DOWN_US_TIMEOUT_DEFAULT 500
/////////////////////////////////////////////////////////////////////////
// The phy module knows the values that need to go into the phy registers
// but typically the method of writing those registers is controlled by
// another module (usually the adapter because it is really the hardware
// interface.) Hence, the phy needs routines to call to read and write the
// phy registers. This structure with appropriate routines will be provided
// in the PHY_Open call.
typedef NV_API_CALL NV_SINT32 (* PFN_READ_PHY) (PNV_VOID pvData, NV_UINT32 ulPhyAddr, NV_UINT32 ulPhyReg, NV_UINT32 *pulValue);
typedef NV_API_CALL NV_SINT32 (* PFN_WRITE_PHY) (PNV_VOID pvData, NV_UINT32 ulPhyAddr, NV_UINT32 ulPhyReg, NV_UINT32 ulValue);
typedef struct PHY_SUPPORT_API
{
PNV_VOID pADCX;
PFN_READ_PHY pfnRead;
PFN_WRITE_PHY pfnWrite;
// PFN_EVENT_OCCURED pfnEventOccurred;
//
// These fields are passed down via the FD. FD get's them
// from the registry. They allow one to fine tune the timeout
// values in the PHY.
//
NV_UINT32 PhyPowerIsolationTimeoutInms;
NV_UINT32 PhyResetTimeoutInms;
NV_UINT32 PhyAutonegotiateTimeoutInms;
NV_UINT32 PhyLinkupTimeoutInms;
NV_UINT32 PhyPowerdownOnCloseInus;
} PHY_SUPPORT_API, *PPHY_SUPPORT_API;
/////////////////////////////////////////////////////////////////////////
/////////////////////////////////////////////////////////////////////////
// The functional typedefs for the PHY Api
typedef NV_SINT32 (* PFN_PHY_INIT) (PNV_VOID pvContext, NV_UINT32 *pulLinkState, NV_UINT32 PhyMode);
typedef NV_SINT32 (* PFN_PHY_DEINIT) (PNV_VOID pvContext);
typedef NV_SINT32 (* PFN_PHY_CLOSE) (PNV_VOID pvContext);
typedef NV_SINT32 (* PFN_GET_LINK_SPEED) (PNV_VOID pvContext);
typedef NV_SINT32 (* PFN_GET_LINK_MODE) (PNV_VOID pvContext);
typedef NV_SINT32 (* PFN_GET_LINK_STATE) (PNV_VOID pvContext, NV_UINT32 *pulLinkState);
typedef NV_SINT32 (* PFN_IS_LINK_INITIALIZING) (PNV_VOID pvContext);
typedef NV_SINT32 (* PFN_RESET_PHY_INIT_STATE) (PNV_VOID pvContext);
typedef NV_SINT32 (* PFN_FORCE_SPEED_DUPLEX) (PNV_VOID pvContext, NV_UINT16 usSpeed, NV_UINT8 ucForceDpx, NV_UINT8 ucForceMode);
typedef NV_SINT32 (* PFN_PHY_POWERDOWN) (PNV_VOID pvContext);
typedef NV_SINT32 (* PFN_SET_LOW_SPEED_FOR_PM) (PNV_VOID pvContext);
typedef struct _PHY_API
{
// This is the context to pass back in as the first arg on all
// the calls in the API below.
PNV_VOID pPHYCX;
PFN_PHY_INIT pfnInit;
PFN_PHY_INIT pfnInitFast;
PFN_PHY_DEINIT pfnDeinit;
PFN_PHY_CLOSE pfnClose;
PFN_GET_LINK_SPEED pfnGetLinkSpeed;
PFN_GET_LINK_MODE pfnGetLinkMode;
PFN_GET_LINK_STATE pfnGetLinkState;
PFN_IS_LINK_INITIALIZING pfnIsLinkInitializing;
PFN_RESET_PHY_INIT_STATE pfnResetPhyInitState;
PFN_FORCE_SPEED_DUPLEX pfnForceSpeedDuplex;
PFN_PHY_POWERDOWN pfnPowerdown;
PFN_SET_LOW_SPEED_FOR_PM pfnSetLowSpeedForPM;
} PHY_API, *PPHY_API;
/////////////////////////////////////////////////////////////////////////
/////////////////////////////////////////////////////////////////////////
// This is the one function in the PHY interface that is publicly
// available. The rest of the interface is returned in the pPhyApi;
// The first argument needs to be cast to a POS_API structure ptr.
// On input the second argument is a ptr to a PPHY_SUPPORT_API.
// On output, the second argument should be treated as a ptr to a
// PPHY_API and set appropriately.
extern NV_SINT32 PHY_Open (PNV_VOID pvOSApi, PNV_VOID pPhyApi, NV_UINT32 *pulPhyAddr, NV_UINT32 *pulPhyConnected);
/////////////////////////////////////////////////////////////////////////
/////////////////////////////////////////////////////////////////////////
// Here are the error codes the phy functions can return.
#define PHYERR_NONE 0x0000
#define PHYERR_COULD_NOT_ALLOC_CONTEXT 0x0001
#define PHYERR_RESET_NEVER_FINISHED 0x0002
#define PHYERR_NO_AVAILABLE_LINK_SPEED 0x0004
#define PHYERR_INVALID_SETTINGS 0x0005
#define PHYERR_READ_FAILED 0x0006
#define PHYERR_WRITE_FAILED 0x0007
#define PHYERR_NO_PHY 0x0008
#define PHYERR_NO_RESOURCE 0x0009
#define PHYERR_POWER_ISOLATION_TIMEOUT 0x000A
#define PHYERR_POWER_DOWN_TIMEOUT 0x000B
#define PHYERR_AUTONEG_TIMEOUT 0x000C
#define PHYERR_PHY_LINK_SPEED_UNCHANGED 0x000D
#define PHY_INVALID_PHY_ADDR 0xFFFF;
/////////////////////////////////////////////////////////////////////////
// This value can be used in the ulPhyLinkSpeed field.
#define PHY_LINK_SPEED_UNKNOWN 0x0FFFFFFFF
//
// Values used to configure PHY mode.
//
#define PHY_MODE_MII 1
#define PHY_MODE_RGMII 2
typedef NV_VOID (* PTIMER_FUNC) (PNV_VOID pvContext);
#ifdef __cplusplus
} // extern "C"
#endif
#endif //_PHY_H_

1791
sys/dev/nve/if_nve.c
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File diff suppressed because it is too large Load diff

193
sys/dev/nve/if_nvereg.h
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@ -1,193 +0,0 @@
/*
* Copyright (c) 2005 by David E. O'Brien <obrien@FreeBSD.org>.
* Copyright (c) 2003 by Quinton Dolan <q@onthenet.com.au>.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS `AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $Id: if_nvreg.h,v 1.6 2004/08/12 14:00:05 q Exp $
* $FreeBSD$
*/
#ifndef _IF_NVEREG_H_
#define _IF_NVEREG_H_
#ifndef PCI_VENDOR_NVIDIA
#define PCI_VENDOR_NVIDIA 0x10DE
#endif
#define PCI_PRODUCT_NVIDIA_NFORCE_LAN 0x01C3
#define PCI_PRODUCT_NVIDIA_NFORCE2_LAN 0x0066
#define PCI_PRODUCT_NVIDIA_NFORCE3_LAN1 0x00D6
#define PCI_PRODUCT_NVIDIA_NFORCE2_400_LAN1 0x0086
#define PCI_PRODUCT_NVIDIA_NFORCE2_400_LAN2 0x008C
#define PCI_PRODUCT_NVIDIA_NFORCE3_250_LAN 0x00E6
#define PCI_PRODUCT_NVIDIA_NFORCE3_LAN4 0x00DF
#define PCI_PRODUCT_NVIDIA_NFORCE4_LAN1 0x0056
#define PCI_PRODUCT_NVIDIA_NFORCE4_LAN2 0x0057
#define PCI_PRODUCT_NVIDIA_MCP04_LAN1 0x0037
#define PCI_PRODUCT_NVIDIA_MCP04_LAN2 0x0038
#define PCI_PRODUCT_NVIDIA_NFORCE430_LAN1 0x0268
#define PCI_PRODUCT_NVIDIA_NFORCE430_LAN2 0x0269
#define PCI_PRODUCT_NVIDIA_MCP55_LAN1 0x0372
#define PCI_PRODUCT_NVIDIA_MCP55_LAN2 0x0373
#define PCI_PRODUCT_NVIDIA_MCP61_LAN1 0x03e5
#define PCI_PRODUCT_NVIDIA_MCP61_LAN2 0x03e6
#define PCI_PRODUCT_NVIDIA_MCP61_LAN3 0x03ee
#define PCI_PRODUCT_NVIDIA_MCP61_LAN4 0x03ef
#define PCI_PRODUCT_NVIDIA_MCP65_LAN1 0x0450
#define PCI_PRODUCT_NVIDIA_MCP65_LAN2 0x0451
#define PCI_PRODUCT_NVIDIA_MCP65_LAN3 0x0452
#define PCI_PRODUCT_NVIDIA_MCP65_LAN4 0x0453
#define PCI_PRODUCT_NVIDIA_NFORCE3_LAN2 PCI_PRODUCT_NVIDIA_NFORCE2_400_LAN1
#define PCI_PRODUCT_NVIDIA_NFORCE3_LAN3 PCI_PRODUCT_NVIDIA_NFORCE2_400_LAN2
#define PCI_PRODUCT_NVIDIA_NFORCE3_LAN5 PCI_PRODUCT_NVIDIA_NFORCE3_250_LAN
#define PCI_PRODUCT_NVIDIA_CK804_LAN1 PCI_PRODUCT_NVIDIA_NFORCE4_LAN1
#define PCI_PRODUCT_NVIDIA_CK804_LAN2 PCI_PRODUCT_NVIDIA_NFORCE4_LAN2
#define PCI_PRODUCT_NVIDIA_MCP51_LAN1 PCI_PRODUCT_NVIDIA_NFORCE430_LAN1
#define PCI_PRODUCT_NVIDIA_MCP51_LAN2 PCI_PRODUCT_NVIDIA_NFORCE430_LAN2
#define NV_RID 0x10
#define TX_RING_SIZE 64
#define RX_RING_SIZE 64
#define NV_MAX_FRAGS 32 // match adapter.h:ADAPTER_WRITE_DATA.sElement[]
#define FCS_LEN 4
#define NVE_DEBUG 0x0000
#define NVE_DEBUG_INIT 0x0001
#define NVE_DEBUG_RUNNING 0x0002
#define NVE_DEBUG_DEINIT 0x0004
#define NVE_DEBUG_IOCTL 0x0008
#define NVE_DEBUG_INTERRUPT 0x0010
#define NVE_DEBUG_API 0x0020
#define NVE_DEBUG_LOCK 0x0040
#define NVE_DEBUG_BROKEN 0x0080
#define NVE_DEBUG_MII 0x0100
#define NVE_DEBUG_ALL 0xFFFF
#if NVE_DEBUG
#define DEBUGOUT(level, fmt, args...) if (NVE_DEBUG & level) \
printf(fmt, ## args)
#else
#define DEBUGOUT(level, fmt, args...)
#endif
typedef unsigned long ulong;
struct nve_map_buffer {
struct mbuf *mbuf; /* mbuf receiving packet */
bus_dmamap_t map; /* DMA map */
};
struct nve_dma_info {
bus_dma_tag_t tag;
struct nve_map_buffer buf;
u_int16_t buflength;
caddr_t vaddr; /* Virtual memory address */
bus_addr_t paddr; /* DMA physical address */
};
struct nve_rx_desc {
struct nve_rx_desc *next;
struct nve_map_buffer buf;
u_int16_t buflength;
caddr_t vaddr;
bus_addr_t paddr;
};
struct nve_tx_desc {
/* Don't add anything above this structure */
TX_INFO_ADAP TxInfoAdap;
struct nve_tx_desc *next;
struct nve_map_buffer buf;
u_int16_t buflength;
u_int32_t numfrags;
bus_dma_segment_t frags[NV_MAX_FRAGS];
};
struct nve_softc {
struct ifnet *ifp; /* interface info */
struct resource *res;
struct resource *irq;
ADAPTER_API *hwapi;
OS_API osapi;
device_t miibus;
device_t dev;
struct callout stat_callout;
int tx_timer;
void *sc_ih;
bus_space_tag_t sc_st;
bus_space_handle_t sc_sh;
bus_dma_tag_t mtag;
bus_dma_tag_t rtag;
bus_dmamap_t rmap;
bus_dma_tag_t ttag;
bus_dmamap_t tmap;
struct nve_rx_desc *rx_desc;
struct nve_tx_desc *tx_desc;
bus_addr_t rx_addr;
bus_addr_t tx_addr;
u_int16_t rx_ring_full;
u_int16_t tx_ring_full;
u_int32_t cur_rx;
u_int32_t cur_tx;
u_int32_t pending_rxs;
u_int32_t pending_txs;
struct mtx mtx;
/* Stuff for dealing with the NVIDIA OS API */
struct callout ostimer;
PTIMER_FUNC ostimer_func;
void *ostimer_params;
int linkup;
ulong tx_errors;
NV_UINT32 hwmode;
NV_UINT32 max_frame_size;
NV_UINT32 phyaddr;
NV_UINT32 media;
CMNDATA_OS_ADAPTER adapterdata;
unsigned char original_mac_addr[6];
};
struct nve_type {
u_int16_t vid_id;
u_int16_t dev_id;
char *name;
};
#define NVE_LOCK(_sc) mtx_lock(&(_sc)->mtx)
#define NVE_UNLOCK(_sc) mtx_unlock(&(_sc)->mtx)
#define NVE_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->mtx, MA_OWNED)
extern int ADAPTER_ReadPhy (PVOID pContext, ULONG ulPhyAddr, ULONG ulReg, ULONG *pulVal);
extern int ADAPTER_WritePhy (PVOID pContext, ULONG ulPhyAddr, ULONG ulReg, ULONG ulVal);
extern int ADAPTER_Init (PVOID pContext, USHORT usForcedSpeed, UCHAR ucForceDpx, UCHAR ucForceMode, UINT *puiLinkState);
#endif /* _IF_NVEREG_H_ */

1
sys/i386/conf/GENERIC
View file

@ -245,7 +245,6 @@ device lge # Level 1 LXT1001 gigabit Ethernet
device msk # Marvell/SysKonnect Yukon II Gigabit Ethernet
device nfe # nVidia nForce MCP on-board Ethernet
device nge # NatSemi DP83820 gigabit Ethernet
#device nve # nVidia nForce MCP on-board Ethernet Networking
device pcn # AMD Am79C97x PCI 10/100 (precedence over 'le')
device re # RealTek 8139C+/8169/8169S/8110S
device rl # RealTek 8129/8139

2
sys/i386/conf/NOTES
View file

@ -581,7 +581,6 @@ hint.mse.0.irq="5"
# mlxen: Mellanox ConnectX HCA Ethernet
# mthca: Mellanox HCA InfiniBand
# nfe: nVidia nForce MCP on-board Ethernet Networking (BSD open source)
# nve: nVidia nForce MCP on-board Ethernet Networking
# sbni: Granch SBNI12-xx ISA and PCI adapters
# vmx: VMware VMXNET3 Ethernet (BSD open source)
# wl: Lucent Wavelan (ISA card only).
@ -628,7 +627,6 @@ device mlx4ib # Mellanox ConnectX HCA InfiniBand
device mlxen # Mellanox ConnectX HCA Ethernet
device mthca # Mellanox HCA InfiniBand
device nfe # nVidia nForce MCP on-board Ethernet
device nve # nVidia nForce MCP on-board Ethernet Networking
device sbni
hint.sbni.0.at="isa"
hint.sbni.0.port="0x210"

1
sys/i386/conf/PAE
View file

@ -54,7 +54,6 @@ nodevice agp
nodevice txp
nodevice vx
nodevice nve
nodevice pcn
nodevice sf
nodevice sis

2
sys/i386/conf/XEN
View file

@ -7,7 +7,7 @@ cpu I686_CPU
ident XEN
makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols
makeoptions WITHOUT_MODULES="aha ahb amd ctl cxgb dpt drm drm2 hptnr hptmv ida malo mps mwl nve rdma sound sym trm xfs"
makeoptions WITHOUT_MODULES="aha ahb amd ctl cxgb dpt drm drm2 hptnr hptmv ida malo mps mwl rdma sound sym trm xfs"
options SCHED_ULE # ULE scheduler
options PREEMPTION # Enable kernel thread preemption

1
sys/mips/conf/OCTEON1
View file

@ -218,7 +218,6 @@ device jme # JMicron JMC250 Gigabit/JMC260 Fast Ethernet
device lge # Level 1 LXT1001 gigabit Ethernet
device msk # Marvell/SysKonnect Yukon II Gigabit Ethernet
device nge # NatSemi DP83820 gigabit Ethernet
#device nve # nVidia nForce MCP on-board Ethernet Networking
device pcn # AMD Am79C97x PCI 10/100 (precedence over 'le')
device re # RealTek 8139C+/8169/8169S/8110S
device rl # RealTek 8129/8139

7
sys/modules/Makefile
View file

@ -251,7 +251,6 @@ SUBDIR= \
nullfs \
${_ntb} \
${_nvd} \
${_nve} \
${_nvme} \
${_nvram} \
${_nxge} \
@ -609,9 +608,6 @@ _ixgbe= ixgbe
_mly= mly
_nfe= nfe
_nvd= nvd
.if ${MK_SOURCELESS_HOST} != "no"
_nve= nve
.endif
_nvme= nvme
_nvram= nvram
_nxge= nxge
@ -730,9 +726,6 @@ _ndis= ndis
_nfe= nfe
_ntb= ntb
_nvd= nvd
.if ${MK_SOURCELESS_HOST} != "no"
_nve= nve
.endif
_nvme= nvme
_nvram= nvram
_nxge= nxge

20
sys/modules/nve/Makefile
View file

@ -1,20 +0,0 @@
# $FreeBSD$
.PATH: ${.CURDIR}/../../dev/nve
KMOD= if_nve
SRCS= if_nve.c if_nvereg.h miidevs.h \
device_if.h bus_if.h pci_if.h miibus_if.h \
os+%DIKED-nve.h
OBJS+= nvenetlib.o
WERROR=
CLEANFILES+= nvenetlib.o os+%DIKED-nve.h
nvenetlib.o: ${.CURDIR}/../../contrib/dev/nve/${MACHINE}/${.TARGET}.bz2.uu
uudecode < ${.CURDIR}/../../contrib/dev/nve/${MACHINE}/${.TARGET}.bz2.uu
bzip2 -df ${.TARGET}.bz2
os+%DIKED-nve.h: ${.CURDIR}/../../contrib/dev/nve/os.h
sed -e 's/^.*#include.*phy\.h.*$$//' ${.OODATE} > ${.TARGET}
.include <bsd.kmod.mk>