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specialreg.h: add AMD-specific "Hardware Configuration Register" MSR
It seems that this MSR has been available in a range of AMD processors families for quite a while now. Note1: not all AMD MSRs that are found in amd64 specialreg.h are also in the i386 version. Note2: perhaps some additional name component is needed to distinguish AMD-specific MSRs. MFC after: 5 days
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svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=215523
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@ -504,6 +504,7 @@
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#define MSR_PERFCTR2 0xc0010006
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#define MSR_PERFCTR3 0xc0010007
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#define MSR_SYSCFG 0xc0010010
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#define MSR_HWCR 0xc0010015
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#define MSR_IORRBASE0 0xc0010016
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#define MSR_IORRMASK0 0xc0010017
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#define MSR_IORRBASE1 0xc0010018
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@ -672,7 +672,7 @@ initializecpu(void)
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(cpu_id & ~0xf) == 0x670 ||
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(cpu_id & ~0xf) == 0x680)) {
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u_int regs[4];
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wrmsr(0xC0010015, rdmsr(0xC0010015) & ~0x08000);
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wrmsr(MSR_HWCR, rdmsr(MSR_HWCR) & ~0x08000);
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do_cpuid(1, regs);
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cpu_feature = regs[3];
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}
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@ -554,7 +554,8 @@
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#define AMD_WT_ALLOC_FRE 0x10000 /* fixed (A0000-FFFFF) range enable */
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/* AMD64 MSR's */
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#define MSR_EFER 0xc0000080 /* extended features */
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#define MSR_EFER 0xc0000080 /* extended features */
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#define MSR_HWCR 0xc0010015
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#define MSR_K8_UCODE_UPDATE 0xc0010020 /* update microcode */
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#define MSR_MC0_CTL_MASK 0xc0010044
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