Replace use of "0" constraints in inline asm with "+" constraints,

when an operand is used both for input and output.

Reviewed by:	jhb
This commit is contained in:
Giorgos Keramidas 2001-11-13 19:55:20 +00:00
parent 3e7b2f7461
commit 6ba3aeb390
Notes: svn2git 2020-12-20 02:59:44 +00:00
svn path=/head/; revision=86332

View file

@ -66,13 +66,13 @@
* which registers contain sum & w.
*/
#define ADD(n) __asm __volatile \
("addl " #n "(%2), %0" : "=r" (sum) : "0" (sum), "r" (w))
("addl " #n "(%1), %0" : "+r" (sum) : "r" (w))
#define ADDC(n) __asm __volatile \
("adcl " #n "(%2), %0" : "=r" (sum) : "0" (sum), "r" (w))
("adcl " #n "(%1), %0" : "+r" (sum) : "r" (w))
#define LOAD(n) __asm __volatile \
("movb " #n "(%1), %0" : "=r" (junk) : "r" (w))
("movb " #n "(%1), %0" : "=r" (junk) : "r" (w))
#define MOP __asm __volatile \
("adcl $0, %0" : "=r" (sum) : "0" (sum))
("adcl $0, %0" : "+r" (sum))
u_short
in_cksum_skip(m, len, skip)