Convert remaining hwpmc(4) debug printfs over to KTR to unbreak the build

for at least powerpc kernels.   Missed in r282658.

MFC after:	10 days
This commit is contained in:
Bjoern A. Zeeb 2015-05-09 09:21:59 +00:00
parent 8b651535df
commit 62699f3424
Notes: svn2git 2020-12-20 02:59:44 +00:00
svn path=/head/; revision=282676
3 changed files with 13 additions and 13 deletions

View file

@ -201,7 +201,7 @@ armv7_allocate_pmc(int cpu, int ri, struct pmc *pm,
pm->pm_md.pm_armv7.pm_armv7_evsel = config;
PMCDBG(MDP,ALL,2,"armv7-allocate ri=%d -> config=0x%x", ri, config);
PMCDBG2(MDP,ALL,2,"armv7-allocate ri=%d -> config=0x%x", ri, config);
return 0;
}
@ -225,7 +225,7 @@ armv7_read_pmc(int cpu, int ri, pmc_value_t *v)
else
tmp = armv7_pmcn_read(ri);
PMCDBG(MDP,REA,2,"armv7-read id=%d -> %jd", ri, tmp);
PMCDBG2(MDP,REA,2,"armv7-read id=%d -> %jd", ri, tmp);
if (PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm)))
*v = ARMV7_PERFCTR_VALUE_TO_RELOAD_COUNT(tmp);
else
@ -249,7 +249,7 @@ armv7_write_pmc(int cpu, int ri, pmc_value_t v)
if (PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm)))
v = ARMV7_RELOAD_COUNT_TO_PERFCTR_VALUE(v);
PMCDBG(MDP,WRI,1,"armv7-write cpu=%d ri=%d v=%jx", cpu, ri, v);
PMCDBG3(MDP,WRI,1,"armv7-write cpu=%d ri=%d v=%jx", cpu, ri, v);
if (pm->pm_md.pm_armv7.pm_armv7_evsel == 0xFF)
cp15_pmccntr_set(v);
@ -264,7 +264,7 @@ armv7_config_pmc(int cpu, int ri, struct pmc *pm)
{
struct pmc_hw *phw;
PMCDBG(MDP,CFG,1, "cpu=%d ri=%d pm=%p", cpu, ri, pm);
PMCDBG3(MDP,CFG,1, "cpu=%d ri=%d pm=%p", cpu, ri, pm);
KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
("[armv7,%d] illegal CPU value %d", __LINE__, cpu));
@ -462,7 +462,7 @@ armv7_pcpu_init(struct pmc_mdep *md, int cpu)
KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
("[armv7,%d] wrong cpu number %d", __LINE__, cpu));
PMCDBG(MDP,INI,1,"armv7-init cpu=%d", cpu);
PMCDBG1(MDP,INI,1,"armv7-init cpu=%d", cpu);
armv7_pcpu[cpu] = pac = malloc(sizeof(struct armv7_cpu), M_PMC,
M_WAITOK|M_ZERO);
@ -516,7 +516,7 @@ pmc_armv7_initialize()
armv7_npmcs = (reg >> ARMV7_PMNC_N_SHIFT) & \
ARMV7_PMNC_N_MASK;
PMCDBG(MDP,INI,1,"armv7-init npmcs=%d", armv7_npmcs);
PMCDBG1(MDP,INI,1,"armv7-init npmcs=%d", armv7_npmcs);
/*
* Allocate space for pointers to PMC HW descriptors and for

View file

@ -304,7 +304,7 @@ e500_read_pmc(int cpu, int ri, pmc_value_t *v)
ri));
tmp = e500_pmcn_read(ri);
PMCDBG(MDP,REA,2,"ppc-read id=%d -> %jd", ri, tmp);
PMCDBG2(MDP,REA,2,"ppc-read id=%d -> %jd", ri, tmp);
if (PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm)))
*v = POWERPC_PERFCTR_VALUE_TO_RELOAD_COUNT(tmp);
else
@ -328,7 +328,7 @@ e500_write_pmc(int cpu, int ri, pmc_value_t v)
if (PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm)))
v = POWERPC_RELOAD_COUNT_TO_PERFCTR_VALUE(v);
PMCDBG(MDP,WRI,1,"powerpc-write cpu=%d ri=%d v=%jx", cpu, ri, v);
PMCDBG3(MDP,WRI,1,"powerpc-write cpu=%d ri=%d v=%jx", cpu, ri, v);
e500_pmcn_write(ri, v);
@ -340,7 +340,7 @@ e500_config_pmc(int cpu, int ri, struct pmc *pm)
{
struct pmc_hw *phw;
PMCDBG(MDP,CFG,1, "cpu=%d ri=%d pm=%p", cpu, ri, pm);
PMCDBG3(MDP,CFG,1, "cpu=%d ri=%d pm=%p", cpu, ri, pm);
KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
("[powerpc,%d] illegal CPU value %d", __LINE__, cpu));
@ -443,7 +443,7 @@ e500_pcpu_init(struct pmc_mdep *md, int cpu)
KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
("[powerpc,%d] wrong cpu number %d", __LINE__, cpu));
PMCDBG(MDP,INI,1,"powerpc-init cpu=%d", cpu);
PMCDBG1(MDP,INI,1,"powerpc-init cpu=%d", cpu);
/* Freeze all counters. */
mtpmr(PMR_PMGC0, PMGC_FAC | PMGC_PMIE | PMGC_FCECE);
@ -543,7 +543,7 @@ e500_allocate_pmc(int cpu, int ri, struct pmc *pm,
pm->pm_md.pm_powerpc.pm_powerpc_evsel = config;
PMCDBG(MDP,ALL,2,"powerpc-allocate ri=%d -> config=0x%x", ri, config);
PMCDBG2(MDP,ALL,2,"powerpc-allocate ri=%d -> config=0x%x", ri, config);
return 0;
}
@ -576,7 +576,7 @@ e500_intr(int cpu, struct trapframe *tf)
KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
("[powerpc,%d] out of range CPU %d", __LINE__, cpu));
PMCDBG(MDP,INT,1, "cpu=%d tf=%p um=%d", cpu, (void *) tf,
PMCDBG3(MDP,INT,1, "cpu=%d tf=%p um=%d", cpu, (void *) tf,
TRAPF_USERMODE(tf));
retval = 0;

View file

@ -255,7 +255,7 @@ mips_get_perfctl(int cpu, int ri, uint32_t event, uint32_t caps)
if (caps & PMC_CAP_INTERRUPT)
config |= MIPS74K_PMC_INTERRUPT_ENABLE;
PMCDBG(MDP,ALL,2,"mips74k-get_perfctl ri=%d -> config=0x%x", ri, config);
PMCDBG2(MDP,ALL,2,"mips74k-get_perfctl ri=%d -> config=0x%x", ri, config);
return (config);
}