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x86: Adjust base addr for PCI MCFG regions

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Each bus gets 1 MB of address space; the actual base address for an
MCFG bus range is the address from the table plus the starting bus
number times 1 MB.

The PCI spec is unclear on this point, but this change matches what
Linux does, which is likely enough of a de facto standard regardless
of what any de jure standard might attempt to say.

Fixes:	f54a3890b1 ("x86: Support multiple PCI MCFG regions")
Reviewed by:	jhb
Differential Revision:	https://reviews.freebsd.org/D43206
This commit is contained in:
Colin Percival 2023-12-27 00:09:08 -08:00
parent b46c7b1ed4
commit 61e2161367
2 changed files with 2 additions and 2 deletions
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2
sys/amd64/pci/pci_cfgreg.c
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@ -296,7 +296,7 @@ pcie_cfgregopen(uint64_t base, uint16_t domain, uint8_t minbus, uint8_t maxbus)
region = &mcfg_regions[mcfg_numregions];
/* XXX: We should make sure this really fits into the direct map. */
region->base = pmap_mapdev_pciecfg(base, (maxbus + 1 - minbus) << 20);
region->base = pmap_mapdev_pciecfg(base + (minbus << 20), (maxbus + 1 - minbus) << 20);
region->domain = domain;
region->minbus = minbus;
region->maxbus = maxbus;

2
sys/i386/pci/pci_cfgreg.c
View file

@ -574,7 +574,7 @@ pcie_cfgregopen(uint64_t base, uint16_t domain, uint8_t minbus, uint8_t maxbus)
sizeof(*mcfg_regions) * (mcfg_numregions + 1), M_DEVBUF, M_WAITOK);
region = &mcfg_regions[mcfg_numregions];
region->base = base;
region->base = base + (minbus << 20);
region->domain = domain;
region->minbus = minbus;
region->maxbus = maxbus;