mirror of
https://github.com/freebsd/freebsd-src
synced 2024-09-20 16:54:02 +00:00
Update to version stable-165
Submitted by: Ustimenko Semen <semen@iclub.nsu.ru>
This commit is contained in:
Jordan K. Hubbard
parent
b2369a0441
commit
5f408f2bf2
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=32869
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@ -23,7 +23,7 @@
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* version: stable-163
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* version: stable-165
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*
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*/
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@ -55,6 +55,12 @@
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*
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* stable-163:
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* added media control code
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*
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* stable-164:
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* fixed some bugs
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*
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* stable-165:
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* fixed media control code
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*/
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#include <sys/param.h>
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@ -65,7 +71,11 @@
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#include <sys/errno.h>
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#include <sys/malloc.h>
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#include <sys/kernel.h>
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#include <sys/ioctl.h> /* makes problem in FreeBSD 3.x */
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#if defined(__FreeBSD__) && __FreeBSD__ >= 3
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#include <sys/sockio.h>
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#else
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#include <sys/ioctl.h>
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#endif
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#include <machine/clock.h>
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#include <net/if.h>
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#include <net/if_dl.h>
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@ -117,8 +127,6 @@ epic_ifioctl(register struct ifnet * ifp, int command, caddr_t data){
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epic_softc_t *sc = ifp->if_softc;
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struct ifreq *ifr = (struct ifreq *) data;
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int x, error = 0;
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u_int32_t media=0;
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u_int32_t rxcon=0;
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x = splimp();
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@ -144,79 +152,33 @@ epic_ifioctl(register struct ifnet * ifp, int command, caddr_t data){
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}
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}
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/* Set broadcast mode */
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if( ifp->if_flags & IFF_BROADCAST )
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rxcon |= RXCON_RECEIVE_BROADCAST_FRAMES;
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else
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rxcon &= ~RXCON_RECEIVE_BROADCAST_FRAMES;
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/* Update RXCON register */
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epic_set_rx_mode( sc );
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/* Set media */
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if( ifp->if_flags & IFF_NOAUTONEG ){
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if( ifp->if_flags & IFF_100MB ) media |= 0x2000;
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else media &= ~0x2000;
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if( ifp->if_flags & IFF_FULLDUPLEX )
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media |= 0x0100;
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else
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media &= ~0x0100;
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} else {
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media |= 0x1200; /* Set and restart autoneg */
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}
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#if NBPFILTER > 0
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/* Set promisc mode */
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if( ifp->if_flags & IFF_PROMISC )
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sc->rxcon |= RXCON_PROMISCUOUS_MODE;
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else
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sc->rxcon &= ~RXCON_PROMISCUOUS_MODE;
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#endif
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/*
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* Update hardware if media changed
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*/
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if( sc->media != media ){
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if( media & 0x1000 ){
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printf("tx%d: autonegotiation started\n",sc->unit);
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epic_write_phy_register( sc->iobase, 0, (sc->media=media) );
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ifp->if_timer=3;
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sc->pending_txs++;
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} else {
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epic_write_phy_register( sc->iobase, 0, (sc->media=media) );
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epic_update_if_media_flags(sc);
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printf("tx%d: %dMbps %s\n",sc->unit,
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(ifp->if_flags&IFF_100MB)?100:10,
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(ifp->if_flags&IFF_FULLDUPLEX)?"full-duplex":"half-duplex" );
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}
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}
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if( sc->rxcon != rxcon )
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outl( sc->iobase + RXCON, (sc->rxcon = rxcon) );
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/* Update SPEED */
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epic_set_media_speed( sc );
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break;
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#if 0 /* XXXXXXXX: no multicast filtering */
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case SIOCADDMULTI:
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case SIOCDELMULTI:
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/*
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* Update out multicast list.
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*/
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/* Update out multicast list */
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#if defined(__FreeBSD__) && __FreeBSD__ >= 3
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epic_set_mc_table(sc);
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error = 0;
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#else
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error = (command == SIOCADDMULTI) ?
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ether_addmulti(ifr, &sc->arpcom) :
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ether_delmulti(ifr, &sc->arpcom);
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ether_addmulti(ifr, &sc->epic_ac) :
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ether_delmulti(ifr, &sc->epic_ac);
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if (error == ENETRESET) {
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/*
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* Multicast list has changed; set the hardware filter
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* accordingly.
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*/
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ed_setrcr(sc);
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epic_set_mc_table(sc);
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error = 0;
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}
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break;
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#endif
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break;
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case SIOCSIFMTU:
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/*
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@ -238,7 +200,7 @@ epic_ifioctl(register struct ifnet * ifp, int command, caddr_t data){
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}
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/*
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* IFSTART function
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* Ifstart function
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*/
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static void
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epic_ifstart(struct ifnet * const ifp){
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@ -283,10 +245,6 @@ epic_ifstart(struct ifnet * const ifp){
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sc->pending_txs++;
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}
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#if defined(EPIC_DEBUG)
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printf("tx%d: txring overflowed\n",sc->unit);
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#endif
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sc->epic_if.if_flags |= IFF_OACTIVE;
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return;
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@ -305,30 +263,16 @@ epic_ifwatchdog(
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int i;
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x = splimp();
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if( sc->media & 0x0200 ){
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i=epic_read_phy_register( sc->iobase, 0 );
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if( i & 0x0200 ) {
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printf("tx%d: autoneg failed\n",sc->unit);
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sc->media=0xFFFFFFFF;
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} else {
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epic_update_if_media_flags(sc);
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printf("tx%d: autonegotiated: %dMbps %s\n",sc->unit,
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(ifp->if_flags&IFF_100MB)?100:10,
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(ifp->if_flags&IFF_FULLDUPLEX)?"full-duplex":"half-duplex" );
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}
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sc->pending_txs--;
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sc->media &= ~0x0200;
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} else {
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printf("tx%d: device timeout %d packets\n",
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sc->unit,sc->pending_txs);
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ifp->if_oerrors+=sc->pending_txs;
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printf("tx%d: device timeout %d packets\n",
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sc->unit,sc->pending_txs);
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epic_stop(sc);
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epic_init(sc);
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ifp->if_oerrors+=sc->pending_txs;
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epic_ifstart(&sc->epic_if);
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}
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epic_stop(sc);
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epic_init(sc);
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epic_ifstart(&sc->epic_if);
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splx(x);
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}
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@ -348,16 +292,31 @@ epic_intr_normal(
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status = inl(iobase + INTSTAT);
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/* Acknowledge all of the current interrupt sources ASAP. */
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outl( iobase + INTSTAT, status & 0x00007fff);
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outl( iobase + INTSTAT, status & 0x0000ffff);
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if( status & (INTSTAT_RQE|INTSTAT_RCC|INTSTAT_OVW) )
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if( status & (INTSTAT_RQE|INTSTAT_HCC|INTSTAT_RCC|INTSTAT_OVW) )
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epic_rx_done( sc );
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if( status & (INTSTAT_TQE|INTSTAT_TCC|INTSTAT_TXU) )
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if( status & (INTSTAT_TXC|INTSTAT_TQE|INTSTAT_TCC|INTSTAT_TXU) )
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epic_tx_done( sc );
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/*
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* UPDATE statistics
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*/
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/*
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if( status & INTSTAT_GP2 ){
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printf("tx%d: GP2 int occured\n",sc->unit);
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epic_read_phy_register(sc->iobase,DP83840_BMSR);
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epic_read_phy_register(sc->iobase,DP83840_BMCR);
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}
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*/
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if( status & (INTSTAT_FATAL|INTSTAT_PMA|INTSTAT_PTA|INTSTAT_APE|INTSTAT_DPE) ){
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printf("tx%d: PCI fatal error occured (%s%s%s%s)",
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sc->unit,
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(status&INTSTAT_PMA)?"PMA":"",
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(status&INTSTAT_PTA)?" PTA":"",
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(status&INTSTAT_APE)?" APE":"",
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(status&INTSTAT_DPE)?" DPE":"");
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}
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/* UPDATE statistics */
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if (status & (INTSTAT_CNT | INTSTAT_TXU | INTSTAT_OVW | INTSTAT_RXE)) {
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/*
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* update dot3 Rx statistics
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@ -366,19 +325,16 @@ epic_intr_normal(
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sc->dot3stats.dot3StatsFrameTooLongs += inb(iobase + ALICNT);
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sc->dot3stats.dot3StatsFCSErrors += inb(iobase + CRCCNT);
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/*
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* update if Rx statistics
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*/
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/* Update if Rx statistics */
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if (status & (INTSTAT_OVW | INTSTAT_RXE))
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sc->epic_if.if_ierrors++;
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/* Tx FIFO underflow. */
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if (status & INTSTAT_TXU) {
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/* Inc. counters */
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sc->dot3stats.dot3StatsInternalMacTransmitErrors++;
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sc->epic_if.if_oerrors++;
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#if defined(EPIC_DEBUG)
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printf("tx%d: restart transmit\n",sc->unit);
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#endif
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/* Restart the transmit process. */
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outl(iobase + COMMAND, COMMAND_TXUGO);
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}
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@ -388,15 +344,11 @@ epic_intr_normal(
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}
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/* If no packets are pending, thus no timeouts */
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if( sc->pending_txs == 0 ){
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if( sc->pending_txs == 0 )
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sc->epic_if.if_timer = 0;
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if( sc->cur_tx != sc->dirty_tx ){
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printf("tx%d: algorithm error1\n",sc->unit);
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}
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}
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/* We should clear all interrupt sources. */
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outl(iobase + INTSTAT, 0x0001ffff );
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outl(iobase + INTSTAT, 0xffffffff );
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return;
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}
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@ -485,23 +437,18 @@ epic_rx_done(
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#if NBPFILTER > 0
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if( sc->epic_if.if_bpf ) bpf_mtap( &sc->epic_if, m );
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#if 0
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/* Accept only our packets */
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/* Accept only our packets, broadcasts and multicasts */
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if( (eh->ether_dhost[0] & 1) == 0 &&
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bcmp(eh->ether_dhost,sc->epic_ac.ac_enaddr,ETHER_ADDR_LEN)){
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m_freem(m);
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goto rxerror;
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}
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#endif
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#endif
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m->m_pkthdr.len = len - sizeof(struct ether_header);
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m->m_len = len - sizeof( struct ether_header );
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m->m_data += sizeof( struct ether_header );
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#if defined(EPIC_DEBUG)
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printf("tx%d: received %d bytes\n",sc->unit,len);
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#endif
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ether_input(&sc->epic_if, eh, m);
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sc->epic_if.if_ipackets++;
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@ -537,9 +484,6 @@ epic_tx_done( epic_softc_t *sc ){
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break; /* following packets are not Txed yet */
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if( stt == 0 ){
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if( sc->pending_txs != 0 ||
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sc->dirty_tx != sc->cur_tx )
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printf("tx%d: algoritm error\n",sc->unit);
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if_flags = ~IFF_OACTIVE;
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break;
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}
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|
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@ -625,13 +569,13 @@ epic_pci_probe(
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pcici_t config_id,
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pcidi_t device_id)
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{
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if (PCI_VENDORID(device_id) != SMC_VENDORID)
|
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if( PCI_VENDORID(device_id) != SMC_VENDORID )
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return NULL;
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|
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if( PCI_CHIPID(device_id) == CHIPID_83C170 )
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return "SMC 83c170";
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return NULL;
|
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|
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if (PCI_CHIPID(device_id) == CHIPID_83C170)
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return "SMC 83c170";
|
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return NULL;
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}
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/*
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|
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@ -646,6 +590,7 @@ epic_pci_attach(
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epic_softc_t *sc;
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u_int32_t iobase;
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u_int32_t irq;
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u_int32_t phyid;
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int i;
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int s;
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int phy, phy_idx;
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|
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@ -682,41 +627,33 @@ epic_pci_attach(
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/* Magic?! If we don't set this bit the MII interface won't work. */
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outl( iobase + TEST1, 0x0008 );
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|
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/* Read mac address */
|
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/* Read mac address (may be better is read from EEPROM?) */
|
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for (i = 0; i < ETHER_ADDR_LEN / sizeof( u_int16_t); i++)
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((u_int16_t *)sc->epic_macaddr)[i] = inw(iobase + LAN0 + i*4);
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|
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printf("tx%d:",sc->unit);
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printf(" address %02x:%02x:%02x:%02x:%02x:%02x,",sc->epic_macaddr[0],sc->epic_macaddr[1],sc->epic_macaddr[2],sc->epic_macaddr[3],sc->epic_macaddr[4],sc->epic_macaddr[5]);
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printf(" type SMC9432TX [");
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i = epic_read_phy_register(iobase,0);
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if( i & 0x1000 ) printf("Auto-Neg.");
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if( i & 0x2000 ) printf(" 100 Mb/s");
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else printf(" 10 Mb/s");
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if( i & 0x100 ) printf(" Full-duplex");
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else printf(" Half-duplex");
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printf("]\n");
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/* Display some info */
|
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printf("tx%d: address %02x:%02x:%02x:%02x:%02x:%02x,",sc->unit,
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sc->epic_macaddr[0],sc->epic_macaddr[1],sc->epic_macaddr[2],
|
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sc->epic_macaddr[3],sc->epic_macaddr[4],sc->epic_macaddr[5]);
|
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|
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/*
|
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* Map interrupt
|
||||
*/
|
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if (!pci_map_int(config_id, epic_intr_normal, (void*) sc, &net_imask)) {
|
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|
||||
s = splimp();
|
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|
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/* Map interrupt */
|
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if( !pci_map_int(config_id, epic_intr_normal, (void*)sc, &net_imask) ) {
|
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printf("tx%d: couldn't map interrupt\n",unit);
|
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epics[ unit ] = NULL;
|
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free(sc, M_DEVBUF);
|
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return;
|
||||
}
|
||||
|
||||
/*
|
||||
* Fill ifnet structure
|
||||
*/
|
||||
s = splimp();
|
||||
|
||||
/* Fill ifnet structure */
|
||||
ifp = &sc->epic_if;
|
||||
|
||||
ifp->if_unit = unit;
|
||||
ifp->if_name = "tx";
|
||||
ifp->if_softc = sc;
|
||||
ifp->if_flags = IFF_BROADCAST|IFF_SIMPLEX; /*IFF_MULTICAST*/
|
||||
ifp->if_flags = IFF_BROADCAST|IFF_SIMPLEX|IFF_MULTICAST|IFF_ALLMULTI;
|
||||
ifp->if_ioctl = epic_ifioctl;
|
||||
ifp->if_start = epic_ifstart;
|
||||
ifp->if_watchdog = epic_ifwatchdog;
|
||||
|
|
@ -732,6 +669,55 @@ epic_pci_attach(
|
|||
|
||||
sc->dot3stats.dot3Compliance = DOT3COMPLIANCE_COLLS;
|
||||
|
||||
printf(" type SMC9432TX");
|
||||
|
||||
i = epic_read_phy_register(iobase, DP83840_BMCR);
|
||||
|
||||
if( i & BMCR_AUTONEGOTIATION ){
|
||||
printf(" [Auto-Neg.");
|
||||
|
||||
if( i & BMCR_100MBPS ) printf(" 100Mbps");
|
||||
else printf(" 10Mbps");
|
||||
|
||||
if( i & BMCR_FULL_DUPLEX ) printf(" FD");
|
||||
|
||||
printf("]\n");
|
||||
|
||||
if( i & BMCR_FULL_DUPLEX )
|
||||
printf("tx%d: WARNING! FD autonegotiated, not supported\n",sc->unit);
|
||||
|
||||
} else {
|
||||
ifp->if_flags |= IFF_LINK0;
|
||||
if( i & BMCR_100MBPS ) {
|
||||
printf(" [100Mbps");
|
||||
ifp->if_flags |= IFF_LINK2;
|
||||
} else printf(" [10Mbps");
|
||||
|
||||
if( i & BMCR_FULL_DUPLEX ) {
|
||||
printf(" FD");
|
||||
ifp->if_flags |= IFF_LINK1;
|
||||
}
|
||||
printf("]\n");
|
||||
}
|
||||
#if defined(EPIC_DEBUG)
|
||||
printf("tx%d: PHY id: (",sc->unit);
|
||||
i=epic_read_phy_register(iobase,DP83840_PHYIDR1);
|
||||
printf("%04x:",i);
|
||||
phyid=i<<6;
|
||||
i=epic_read_phy_register(iobase,DP83840_PHYIDR2);
|
||||
printf("%04x)",i);
|
||||
phyid|=((i>>10)&0x3F);
|
||||
printf(" %08x, rev %x, mod %x\n",phyid,(i)&0xF, (i>>4)&0x3f);
|
||||
#endif
|
||||
|
||||
epic_read_phy_register(iobase,DP83840_BMSR);
|
||||
epic_read_phy_register(iobase,DP83840_BMSR);
|
||||
epic_read_phy_register(iobase,DP83840_BMSR);
|
||||
i=epic_read_phy_register(iobase,DP83840_BMSR);
|
||||
|
||||
if( !(i & BMSR_LINK_STATUS) )
|
||||
printf("tx%d: WARNING! no link estabilished/n",sc->unit);
|
||||
|
||||
/*
|
||||
* Attach to if manager
|
||||
*/
|
||||
|
|
@ -773,40 +759,34 @@ epic_init(
|
|||
/* Initialize rings or reinitialize */
|
||||
epic_init_rings( sc );
|
||||
|
||||
epic_update_if_media_flags( sc );
|
||||
|
||||
/* Put node address to EPIC */
|
||||
outl( iobase + LAN0 + 0x0, ((u_int16_t *)sc->epic_macaddr)[0] );
|
||||
outl( iobase + LAN0 + 0x4, ((u_int16_t *)sc->epic_macaddr)[1] );
|
||||
outl( iobase + LAN0 + 0x8, ((u_int16_t *)sc->epic_macaddr)[2] );
|
||||
|
||||
/* Enable interrupts, set for PCI read multiple and etc */
|
||||
sc->genctl = GENCTL_ENABLE_INTERRUPT | GENCTL_MEMORY_READ_MULTIPLE | \
|
||||
GENCTL_ONECOPY | GENCTL_RECEIVE_FIFO_THRESHOLD128;
|
||||
|
||||
outl( iobase + GENCTL, sc->genctl );
|
||||
outl( iobase + GENCTL,
|
||||
GENCTL_ENABLE_INTERRUPT | GENCTL_MEMORY_READ_MULTIPLE |
|
||||
GENCTL_ONECOPY | GENCTL_RECEIVE_FIFO_THRESHOLD128 );
|
||||
|
||||
/* Set transmit threshold */
|
||||
outl( iobase + ETXTHR, 0x40 );
|
||||
|
||||
/* Compute rx mode. */
|
||||
if( sc->epic_if.if_flags & IFF_BROADCAST )
|
||||
sc->rxcon |= RXCON_RECEIVE_BROADCAST_FRAMES;
|
||||
else
|
||||
sc->rxcon &= ~RXCON_RECEIVE_BROADCAST_FRAMES;
|
||||
/* Compute and set RXCON. */
|
||||
epic_set_rx_mode( sc );
|
||||
|
||||
if( sc->epic_if.if_flags & IFF_PROMISC )
|
||||
sc->rxcon |= RXCON_PROMISCUOUS_MODE;
|
||||
else
|
||||
sc->rxcon &= ~RXCON_PROMISCUOUS_MODE;
|
||||
/* Set MII speed mode */
|
||||
epic_set_media_speed( sc );
|
||||
|
||||
/* Set rx and tx modes */
|
||||
outl( iobase + RXCON, sc->rxcon );
|
||||
outl( iobase + TXCON, sc->txcon );
|
||||
/* Set multicast table */
|
||||
epic_set_mc_table( sc );
|
||||
|
||||
/* Enable interrupts by setting the interrupt mask. */
|
||||
outl( iobase + INTMASK, INTSTAT_CNT | INTSTAT_TXU | INTSTAT_TCC |
|
||||
INTSTAT_RXE | INTSTAT_OVW | INTSTAT_RQE | INTSTAT_RCC );
|
||||
outl( iobase + INTMASK,
|
||||
INTSTAT_RCC | INTSTAT_RQE | INTSTAT_OVW | INTSTAT_RXE |
|
||||
INTSTAT_TXC | INTSTAT_TCC | INTSTAT_TQE | INTSTAT_TXU |
|
||||
INTSTAT_CNT | /*INTSTAT_GP2 |*/ INTSTAT_FATAL |
|
||||
INTSTAT_PTA | INTSTAT_PMA | INTSTAT_APE | INTSTAT_DPE );
|
||||
|
||||
/* Start rx process */
|
||||
outl( iobase + COMMAND, COMMAND_RXQUEUED | COMMAND_START_RX );
|
||||
|
|
@ -818,58 +798,134 @@ epic_init(
|
|||
/* ... and free */
|
||||
ifp->if_flags &= ~IFF_OACTIVE;
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
/*
|
||||
* This function should set EPIC's registers according IFF_* flags
|
||||
*/
|
||||
static void
|
||||
epic_set_rx_mode(
|
||||
epic_softc_t * sc)
|
||||
{
|
||||
struct ifnet *ifp = &sc->epic_if;
|
||||
u_int16_t rxcon = 0;
|
||||
|
||||
#if NBPFILTER > 0
|
||||
if( sc->epic_if.if_flags & IFF_PROMISC )
|
||||
rxcon |= RXCON_PROMISCUOUS_MODE;
|
||||
#endif
|
||||
|
||||
if( sc->epic_if.if_flags & IFF_BROADCAST )
|
||||
rxcon |= RXCON_RECEIVE_BROADCAST_FRAMES;
|
||||
|
||||
if( sc->epic_if.if_flags & IFF_MULTICAST )
|
||||
rxcon |= RXCON_RECEIVE_MULTICAST_FRAMES;
|
||||
|
||||
outl( sc->iobase + RXCON, rxcon );
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
/*
|
||||
* This function should set MII to mode specified by IFF_LINK* flags
|
||||
*/
|
||||
static void
|
||||
epic_set_media_speed(
|
||||
epic_softc_t * sc)
|
||||
{
|
||||
struct ifnet *ifp = &sc->epic_if;
|
||||
u_int16_t media;
|
||||
u_int32_t i;
|
||||
|
||||
/* Set media speed */
|
||||
if( ifp->if_flags & IFF_LINK0 ){
|
||||
/* Allow only manual fullduplex modes */
|
||||
media = epic_read_phy_register( sc->iobase, DP83840_ANAR );
|
||||
media |= ANAR_100|ANAR_10|ANAR_100_FD|ANAR_10_FD;
|
||||
epic_write_phy_register( sc->iobase, DP83840_ANAR, media );
|
||||
|
||||
/* Set mode */
|
||||
media = (ifp->if_flags&IFF_LINK2)?BMCR_100MBPS:0;
|
||||
media |= (ifp->if_flags&IFF_LINK1)?BMCR_FULL_DUPLEX:0;
|
||||
epic_write_phy_register( sc->iobase, DP83840_BMCR, media );
|
||||
|
||||
ifp->if_baudrate =
|
||||
(ifp->if_flags&IFF_LINK2)?100000000:10000000;
|
||||
|
||||
outl( sc->iobase + TXCON,(ifp->if_flags&IFF_LINK1)?TXCON_LOOPBACK_MODE_FULL_DUPLEX|TXCON_DEFAULT:TXCON_DEFAULT );
|
||||
|
||||
#if defined(EPIC_DEBUG)
|
||||
printf("tx%d: %dMbps %s\n",sc->unit,
|
||||
(ifp->if_flags&IFF_LINK2)?100:10,
|
||||
(ifp->if_flags&IFF_LINK1)?"full-duplex":"half-duplex" );
|
||||
#endif
|
||||
} else {
|
||||
/* If autoneg is set, IFF_LINK flags are meaningless */
|
||||
ifp->if_flags &= ~(IFF_LINK0|IFF_LINK1|IFF_LINK2);
|
||||
ifp->if_baudrate = 100000000;
|
||||
|
||||
outl( sc->iobase + TXCON, TXCON_DEFAULT );
|
||||
|
||||
/* Does not allow to autoneg fullduplex modes */
|
||||
media = epic_read_phy_register( sc->iobase, DP83840_ANAR );
|
||||
media &= ~(ANAR_100|ANAR_100_FD|ANAR_10_FD|ANAR_10);
|
||||
media |= ANAR_100|ANAR_10;
|
||||
epic_write_phy_register( sc->iobase, DP83840_ANAR, media );
|
||||
|
||||
/* Set and restart autoneg */
|
||||
epic_write_phy_register( sc->iobase, DP83840_BMCR,
|
||||
BMCR_AUTONEGOTIATION | BMCR_RESTART_AUTONEG );
|
||||
|
||||
#if defined(EPIC_DEBUG)
|
||||
printf("tx%d: Autonegotiation\n",sc->unit);
|
||||
#endif
|
||||
}
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
/*
|
||||
* This function sets EPIC multicast table
|
||||
*/
|
||||
static void
|
||||
epic_set_mc_table(
|
||||
epic_softc_t * sc)
|
||||
{
|
||||
struct ifnet *ifp = &sc->epic_if;
|
||||
|
||||
if( ifp->if_flags & IFF_MULTICAST ){
|
||||
#if defined(EPIC_DEBUG)
|
||||
if( !(ifp->if_flags & IFF_ALLMULTI) )
|
||||
printf("tx%d: WARNING! only receive all multicasts mode supported\n",sc->unit);
|
||||
#endif
|
||||
outl( sc->iobase + MC0, 0xFFFF );
|
||||
outl( sc->iobase + MC1, 0xFFFF );
|
||||
outl( sc->iobase + MC2, 0xFFFF );
|
||||
outl( sc->iobase + MC3, 0xFFFF );
|
||||
}
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
/*
|
||||
* This function should completely stop rx and tx processes
|
||||
*/
|
||||
static void
|
||||
epic_stop(
|
||||
epic_softc_t * sc)
|
||||
{
|
||||
int iobase = sc->iobase;
|
||||
|
||||
sc->genctl &= ~GENCTL_ENABLE_INTERRUPT;
|
||||
outl( iobase + INTMASK, 0 );
|
||||
outl( iobase + COMMAND, COMMAND_STOP_RX | COMMAND_STOP_TDMA | \
|
||||
COMMAND_STOP_TDMA );
|
||||
outl( iobase + GENCTL, 0 );
|
||||
outl( iobase + COMMAND,
|
||||
COMMAND_STOP_RX | COMMAND_STOP_TDMA | COMMAND_STOP_TDMA );
|
||||
|
||||
sc->epic_if.if_timer = 0;
|
||||
|
||||
}
|
||||
|
||||
static void
|
||||
epic_update_if_media_flags(
|
||||
epic_softc_t * sc)
|
||||
{
|
||||
struct ifnet *ifp = &sc->epic_if;
|
||||
|
||||
/* Read media control */
|
||||
sc->media = epic_read_phy_register(sc->iobase, 0);
|
||||
|
||||
/* AutoNegotiation */
|
||||
if( sc->media & 0x1000 ) ifp->if_flags &= ~IFF_NOAUTONEG;
|
||||
else ifp->if_flags |= IFF_NOAUTONEG;
|
||||
|
||||
/* fullduplex */
|
||||
if( sc->media & 0x0100 ) {
|
||||
ifp->if_flags |= IFF_FULLDUPLEX;
|
||||
sc->txcon |= TXCON_LOOPBACK_MODE_FULL_DUPLEX;
|
||||
} else {
|
||||
ifp->if_flags &= ~IFF_FULLDUPLEX;
|
||||
sc->txcon &= ~TXCON_LOOPBACK_MODE_FULL_DUPLEX;
|
||||
}
|
||||
outl( sc->iobase + TXCON, sc->txcon );
|
||||
|
||||
/* 10/100 MBit */
|
||||
if( sc->media & 0x2000 ) {
|
||||
ifp->if_flags |= IFF_100MB;
|
||||
ifp->if_baudrate = 100000000;
|
||||
} else {
|
||||
ifp->if_flags &= ~IFF_100MB;
|
||||
ifp->if_baudrate = 10000000;
|
||||
}
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
/*
|
||||
* Initialize Rx ad Tx rings and give them to EPIC
|
||||
*
|
||||
|
|
@ -903,7 +959,7 @@ epic_init_rings(epic_softc_t * sc){
|
|||
printf("tx%d: malloc failed\n",sc->unit);
|
||||
continue;
|
||||
}
|
||||
buf->data = (caddr_t)((u_int32_t)(buf->pool + 3) & (~0x3));
|
||||
buf->data = (caddr_t)buf->pool;
|
||||
#else
|
||||
if( buf->mbuf ){
|
||||
m_freem( buf->mbuf );
|
||||
|
|
@ -946,8 +1002,7 @@ epic_init_rings(epic_softc_t * sc){
|
|||
continue;
|
||||
}
|
||||
|
||||
/* align on 4 bytes */
|
||||
buf->data = (caddr_t)((u_int32_t)(buf->pool + 3) & (~0x3));
|
||||
buf->data = (caddr_t)buf->pool;
|
||||
|
||||
buf->desc.bufaddr = vtophys( buf->data );
|
||||
buf->desc.buflength = ETHER_MAX_FRAME_LEN;
|
||||
|
|
|
|||
471
sys/pci/if_tx.c
471
sys/pci/if_tx.c
|
|
@ -23,7 +23,7 @@
|
|||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* version: stable-163
|
||||
* version: stable-165
|
||||
*
|
||||
*/
|
||||
|
||||
|
|
@ -55,6 +55,12 @@
|
|||
*
|
||||
* stable-163:
|
||||
* added media control code
|
||||
*
|
||||
* stable-164:
|
||||
* fixed some bugs
|
||||
*
|
||||
* stable-165:
|
||||
* fixed media control code
|
||||
*/
|
||||
|
||||
#include <sys/param.h>
|
||||
|
|
@ -65,7 +71,11 @@
|
|||
#include <sys/errno.h>
|
||||
#include <sys/malloc.h>
|
||||
#include <sys/kernel.h>
|
||||
#include <sys/ioctl.h> /* makes problem in FreeBSD 3.x */
|
||||
#if defined(__FreeBSD__) && __FreeBSD__ >= 3
|
||||
#include <sys/sockio.h>
|
||||
#else
|
||||
#include <sys/ioctl.h>
|
||||
#endif
|
||||
#include <machine/clock.h>
|
||||
#include <net/if.h>
|
||||
#include <net/if_dl.h>
|
||||
|
|
@ -117,8 +127,6 @@ epic_ifioctl(register struct ifnet * ifp, int command, caddr_t data){
|
|||
epic_softc_t *sc = ifp->if_softc;
|
||||
struct ifreq *ifr = (struct ifreq *) data;
|
||||
int x, error = 0;
|
||||
u_int32_t media=0;
|
||||
u_int32_t rxcon=0;
|
||||
|
||||
x = splimp();
|
||||
|
||||
|
|
@ -144,79 +152,33 @@ epic_ifioctl(register struct ifnet * ifp, int command, caddr_t data){
|
|||
}
|
||||
}
|
||||
|
||||
/* Set broadcast mode */
|
||||
if( ifp->if_flags & IFF_BROADCAST )
|
||||
rxcon |= RXCON_RECEIVE_BROADCAST_FRAMES;
|
||||
else
|
||||
rxcon &= ~RXCON_RECEIVE_BROADCAST_FRAMES;
|
||||
/* Update RXCON register */
|
||||
epic_set_rx_mode( sc );
|
||||
|
||||
/* Set media */
|
||||
|
||||
if( ifp->if_flags & IFF_NOAUTONEG ){
|
||||
if( ifp->if_flags & IFF_100MB ) media |= 0x2000;
|
||||
else media &= ~0x2000;
|
||||
|
||||
if( ifp->if_flags & IFF_FULLDUPLEX )
|
||||
media |= 0x0100;
|
||||
else
|
||||
media &= ~0x0100;
|
||||
|
||||
} else {
|
||||
media |= 0x1200; /* Set and restart autoneg */
|
||||
}
|
||||
|
||||
#if NBPFILTER > 0
|
||||
/* Set promisc mode */
|
||||
if( ifp->if_flags & IFF_PROMISC )
|
||||
sc->rxcon |= RXCON_PROMISCUOUS_MODE;
|
||||
else
|
||||
sc->rxcon &= ~RXCON_PROMISCUOUS_MODE;
|
||||
|
||||
#endif
|
||||
/*
|
||||
* Update hardware if media changed
|
||||
*/
|
||||
if( sc->media != media ){
|
||||
if( media & 0x1000 ){
|
||||
printf("tx%d: autonegotiation started\n",sc->unit);
|
||||
epic_write_phy_register( sc->iobase, 0, (sc->media=media) );
|
||||
ifp->if_timer=3;
|
||||
sc->pending_txs++;
|
||||
} else {
|
||||
epic_write_phy_register( sc->iobase, 0, (sc->media=media) );
|
||||
epic_update_if_media_flags(sc);
|
||||
printf("tx%d: %dMbps %s\n",sc->unit,
|
||||
(ifp->if_flags&IFF_100MB)?100:10,
|
||||
(ifp->if_flags&IFF_FULLDUPLEX)?"full-duplex":"half-duplex" );
|
||||
}
|
||||
}
|
||||
|
||||
if( sc->rxcon != rxcon )
|
||||
outl( sc->iobase + RXCON, (sc->rxcon = rxcon) );
|
||||
/* Update SPEED */
|
||||
epic_set_media_speed( sc );
|
||||
|
||||
break;
|
||||
|
||||
#if 0 /* XXXXXXXX: no multicast filtering */
|
||||
case SIOCADDMULTI:
|
||||
case SIOCDELMULTI:
|
||||
/*
|
||||
* Update out multicast list.
|
||||
*/
|
||||
|
||||
/* Update out multicast list */
|
||||
|
||||
#if defined(__FreeBSD__) && __FreeBSD__ >= 3
|
||||
epic_set_mc_table(sc);
|
||||
error = 0;
|
||||
#else
|
||||
error = (command == SIOCADDMULTI) ?
|
||||
ether_addmulti(ifr, &sc->arpcom) :
|
||||
ether_delmulti(ifr, &sc->arpcom);
|
||||
ether_addmulti(ifr, &sc->epic_ac) :
|
||||
ether_delmulti(ifr, &sc->epic_ac);
|
||||
|
||||
if (error == ENETRESET) {
|
||||
|
||||
/*
|
||||
* Multicast list has changed; set the hardware filter
|
||||
* accordingly.
|
||||
*/
|
||||
ed_setrcr(sc);
|
||||
epic_set_mc_table(sc);
|
||||
error = 0;
|
||||
}
|
||||
break;
|
||||
#endif
|
||||
break;
|
||||
|
||||
case SIOCSIFMTU:
|
||||
/*
|
||||
|
|
@ -238,7 +200,7 @@ epic_ifioctl(register struct ifnet * ifp, int command, caddr_t data){
|
|||
}
|
||||
|
||||
/*
|
||||
* IFSTART function
|
||||
* Ifstart function
|
||||
*/
|
||||
static void
|
||||
epic_ifstart(struct ifnet * const ifp){
|
||||
|
|
@ -283,10 +245,6 @@ epic_ifstart(struct ifnet * const ifp){
|
|||
sc->pending_txs++;
|
||||
}
|
||||
|
||||
#if defined(EPIC_DEBUG)
|
||||
printf("tx%d: txring overflowed\n",sc->unit);
|
||||
#endif
|
||||
|
||||
sc->epic_if.if_flags |= IFF_OACTIVE;
|
||||
|
||||
return;
|
||||
|
|
@ -305,30 +263,16 @@ epic_ifwatchdog(
|
|||
int i;
|
||||
|
||||
x = splimp();
|
||||
if( sc->media & 0x0200 ){
|
||||
i=epic_read_phy_register( sc->iobase, 0 );
|
||||
if( i & 0x0200 ) {
|
||||
printf("tx%d: autoneg failed\n",sc->unit);
|
||||
sc->media=0xFFFFFFFF;
|
||||
} else {
|
||||
epic_update_if_media_flags(sc);
|
||||
printf("tx%d: autonegotiated: %dMbps %s\n",sc->unit,
|
||||
(ifp->if_flags&IFF_100MB)?100:10,
|
||||
(ifp->if_flags&IFF_FULLDUPLEX)?"full-duplex":"half-duplex" );
|
||||
}
|
||||
sc->pending_txs--;
|
||||
sc->media &= ~0x0200;
|
||||
} else {
|
||||
printf("tx%d: device timeout %d packets\n",
|
||||
sc->unit,sc->pending_txs);
|
||||
|
||||
ifp->if_oerrors+=sc->pending_txs;
|
||||
printf("tx%d: device timeout %d packets\n",
|
||||
sc->unit,sc->pending_txs);
|
||||
|
||||
epic_stop(sc);
|
||||
epic_init(sc);
|
||||
ifp->if_oerrors+=sc->pending_txs;
|
||||
|
||||
epic_ifstart(&sc->epic_if);
|
||||
}
|
||||
epic_stop(sc);
|
||||
epic_init(sc);
|
||||
|
||||
epic_ifstart(&sc->epic_if);
|
||||
|
||||
splx(x);
|
||||
}
|
||||
|
|
@ -348,16 +292,31 @@ epic_intr_normal(
|
|||
status = inl(iobase + INTSTAT);
|
||||
|
||||
/* Acknowledge all of the current interrupt sources ASAP. */
|
||||
outl( iobase + INTSTAT, status & 0x00007fff);
|
||||
outl( iobase + INTSTAT, status & 0x0000ffff);
|
||||
|
||||
if( status & (INTSTAT_RQE|INTSTAT_RCC|INTSTAT_OVW) )
|
||||
if( status & (INTSTAT_RQE|INTSTAT_HCC|INTSTAT_RCC|INTSTAT_OVW) )
|
||||
epic_rx_done( sc );
|
||||
|
||||
if( status & (INTSTAT_TQE|INTSTAT_TCC|INTSTAT_TXU) )
|
||||
if( status & (INTSTAT_TXC|INTSTAT_TQE|INTSTAT_TCC|INTSTAT_TXU) )
|
||||
epic_tx_done( sc );
|
||||
/*
|
||||
* UPDATE statistics
|
||||
*/
|
||||
|
||||
/*
|
||||
if( status & INTSTAT_GP2 ){
|
||||
printf("tx%d: GP2 int occured\n",sc->unit);
|
||||
epic_read_phy_register(sc->iobase,DP83840_BMSR);
|
||||
epic_read_phy_register(sc->iobase,DP83840_BMCR);
|
||||
}
|
||||
*/
|
||||
if( status & (INTSTAT_FATAL|INTSTAT_PMA|INTSTAT_PTA|INTSTAT_APE|INTSTAT_DPE) ){
|
||||
printf("tx%d: PCI fatal error occured (%s%s%s%s)",
|
||||
sc->unit,
|
||||
(status&INTSTAT_PMA)?"PMA":"",
|
||||
(status&INTSTAT_PTA)?" PTA":"",
|
||||
(status&INTSTAT_APE)?" APE":"",
|
||||
(status&INTSTAT_DPE)?" DPE":"");
|
||||
}
|
||||
|
||||
/* UPDATE statistics */
|
||||
if (status & (INTSTAT_CNT | INTSTAT_TXU | INTSTAT_OVW | INTSTAT_RXE)) {
|
||||
/*
|
||||
* update dot3 Rx statistics
|
||||
|
|
@ -366,19 +325,16 @@ epic_intr_normal(
|
|||
sc->dot3stats.dot3StatsFrameTooLongs += inb(iobase + ALICNT);
|
||||
sc->dot3stats.dot3StatsFCSErrors += inb(iobase + CRCCNT);
|
||||
|
||||
/*
|
||||
* update if Rx statistics
|
||||
*/
|
||||
/* Update if Rx statistics */
|
||||
if (status & (INTSTAT_OVW | INTSTAT_RXE))
|
||||
sc->epic_if.if_ierrors++;
|
||||
|
||||
/* Tx FIFO underflow. */
|
||||
if (status & INTSTAT_TXU) {
|
||||
/* Inc. counters */
|
||||
sc->dot3stats.dot3StatsInternalMacTransmitErrors++;
|
||||
sc->epic_if.if_oerrors++;
|
||||
#if defined(EPIC_DEBUG)
|
||||
printf("tx%d: restart transmit\n",sc->unit);
|
||||
#endif
|
||||
|
||||
/* Restart the transmit process. */
|
||||
outl(iobase + COMMAND, COMMAND_TXUGO);
|
||||
}
|
||||
|
|
@ -388,15 +344,11 @@ epic_intr_normal(
|
|||
}
|
||||
|
||||
/* If no packets are pending, thus no timeouts */
|
||||
if( sc->pending_txs == 0 ){
|
||||
if( sc->pending_txs == 0 )
|
||||
sc->epic_if.if_timer = 0;
|
||||
if( sc->cur_tx != sc->dirty_tx ){
|
||||
printf("tx%d: algorithm error1\n",sc->unit);
|
||||
}
|
||||
}
|
||||
|
||||
/* We should clear all interrupt sources. */
|
||||
outl(iobase + INTSTAT, 0x0001ffff );
|
||||
outl(iobase + INTSTAT, 0xffffffff );
|
||||
|
||||
return;
|
||||
}
|
||||
|
|
@ -485,23 +437,18 @@ epic_rx_done(
|
|||
|
||||
#if NBPFILTER > 0
|
||||
if( sc->epic_if.if_bpf ) bpf_mtap( &sc->epic_if, m );
|
||||
#if 0
|
||||
/* Accept only our packets */
|
||||
|
||||
/* Accept only our packets, broadcasts and multicasts */
|
||||
if( (eh->ether_dhost[0] & 1) == 0 &&
|
||||
bcmp(eh->ether_dhost,sc->epic_ac.ac_enaddr,ETHER_ADDR_LEN)){
|
||||
m_freem(m);
|
||||
goto rxerror;
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
m->m_pkthdr.len = len - sizeof(struct ether_header);
|
||||
m->m_len = len - sizeof( struct ether_header );
|
||||
m->m_data += sizeof( struct ether_header );
|
||||
|
||||
#if defined(EPIC_DEBUG)
|
||||
printf("tx%d: received %d bytes\n",sc->unit,len);
|
||||
#endif
|
||||
|
||||
ether_input(&sc->epic_if, eh, m);
|
||||
|
||||
sc->epic_if.if_ipackets++;
|
||||
|
|
@ -537,9 +484,6 @@ epic_tx_done( epic_softc_t *sc ){
|
|||
break; /* following packets are not Txed yet */
|
||||
|
||||
if( stt == 0 ){
|
||||
if( sc->pending_txs != 0 ||
|
||||
sc->dirty_tx != sc->cur_tx )
|
||||
printf("tx%d: algoritm error\n",sc->unit);
|
||||
if_flags = ~IFF_OACTIVE;
|
||||
break;
|
||||
}
|
||||
|
|
@ -625,13 +569,13 @@ epic_pci_probe(
|
|||
pcici_t config_id,
|
||||
pcidi_t device_id)
|
||||
{
|
||||
if (PCI_VENDORID(device_id) != SMC_VENDORID)
|
||||
if( PCI_VENDORID(device_id) != SMC_VENDORID )
|
||||
return NULL;
|
||||
|
||||
if( PCI_CHIPID(device_id) == CHIPID_83C170 )
|
||||
return "SMC 83c170";
|
||||
|
||||
return NULL;
|
||||
|
||||
if (PCI_CHIPID(device_id) == CHIPID_83C170)
|
||||
return "SMC 83c170";
|
||||
|
||||
return NULL;
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
@ -646,6 +590,7 @@ epic_pci_attach(
|
|||
epic_softc_t *sc;
|
||||
u_int32_t iobase;
|
||||
u_int32_t irq;
|
||||
u_int32_t phyid;
|
||||
int i;
|
||||
int s;
|
||||
int phy, phy_idx;
|
||||
|
|
@ -682,41 +627,33 @@ epic_pci_attach(
|
|||
/* Magic?! If we don't set this bit the MII interface won't work. */
|
||||
outl( iobase + TEST1, 0x0008 );
|
||||
|
||||
/* Read mac address */
|
||||
/* Read mac address (may be better is read from EEPROM?) */
|
||||
for (i = 0; i < ETHER_ADDR_LEN / sizeof( u_int16_t); i++)
|
||||
((u_int16_t *)sc->epic_macaddr)[i] = inw(iobase + LAN0 + i*4);
|
||||
|
||||
printf("tx%d:",sc->unit);
|
||||
printf(" address %02x:%02x:%02x:%02x:%02x:%02x,",sc->epic_macaddr[0],sc->epic_macaddr[1],sc->epic_macaddr[2],sc->epic_macaddr[3],sc->epic_macaddr[4],sc->epic_macaddr[5]);
|
||||
printf(" type SMC9432TX [");
|
||||
|
||||
i = epic_read_phy_register(iobase,0);
|
||||
if( i & 0x1000 ) printf("Auto-Neg.");
|
||||
if( i & 0x2000 ) printf(" 100 Mb/s");
|
||||
else printf(" 10 Mb/s");
|
||||
if( i & 0x100 ) printf(" Full-duplex");
|
||||
else printf(" Half-duplex");
|
||||
printf("]\n");
|
||||
/* Display some info */
|
||||
printf("tx%d: address %02x:%02x:%02x:%02x:%02x:%02x,",sc->unit,
|
||||
sc->epic_macaddr[0],sc->epic_macaddr[1],sc->epic_macaddr[2],
|
||||
sc->epic_macaddr[3],sc->epic_macaddr[4],sc->epic_macaddr[5]);
|
||||
|
||||
/*
|
||||
* Map interrupt
|
||||
*/
|
||||
if (!pci_map_int(config_id, epic_intr_normal, (void*) sc, &net_imask)) {
|
||||
|
||||
s = splimp();
|
||||
|
||||
/* Map interrupt */
|
||||
if( !pci_map_int(config_id, epic_intr_normal, (void*)sc, &net_imask) ) {
|
||||
printf("tx%d: couldn't map interrupt\n",unit);
|
||||
epics[ unit ] = NULL;
|
||||
free(sc, M_DEVBUF);
|
||||
return;
|
||||
}
|
||||
|
||||
/*
|
||||
* Fill ifnet structure
|
||||
*/
|
||||
s = splimp();
|
||||
|
||||
/* Fill ifnet structure */
|
||||
ifp = &sc->epic_if;
|
||||
|
||||
ifp->if_unit = unit;
|
||||
ifp->if_name = "tx";
|
||||
ifp->if_softc = sc;
|
||||
ifp->if_flags = IFF_BROADCAST|IFF_SIMPLEX; /*IFF_MULTICAST*/
|
||||
ifp->if_flags = IFF_BROADCAST|IFF_SIMPLEX|IFF_MULTICAST|IFF_ALLMULTI;
|
||||
ifp->if_ioctl = epic_ifioctl;
|
||||
ifp->if_start = epic_ifstart;
|
||||
ifp->if_watchdog = epic_ifwatchdog;
|
||||
|
|
@ -732,6 +669,55 @@ epic_pci_attach(
|
|||
|
||||
sc->dot3stats.dot3Compliance = DOT3COMPLIANCE_COLLS;
|
||||
|
||||
printf(" type SMC9432TX");
|
||||
|
||||
i = epic_read_phy_register(iobase, DP83840_BMCR);
|
||||
|
||||
if( i & BMCR_AUTONEGOTIATION ){
|
||||
printf(" [Auto-Neg.");
|
||||
|
||||
if( i & BMCR_100MBPS ) printf(" 100Mbps");
|
||||
else printf(" 10Mbps");
|
||||
|
||||
if( i & BMCR_FULL_DUPLEX ) printf(" FD");
|
||||
|
||||
printf("]\n");
|
||||
|
||||
if( i & BMCR_FULL_DUPLEX )
|
||||
printf("tx%d: WARNING! FD autonegotiated, not supported\n",sc->unit);
|
||||
|
||||
} else {
|
||||
ifp->if_flags |= IFF_LINK0;
|
||||
if( i & BMCR_100MBPS ) {
|
||||
printf(" [100Mbps");
|
||||
ifp->if_flags |= IFF_LINK2;
|
||||
} else printf(" [10Mbps");
|
||||
|
||||
if( i & BMCR_FULL_DUPLEX ) {
|
||||
printf(" FD");
|
||||
ifp->if_flags |= IFF_LINK1;
|
||||
}
|
||||
printf("]\n");
|
||||
}
|
||||
#if defined(EPIC_DEBUG)
|
||||
printf("tx%d: PHY id: (",sc->unit);
|
||||
i=epic_read_phy_register(iobase,DP83840_PHYIDR1);
|
||||
printf("%04x:",i);
|
||||
phyid=i<<6;
|
||||
i=epic_read_phy_register(iobase,DP83840_PHYIDR2);
|
||||
printf("%04x)",i);
|
||||
phyid|=((i>>10)&0x3F);
|
||||
printf(" %08x, rev %x, mod %x\n",phyid,(i)&0xF, (i>>4)&0x3f);
|
||||
#endif
|
||||
|
||||
epic_read_phy_register(iobase,DP83840_BMSR);
|
||||
epic_read_phy_register(iobase,DP83840_BMSR);
|
||||
epic_read_phy_register(iobase,DP83840_BMSR);
|
||||
i=epic_read_phy_register(iobase,DP83840_BMSR);
|
||||
|
||||
if( !(i & BMSR_LINK_STATUS) )
|
||||
printf("tx%d: WARNING! no link estabilished/n",sc->unit);
|
||||
|
||||
/*
|
||||
* Attach to if manager
|
||||
*/
|
||||
|
|
@ -773,40 +759,34 @@ epic_init(
|
|||
/* Initialize rings or reinitialize */
|
||||
epic_init_rings( sc );
|
||||
|
||||
epic_update_if_media_flags( sc );
|
||||
|
||||
/* Put node address to EPIC */
|
||||
outl( iobase + LAN0 + 0x0, ((u_int16_t *)sc->epic_macaddr)[0] );
|
||||
outl( iobase + LAN0 + 0x4, ((u_int16_t *)sc->epic_macaddr)[1] );
|
||||
outl( iobase + LAN0 + 0x8, ((u_int16_t *)sc->epic_macaddr)[2] );
|
||||
|
||||
/* Enable interrupts, set for PCI read multiple and etc */
|
||||
sc->genctl = GENCTL_ENABLE_INTERRUPT | GENCTL_MEMORY_READ_MULTIPLE | \
|
||||
GENCTL_ONECOPY | GENCTL_RECEIVE_FIFO_THRESHOLD128;
|
||||
|
||||
outl( iobase + GENCTL, sc->genctl );
|
||||
outl( iobase + GENCTL,
|
||||
GENCTL_ENABLE_INTERRUPT | GENCTL_MEMORY_READ_MULTIPLE |
|
||||
GENCTL_ONECOPY | GENCTL_RECEIVE_FIFO_THRESHOLD128 );
|
||||
|
||||
/* Set transmit threshold */
|
||||
outl( iobase + ETXTHR, 0x40 );
|
||||
|
||||
/* Compute rx mode. */
|
||||
if( sc->epic_if.if_flags & IFF_BROADCAST )
|
||||
sc->rxcon |= RXCON_RECEIVE_BROADCAST_FRAMES;
|
||||
else
|
||||
sc->rxcon &= ~RXCON_RECEIVE_BROADCAST_FRAMES;
|
||||
/* Compute and set RXCON. */
|
||||
epic_set_rx_mode( sc );
|
||||
|
||||
if( sc->epic_if.if_flags & IFF_PROMISC )
|
||||
sc->rxcon |= RXCON_PROMISCUOUS_MODE;
|
||||
else
|
||||
sc->rxcon &= ~RXCON_PROMISCUOUS_MODE;
|
||||
/* Set MII speed mode */
|
||||
epic_set_media_speed( sc );
|
||||
|
||||
/* Set rx and tx modes */
|
||||
outl( iobase + RXCON, sc->rxcon );
|
||||
outl( iobase + TXCON, sc->txcon );
|
||||
/* Set multicast table */
|
||||
epic_set_mc_table( sc );
|
||||
|
||||
/* Enable interrupts by setting the interrupt mask. */
|
||||
outl( iobase + INTMASK, INTSTAT_CNT | INTSTAT_TXU | INTSTAT_TCC |
|
||||
INTSTAT_RXE | INTSTAT_OVW | INTSTAT_RQE | INTSTAT_RCC );
|
||||
outl( iobase + INTMASK,
|
||||
INTSTAT_RCC | INTSTAT_RQE | INTSTAT_OVW | INTSTAT_RXE |
|
||||
INTSTAT_TXC | INTSTAT_TCC | INTSTAT_TQE | INTSTAT_TXU |
|
||||
INTSTAT_CNT | /*INTSTAT_GP2 |*/ INTSTAT_FATAL |
|
||||
INTSTAT_PTA | INTSTAT_PMA | INTSTAT_APE | INTSTAT_DPE );
|
||||
|
||||
/* Start rx process */
|
||||
outl( iobase + COMMAND, COMMAND_RXQUEUED | COMMAND_START_RX );
|
||||
|
|
@ -818,58 +798,134 @@ epic_init(
|
|||
/* ... and free */
|
||||
ifp->if_flags &= ~IFF_OACTIVE;
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
/*
|
||||
* This function should set EPIC's registers according IFF_* flags
|
||||
*/
|
||||
static void
|
||||
epic_set_rx_mode(
|
||||
epic_softc_t * sc)
|
||||
{
|
||||
struct ifnet *ifp = &sc->epic_if;
|
||||
u_int16_t rxcon = 0;
|
||||
|
||||
#if NBPFILTER > 0
|
||||
if( sc->epic_if.if_flags & IFF_PROMISC )
|
||||
rxcon |= RXCON_PROMISCUOUS_MODE;
|
||||
#endif
|
||||
|
||||
if( sc->epic_if.if_flags & IFF_BROADCAST )
|
||||
rxcon |= RXCON_RECEIVE_BROADCAST_FRAMES;
|
||||
|
||||
if( sc->epic_if.if_flags & IFF_MULTICAST )
|
||||
rxcon |= RXCON_RECEIVE_MULTICAST_FRAMES;
|
||||
|
||||
outl( sc->iobase + RXCON, rxcon );
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
/*
|
||||
* This function should set MII to mode specified by IFF_LINK* flags
|
||||
*/
|
||||
static void
|
||||
epic_set_media_speed(
|
||||
epic_softc_t * sc)
|
||||
{
|
||||
struct ifnet *ifp = &sc->epic_if;
|
||||
u_int16_t media;
|
||||
u_int32_t i;
|
||||
|
||||
/* Set media speed */
|
||||
if( ifp->if_flags & IFF_LINK0 ){
|
||||
/* Allow only manual fullduplex modes */
|
||||
media = epic_read_phy_register( sc->iobase, DP83840_ANAR );
|
||||
media |= ANAR_100|ANAR_10|ANAR_100_FD|ANAR_10_FD;
|
||||
epic_write_phy_register( sc->iobase, DP83840_ANAR, media );
|
||||
|
||||
/* Set mode */
|
||||
media = (ifp->if_flags&IFF_LINK2)?BMCR_100MBPS:0;
|
||||
media |= (ifp->if_flags&IFF_LINK1)?BMCR_FULL_DUPLEX:0;
|
||||
epic_write_phy_register( sc->iobase, DP83840_BMCR, media );
|
||||
|
||||
ifp->if_baudrate =
|
||||
(ifp->if_flags&IFF_LINK2)?100000000:10000000;
|
||||
|
||||
outl( sc->iobase + TXCON,(ifp->if_flags&IFF_LINK1)?TXCON_LOOPBACK_MODE_FULL_DUPLEX|TXCON_DEFAULT:TXCON_DEFAULT );
|
||||
|
||||
#if defined(EPIC_DEBUG)
|
||||
printf("tx%d: %dMbps %s\n",sc->unit,
|
||||
(ifp->if_flags&IFF_LINK2)?100:10,
|
||||
(ifp->if_flags&IFF_LINK1)?"full-duplex":"half-duplex" );
|
||||
#endif
|
||||
} else {
|
||||
/* If autoneg is set, IFF_LINK flags are meaningless */
|
||||
ifp->if_flags &= ~(IFF_LINK0|IFF_LINK1|IFF_LINK2);
|
||||
ifp->if_baudrate = 100000000;
|
||||
|
||||
outl( sc->iobase + TXCON, TXCON_DEFAULT );
|
||||
|
||||
/* Does not allow to autoneg fullduplex modes */
|
||||
media = epic_read_phy_register( sc->iobase, DP83840_ANAR );
|
||||
media &= ~(ANAR_100|ANAR_100_FD|ANAR_10_FD|ANAR_10);
|
||||
media |= ANAR_100|ANAR_10;
|
||||
epic_write_phy_register( sc->iobase, DP83840_ANAR, media );
|
||||
|
||||
/* Set and restart autoneg */
|
||||
epic_write_phy_register( sc->iobase, DP83840_BMCR,
|
||||
BMCR_AUTONEGOTIATION | BMCR_RESTART_AUTONEG );
|
||||
|
||||
#if defined(EPIC_DEBUG)
|
||||
printf("tx%d: Autonegotiation\n",sc->unit);
|
||||
#endif
|
||||
}
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
/*
|
||||
* This function sets EPIC multicast table
|
||||
*/
|
||||
static void
|
||||
epic_set_mc_table(
|
||||
epic_softc_t * sc)
|
||||
{
|
||||
struct ifnet *ifp = &sc->epic_if;
|
||||
|
||||
if( ifp->if_flags & IFF_MULTICAST ){
|
||||
#if defined(EPIC_DEBUG)
|
||||
if( !(ifp->if_flags & IFF_ALLMULTI) )
|
||||
printf("tx%d: WARNING! only receive all multicasts mode supported\n",sc->unit);
|
||||
#endif
|
||||
outl( sc->iobase + MC0, 0xFFFF );
|
||||
outl( sc->iobase + MC1, 0xFFFF );
|
||||
outl( sc->iobase + MC2, 0xFFFF );
|
||||
outl( sc->iobase + MC3, 0xFFFF );
|
||||
}
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
/*
|
||||
* This function should completely stop rx and tx processes
|
||||
*/
|
||||
static void
|
||||
epic_stop(
|
||||
epic_softc_t * sc)
|
||||
{
|
||||
int iobase = sc->iobase;
|
||||
|
||||
sc->genctl &= ~GENCTL_ENABLE_INTERRUPT;
|
||||
outl( iobase + INTMASK, 0 );
|
||||
outl( iobase + COMMAND, COMMAND_STOP_RX | COMMAND_STOP_TDMA | \
|
||||
COMMAND_STOP_TDMA );
|
||||
outl( iobase + GENCTL, 0 );
|
||||
outl( iobase + COMMAND,
|
||||
COMMAND_STOP_RX | COMMAND_STOP_TDMA | COMMAND_STOP_TDMA );
|
||||
|
||||
sc->epic_if.if_timer = 0;
|
||||
|
||||
}
|
||||
|
||||
static void
|
||||
epic_update_if_media_flags(
|
||||
epic_softc_t * sc)
|
||||
{
|
||||
struct ifnet *ifp = &sc->epic_if;
|
||||
|
||||
/* Read media control */
|
||||
sc->media = epic_read_phy_register(sc->iobase, 0);
|
||||
|
||||
/* AutoNegotiation */
|
||||
if( sc->media & 0x1000 ) ifp->if_flags &= ~IFF_NOAUTONEG;
|
||||
else ifp->if_flags |= IFF_NOAUTONEG;
|
||||
|
||||
/* fullduplex */
|
||||
if( sc->media & 0x0100 ) {
|
||||
ifp->if_flags |= IFF_FULLDUPLEX;
|
||||
sc->txcon |= TXCON_LOOPBACK_MODE_FULL_DUPLEX;
|
||||
} else {
|
||||
ifp->if_flags &= ~IFF_FULLDUPLEX;
|
||||
sc->txcon &= ~TXCON_LOOPBACK_MODE_FULL_DUPLEX;
|
||||
}
|
||||
outl( sc->iobase + TXCON, sc->txcon );
|
||||
|
||||
/* 10/100 MBit */
|
||||
if( sc->media & 0x2000 ) {
|
||||
ifp->if_flags |= IFF_100MB;
|
||||
ifp->if_baudrate = 100000000;
|
||||
} else {
|
||||
ifp->if_flags &= ~IFF_100MB;
|
||||
ifp->if_baudrate = 10000000;
|
||||
}
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
/*
|
||||
* Initialize Rx ad Tx rings and give them to EPIC
|
||||
*
|
||||
|
|
@ -903,7 +959,7 @@ epic_init_rings(epic_softc_t * sc){
|
|||
printf("tx%d: malloc failed\n",sc->unit);
|
||||
continue;
|
||||
}
|
||||
buf->data = (caddr_t)((u_int32_t)(buf->pool + 3) & (~0x3));
|
||||
buf->data = (caddr_t)buf->pool;
|
||||
#else
|
||||
if( buf->mbuf ){
|
||||
m_freem( buf->mbuf );
|
||||
|
|
@ -946,8 +1002,7 @@ epic_init_rings(epic_softc_t * sc){
|
|||
continue;
|
||||
}
|
||||
|
||||
/* align on 4 bytes */
|
||||
buf->data = (caddr_t)((u_int32_t)(buf->pool + 3) & (~0x3));
|
||||
buf->data = (caddr_t)buf->pool;
|
||||
|
||||
buf->desc.bufaddr = vtophys( buf->data );
|
||||
buf->desc.buflength = ETHER_MAX_FRAME_LEN;
|
||||
|
|
|
|||
|
|
@ -23,6 +23,8 @@
|
|||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* stable-165
|
||||
*
|
||||
*/
|
||||
|
||||
/*
|
||||
|
|
@ -38,22 +40,6 @@
|
|||
#define TX_RING_SIZE 16
|
||||
#define RX_RING_SIZE 16
|
||||
|
||||
/*
|
||||
* Media control
|
||||
*/
|
||||
#ifndef IFF_ALTPHYS
|
||||
#define IFF_ALTPHYS IFF_LINK2
|
||||
#endif
|
||||
#define IFF_100MB IFF_ALTPHYS
|
||||
|
||||
#ifndef IFF_FULLDUPLEX
|
||||
#define IFF_FULLDUPLEX IFF_LINK1
|
||||
#endif
|
||||
|
||||
#ifndef IFF_NOAUTONEG
|
||||
#define IFF_NOAUTONEG IFF_LINK0
|
||||
#endif
|
||||
|
||||
#define ETHER_MAX_FRAME_LEN (ETHER_MAX_LEN + ETHER_CRC_LEN)
|
||||
|
||||
/* Shall be moved to ../net/if_mib.h */
|
||||
|
|
@ -134,12 +120,12 @@
|
|||
#define INTSTAT_TQE 0x00000080
|
||||
#define INTSTAT_TXU 0x00000100
|
||||
#define INTSTAT_CNT 0x00000200
|
||||
#define INTSTAT_RCT 0x00000400
|
||||
#define INTSTAT_DPE 0x00000800
|
||||
#define INTSTAT_APE 0x00001000
|
||||
#define INTSTAT_PMA 0x00002000
|
||||
#define INTSTAT_PTA 0x00004000
|
||||
#define INTSTAT_RSV 0x00008000
|
||||
#define INTSTAT_PREI 0x00000400
|
||||
#define INTSTAT_RCT 0x00000800
|
||||
#define INTSTAT_FATAL 0x00001000 /* One of DPE,APE,PMA,PTA happend */
|
||||
#define INTSTAT_UNUSED1 0x00002000
|
||||
#define INTSTAT_UNUSED2 0x00004000
|
||||
#define INTSTAT_GP2 0x00008000 /* PHY Event */
|
||||
#define INTSTAT_INT_ACTV 0x00010000
|
||||
#define INTSTAT_RXIDLE 0x00020000
|
||||
#define INTSTAT_TXIDLE 0x00040000
|
||||
|
|
@ -147,6 +133,11 @@
|
|||
#define INTSTAT_TCIP 0x00100000
|
||||
#define INTSTAT_RBE 0x00200000
|
||||
#define INTSTAT_RCTS 0x00400000
|
||||
#define INTSTAT_RSV 0x00800000
|
||||
#define INTSTAT_DPE 0x01000000 /* PCI Fatal error */
|
||||
#define INTSTAT_APE 0x02000000 /* PCI Fatal error */
|
||||
#define INTSTAT_PMA 0x04000000 /* PCI Fatal error */
|
||||
#define INTSTAT_PTA 0x08000000 /* PCI Fatal error */
|
||||
|
||||
#define GENCTL_SOFT_RESET 0x00000001
|
||||
#define GENCTL_ENABLE_INTERRUPT 0x00000002
|
||||
|
|
@ -184,6 +175,38 @@
|
|||
#define TXCON_LOOPBACK_MODE_INT 0x00000002
|
||||
#define TXCON_LOOPBACK_MODE_PHY 0x00000004
|
||||
#define TXCON_LOOPBACK_MODE_FULL_DUPLEX 0x00000006
|
||||
#define TXCON_SLOT_TIME 0x00000078
|
||||
|
||||
#define TXCON_DEFAULT (TXCON_SLOT_TIME|TXCON_EARLY_TRANSMIT_ENABLE)
|
||||
|
||||
/*
|
||||
* National Semiconductor's DP83840A Registers and bits
|
||||
*/
|
||||
#define DP83840_BMCR 0x00 /* Control register */
|
||||
#define DP83840_BMSR 0x01 /* Status rgister */
|
||||
#define DP83840_ANAR 0x04 /* Autonegotiation advertising register */
|
||||
#define DP83840_PHYIDR1 0x02
|
||||
#define DP83840_PHYIDR2 0x03
|
||||
|
||||
#define BMCR_RESET 0x8000
|
||||
#define BMCR_100MBPS 0x2000 /* 10/100 Mbps */
|
||||
#define BMCR_AUTONEGOTIATION 0x1000 /* ON/OFF */
|
||||
#define BMCR_RESTART_AUTONEG 0x0200
|
||||
#define BMCR_FULL_DUPLEX 0x0100
|
||||
|
||||
#define BMSR_100BASE_T4 0x8000
|
||||
#define BMSR_100BASE_TX_FD 0x4000
|
||||
#define BMSR_100BASE_TX 0x2000
|
||||
#define BMSR_10BASE_T_FD 0x1000
|
||||
#define BMSR_10BASE_T 0x0800
|
||||
#define BMSR_AUTONEG_COMPLETE 0x0020
|
||||
#define BMSR_AUTONEG_ABLE 0x0008
|
||||
#define BMSR_LINK_STATUS 0x0004
|
||||
|
||||
#define ANAR_10 0x0020
|
||||
#define ANAR_10_FD 0x0040
|
||||
#define ANAR_100 0x0080
|
||||
#define ANAR_100_FD 0x0100
|
||||
|
||||
/*
|
||||
* Structures definition and Functions prototypes
|
||||
|
|
@ -227,10 +250,6 @@ typedef struct {
|
|||
struct arpcom epic_ac;
|
||||
struct epic_rx_buffer rx_buffer[RX_RING_SIZE];
|
||||
struct epic_tx_buffer tx_buffer[TX_RING_SIZE];
|
||||
u_int32_t rxcon;
|
||||
u_int32_t media;
|
||||
u_int32_t txcon;
|
||||
u_int32_t genctl;
|
||||
u_int32_t cur_tx;
|
||||
u_int32_t cur_rx;
|
||||
u_int32_t dirty_tx;
|
||||
|
|
@ -260,6 +279,9 @@ static void epic_init(epic_softc_t *);
|
|||
static void epic_stop(epic_softc_t *);
|
||||
|
||||
static void epic_init_rings(epic_softc_t *);
|
||||
static void epic_set_rx_mode(epic_softc_t *);
|
||||
static void epic_set_mc_table(epic_softc_t *);
|
||||
static void epic_set_media_speed(epic_softc_t *);
|
||||
|
||||
static int epic_read_eeprom(u_int16_t,u_int16_t);
|
||||
static void epic_output_eepromw(u_int16_t, u_int16_t);
|
||||
|
|
|
|||
Loading…
Reference in a new issue