mirror of
https://github.com/freebsd/freebsd-src
synced 2024-10-15 12:54:27 +00:00
Add basic WOL support for MCP ethernet controllers. It seems the
controller does not perform automatic switching from 1000Mbps link to 10/100Mbps link when WOL is activated. Implement establishing 10/100Mps link with auto-negotiation in driver. Link status change handler was modified to remove taskqueue based approach since driver now needs synchronous handling for link establishment. Submitted by: Yamagi Burmeister (lists <> yamagi.org ) (initial version) Tested by: Yamagi Burmeister (lists <> yamagi.org ) MFC after: 1 week
This commit is contained in:
Pyun YongHyeon
parent
b3fa872420
commit
52a1393e4c
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=215132
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@ -81,7 +81,7 @@ static void nfe_power(struct nfe_softc *);
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static int nfe_miibus_readreg(device_t, int, int);
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static int nfe_miibus_writereg(device_t, int, int, int);
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static void nfe_miibus_statchg(device_t);
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static void nfe_link_task(void *, int);
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static void nfe_mac_config(struct nfe_softc *, struct mii_data *);
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static void nfe_set_intr(struct nfe_softc *);
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static __inline void nfe_enable_intr(struct nfe_softc *);
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static __inline void nfe_disable_intr(struct nfe_softc *);
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@ -125,6 +125,8 @@ static int sysctl_hw_nfe_proc_limit(SYSCTL_HANDLER_ARGS);
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static void nfe_sysctl_node(struct nfe_softc *);
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static void nfe_stats_clear(struct nfe_softc *);
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static void nfe_stats_update(struct nfe_softc *);
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static void nfe_set_linkspeed(struct nfe_softc *);
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static void nfe_set_wol(struct nfe_softc *);
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#ifdef NFE_DEBUG
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static int nfedebug = 0;
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@ -348,7 +350,6 @@ nfe_attach(device_t dev)
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mtx_init(&sc->nfe_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK,
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MTX_DEF);
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callout_init_mtx(&sc->nfe_stat_ch, &sc->nfe_mtx, 0);
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TASK_INIT(&sc->nfe_link_task, 0, nfe_link_task, sc);
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pci_enable_busmaster(dev);
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@ -586,6 +587,9 @@ nfe_attach(device_t dev)
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if ((ifp->if_capabilities & IFCAP_HWCSUM) != 0)
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ifp->if_capabilities |= IFCAP_VLAN_HWCSUM;
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}
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if (pci_find_extcap(dev, PCIY_PMG, ®) == 0)
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ifp->if_capabilities |= IFCAP_WOL_MAGIC;
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ifp->if_capenable = ifp->if_capabilities;
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/*
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@ -666,7 +670,6 @@ nfe_detach(device_t dev)
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NFE_UNLOCK(sc);
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callout_drain(&sc->nfe_stat_ch);
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taskqueue_drain(taskqueue_fast, &sc->nfe_tx_task);
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taskqueue_drain(taskqueue_swi, &sc->nfe_link_task);
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ether_ifdetach(ifp);
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}
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@ -752,6 +755,7 @@ nfe_suspend(device_t dev)
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NFE_LOCK(sc);
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nfe_stop(sc->nfe_ifp);
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nfe_set_wol(sc);
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sc->nfe_suspended = 1;
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NFE_UNLOCK(sc);
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@ -768,6 +772,7 @@ nfe_resume(device_t dev)
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sc = device_get_softc(dev);
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NFE_LOCK(sc);
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nfe_power(sc);
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ifp = sc->nfe_ifp;
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if (ifp->if_flags & IFF_UP)
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nfe_init_locked(sc);
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@ -804,39 +809,57 @@ nfe_power(struct nfe_softc *sc)
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static void
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nfe_miibus_statchg(device_t dev)
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{
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struct nfe_softc *sc;
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sc = device_get_softc(dev);
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taskqueue_enqueue(taskqueue_swi, &sc->nfe_link_task);
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}
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static void
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nfe_link_task(void *arg, int pending)
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{
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struct nfe_softc *sc;
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struct mii_data *mii;
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struct ifnet *ifp;
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uint32_t phy, seed, misc = NFE_MISC1_MAGIC, link = NFE_MEDIA_SET;
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uint32_t gmask, rxctl, txctl, val;
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uint32_t rxctl, txctl;
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sc = (struct nfe_softc *)arg;
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sc = device_get_softc(dev);
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NFE_LOCK(sc);
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mii = device_get_softc(sc->nfe_miibus);
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ifp = sc->nfe_ifp;
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if (mii == NULL || ifp == NULL) {
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NFE_UNLOCK(sc);
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return;
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sc->nfe_link = 0;
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if ((mii->mii_media_status & (IFM_ACTIVE | IFM_AVALID)) ==
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(IFM_ACTIVE | IFM_AVALID)) {
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switch (IFM_SUBTYPE(mii->mii_media_active)) {
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case IFM_10_T:
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case IFM_100_TX:
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case IFM_1000_T:
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sc->nfe_link = 1;
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break;
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default:
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break;
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}
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}
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if (mii->mii_media_status & IFM_ACTIVE) {
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if (IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE)
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sc->nfe_link = 1;
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} else
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sc->nfe_link = 0;
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nfe_mac_config(sc, mii);
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txctl = NFE_READ(sc, NFE_TX_CTL);
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rxctl = NFE_READ(sc, NFE_RX_CTL);
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if (sc->nfe_link != 0 && (ifp->if_drv_flags & IFF_DRV_RUNNING) != 0) {
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txctl |= NFE_TX_START;
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rxctl |= NFE_RX_START;
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} else {
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txctl &= ~NFE_TX_START;
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rxctl &= ~NFE_RX_START;
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}
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NFE_WRITE(sc, NFE_TX_CTL, txctl);
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NFE_WRITE(sc, NFE_RX_CTL, rxctl);
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NFE_UNLOCK(sc);
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}
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static void
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nfe_mac_config(struct nfe_softc *sc, struct mii_data *mii)
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{
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uint32_t link, misc, phy, seed;
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uint32_t val;
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NFE_LOCK_ASSERT(sc);
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phy = NFE_READ(sc, NFE_PHY_IFACE);
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phy &= ~(NFE_PHY_HDX | NFE_PHY_100TX | NFE_PHY_1000T);
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@ -844,7 +867,10 @@ nfe_link_task(void *arg, int pending)
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seed = NFE_READ(sc, NFE_RNDSEED);
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seed &= ~NFE_SEED_MASK;
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if (((mii->mii_media_active & IFM_GMASK) & IFM_FDX) == 0) {
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misc = NFE_MISC1_MAGIC;
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link = NFE_MEDIA_SET;
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if ((IFM_OPTIONS(mii->mii_media_active) & IFM_FDX) == 0) {
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phy |= NFE_PHY_HDX; /* half-duplex */
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misc |= NFE_MISC1_HDX;
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}
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@ -881,18 +907,18 @@ nfe_link_task(void *arg, int pending)
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NFE_WRITE(sc, NFE_MISC1, misc);
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NFE_WRITE(sc, NFE_LINKSPEED, link);
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gmask = mii->mii_media_active & IFM_GMASK;
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if ((gmask & IFM_FDX) != 0) {
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if ((IFM_OPTIONS(mii->mii_media_active) & IFM_FDX) != 0) {
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/* It seems all hardwares supports Rx pause frames. */
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val = NFE_READ(sc, NFE_RXFILTER);
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if ((gmask & IFM_FLAG0) != 0)
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if ((IFM_OPTIONS(mii->mii_media_active) & IFM_FLAG0) != 0)
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val |= NFE_PFF_RX_PAUSE;
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else
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val &= ~NFE_PFF_RX_PAUSE;
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NFE_WRITE(sc, NFE_RXFILTER, val);
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if ((sc->nfe_flags & NFE_TX_FLOW_CTRL) != 0) {
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val = NFE_READ(sc, NFE_MISC1);
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if ((gmask & IFM_FLAG1) != 0) {
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if ((IFM_OPTIONS(mii->mii_media_active) &
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IFM_FLAG1) != 0) {
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NFE_WRITE(sc, NFE_TX_PAUSE_FRAME,
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NFE_TX_PAUSE_FRAME_ENABLE);
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val |= NFE_MISC1_TX_PAUSE;
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@ -916,20 +942,6 @@ nfe_link_task(void *arg, int pending)
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NFE_WRITE(sc, NFE_MISC1, val);
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}
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}
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txctl = NFE_READ(sc, NFE_TX_CTL);
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rxctl = NFE_READ(sc, NFE_RX_CTL);
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if (sc->nfe_link != 0 && (ifp->if_drv_flags & IFF_DRV_RUNNING) != 0) {
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txctl |= NFE_TX_START;
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rxctl |= NFE_RX_START;
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} else {
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txctl &= ~NFE_TX_START;
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rxctl &= ~NFE_RX_START;
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}
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NFE_WRITE(sc, NFE_TX_CTL, txctl);
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NFE_WRITE(sc, NFE_RX_CTL, rxctl);
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NFE_UNLOCK(sc);
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}
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@ -1714,6 +1726,10 @@ nfe_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
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}
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}
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#endif /* DEVICE_POLLING */
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if ((mask & IFCAP_WOL_MAGIC) != 0 &&
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(ifp->if_capabilities & IFCAP_WOL_MAGIC) != 0)
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ifp->if_capenable ^= IFCAP_WOL_MAGIC;
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if ((sc->nfe_flags & NFE_HW_CSUM) != 0 &&
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(mask & IFCAP_HWCSUM) != 0) {
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ifp->if_capenable ^= IFCAP_HWCSUM;
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@ -2746,7 +2762,8 @@ nfe_init_locked(void *xsc)
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NFE_WRITE(sc, NFE_STATUS, sc->mii_phyaddr << 24 | NFE_STATUS_MAGIC);
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NFE_WRITE(sc, NFE_SETUP_R4, NFE_R4_MAGIC);
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NFE_WRITE(sc, NFE_WOL_CTL, NFE_WOL_MAGIC);
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/* Disable WOL. */
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NFE_WRITE(sc, NFE_WOL_CTL, 0);
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sc->rxtxctl &= ~NFE_RXTX_BIT2;
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NFE_WRITE(sc, NFE_RXTX_CTL, sc->rxtxctl);
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@ -2917,18 +2934,8 @@ nfe_tick(void *xsc)
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static int
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nfe_shutdown(device_t dev)
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{
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struct nfe_softc *sc;
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struct ifnet *ifp;
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sc = device_get_softc(dev);
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NFE_LOCK(sc);
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ifp = sc->nfe_ifp;
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nfe_stop(ifp);
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/* nfe_reset(sc); */
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NFE_UNLOCK(sc);
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return (0);
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return (nfe_suspend(dev));
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}
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@ -3212,3 +3219,115 @@ nfe_stats_update(struct nfe_softc *sc)
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stats->rx_broadcast += NFE_READ(sc, NFE_TX_BROADCAST);
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}
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}
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static void
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nfe_set_linkspeed(struct nfe_softc *sc)
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{
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struct mii_softc *miisc;
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struct mii_data *mii;
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int aneg, i, phyno;
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NFE_LOCK_ASSERT(sc);
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mii = device_get_softc(sc->nfe_miibus);
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mii_pollstat(mii);
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aneg = 0;
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if ((mii->mii_media_status & (IFM_ACTIVE | IFM_AVALID)) ==
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(IFM_ACTIVE | IFM_AVALID)) {
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switch IFM_SUBTYPE(mii->mii_media_active) {
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case IFM_10_T:
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case IFM_100_TX:
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return;
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case IFM_1000_T:
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aneg++;
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break;
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default:
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break;
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}
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}
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phyno = 0;
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if (mii->mii_instance) {
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miisc = LIST_FIRST(&mii->mii_phys);
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phyno = miisc->mii_phy;
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LIST_FOREACH(miisc, &mii->mii_phys, mii_list)
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mii_phy_reset(miisc);
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} else
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return;
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nfe_miibus_writereg(sc->nfe_dev, phyno, MII_100T2CR, 0);
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nfe_miibus_writereg(sc->nfe_dev, phyno,
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MII_ANAR, ANAR_TX_FD | ANAR_TX | ANAR_10_FD | ANAR_10 | ANAR_CSMA);
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nfe_miibus_writereg(sc->nfe_dev, phyno,
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MII_BMCR, BMCR_RESET | BMCR_AUTOEN | BMCR_STARTNEG);
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DELAY(1000);
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if (aneg != 0) {
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/*
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* Poll link state until nfe(4) get a 10/100Mbps link.
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*/
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for (i = 0; i < MII_ANEGTICKS_GIGE; i++) {
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mii_pollstat(mii);
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if ((mii->mii_media_status & (IFM_ACTIVE | IFM_AVALID))
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== (IFM_ACTIVE | IFM_AVALID)) {
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switch (IFM_SUBTYPE(mii->mii_media_active)) {
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case IFM_10_T:
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case IFM_100_TX:
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nfe_mac_config(sc, mii);
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return;
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default:
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break;
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}
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}
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NFE_UNLOCK(sc);
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pause("nfelnk", hz);
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NFE_LOCK(sc);
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}
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if (i == MII_ANEGTICKS_GIGE)
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device_printf(sc->nfe_dev,
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"establishing a link failed, WOL may not work!");
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}
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/*
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* No link, force MAC to have 100Mbps, full-duplex link.
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* This is the last resort and may/may not work.
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*/
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mii->mii_media_status = IFM_AVALID | IFM_ACTIVE;
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mii->mii_media_active = IFM_ETHER | IFM_100_TX | IFM_FDX;
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nfe_mac_config(sc, mii);
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}
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static void
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nfe_set_wol(struct nfe_softc *sc)
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{
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struct ifnet *ifp;
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uint32_t wolctl;
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int pmc;
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uint16_t pmstat;
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NFE_LOCK_ASSERT(sc);
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if (pci_find_extcap(sc->nfe_dev, PCIY_PMG, &pmc) != 0)
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return;
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ifp = sc->nfe_ifp;
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if ((ifp->if_capenable & IFCAP_WOL_MAGIC) != 0)
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wolctl = NFE_WOL_MAGIC;
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else
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wolctl = 0;
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NFE_WRITE(sc, NFE_WOL_CTL, wolctl);
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if ((ifp->if_capenable & IFCAP_WOL_MAGIC) != 0) {
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nfe_set_linkspeed(sc);
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if ((sc->nfe_flags & NFE_PWR_MGMT) != 0)
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NFE_WRITE(sc, NFE_PWR2_CTL,
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NFE_READ(sc, NFE_PWR2_CTL) & ~NFE_PWR2_GATE_CLOCKS);
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/* Enable RX. */
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NFE_WRITE(sc, NFE_RX_RING_ADDR_HI, 0);
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NFE_WRITE(sc, NFE_RX_RING_ADDR_LO, 0);
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NFE_WRITE(sc, NFE_RX_CTL, NFE_READ(sc, NFE_RX_CTL) |
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NFE_RX_START);
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}
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/* Request PME if WOL is requested. */
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pmstat = pci_read_config(sc->nfe_dev, pmc + PCIR_POWER_STATUS, 2);
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pmstat &= ~(PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE);
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if ((ifp->if_capenable & IFCAP_WOL) != 0)
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pmstat |= PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE;
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pci_write_config(sc->nfe_dev, pmc + PCIR_POWER_STATUS, pmstat, 2);
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}
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@ -190,6 +190,7 @@
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#define NFE_PWR2_WAKEUP_MASK 0x0f11
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#define NFE_PWR2_REVA3 (1 << 0)
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#define NFE_PWR2_GATE_CLOCKS 0x0f00
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#define NFE_MEDIA_SET 0x10000
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#define NFE_MEDIA_1000T 0x00032
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@ -140,7 +140,6 @@ struct nfe_softc {
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struct taskqueue *nfe_tq;
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struct task nfe_int_task;
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struct task nfe_tx_task;
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struct task nfe_link_task;
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int nfe_link;
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int nfe_suspended;
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int nfe_framesize;
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