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amdsmn(4), amdtemp(4): add support for AMD Family 19h Models 10h-1Fh.
Tested on AMD Threadripper 7960X. PR: kern/278311 Tested by: jbo MFC after: 1 week
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@ -58,6 +58,7 @@
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#define PCI_DEVICE_ID_AMD_17H_M10H_ROOT 0x15d0
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#define PCI_DEVICE_ID_AMD_17H_M10H_ROOT 0x15d0
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#define PCI_DEVICE_ID_AMD_17H_M30H_ROOT 0x1480 /* Also M70H, F19H M00H/M20H */
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#define PCI_DEVICE_ID_AMD_17H_M30H_ROOT 0x1480 /* Also M70H, F19H M00H/M20H */
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#define PCI_DEVICE_ID_AMD_17H_M60H_ROOT 0x1630
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#define PCI_DEVICE_ID_AMD_17H_M60H_ROOT 0x1630
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#define PCI_DEVICE_ID_AMD_19H_M10H_ROOT 0x14a4
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#define PCI_DEVICE_ID_AMD_19H_M60H_ROOT 0x14d8
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#define PCI_DEVICE_ID_AMD_19H_M60H_ROOT 0x14d8
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struct pciid;
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struct pciid;
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@ -102,6 +103,12 @@ static const struct pciid {
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.amdsmn_addr_reg = F17H_SMN_ADDR_REG,
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.amdsmn_addr_reg = F17H_SMN_ADDR_REG,
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.amdsmn_data_reg = F17H_SMN_DATA_REG,
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.amdsmn_data_reg = F17H_SMN_DATA_REG,
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},
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},
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{
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.amdsmn_vendorid = CPU_VENDOR_AMD,
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.amdsmn_deviceid = PCI_DEVICE_ID_AMD_19H_M10H_ROOT,
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.amdsmn_addr_reg = F17H_SMN_ADDR_REG,
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.amdsmn_data_reg = F17H_SMN_DATA_REG,
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},
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{
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{
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.amdsmn_vendorid = CPU_VENDOR_AMD,
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.amdsmn_vendorid = CPU_VENDOR_AMD,
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.amdsmn_deviceid = PCI_DEVICE_ID_AMD_19H_M60H_ROOT,
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.amdsmn_deviceid = PCI_DEVICE_ID_AMD_19H_M60H_ROOT,
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@ -69,7 +69,11 @@ typedef enum {
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CCD6,
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CCD6,
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CCD7,
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CCD7,
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CCD8,
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CCD8,
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CCD_MAX = CCD8,
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CCD9,
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CCD10,
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CCD11,
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CCD12,
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CCD_MAX = CCD12,
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NUM_CCDS = CCD_MAX - CCD_BASE + 1,
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NUM_CCDS = CCD_MAX - CCD_BASE + 1,
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} amdsensor_t;
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} amdsensor_t;
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@ -109,6 +113,7 @@ struct amdtemp_softc {
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#define DEVICEID_AMD_HOSTB17H_M10H_ROOT 0x15d0
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#define DEVICEID_AMD_HOSTB17H_M10H_ROOT 0x15d0
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#define DEVICEID_AMD_HOSTB17H_M30H_ROOT 0x1480 /* Also M70H, F19H M00H/M20H */
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#define DEVICEID_AMD_HOSTB17H_M30H_ROOT 0x1480 /* Also M70H, F19H M00H/M20H */
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#define DEVICEID_AMD_HOSTB17H_M60H_ROOT 0x1630
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#define DEVICEID_AMD_HOSTB17H_M60H_ROOT 0x1630
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#define DEVICEID_AMD_HOSTB19H_M10H_ROOT 0x14a4
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#define DEVICEID_AMD_HOSTB19H_M60H_ROOT 0x14d8
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#define DEVICEID_AMD_HOSTB19H_M60H_ROOT 0x14d8
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static const struct amdtemp_product {
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static const struct amdtemp_product {
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@ -134,6 +139,7 @@ static const struct amdtemp_product {
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{ VENDORID_AMD, DEVICEID_AMD_HOSTB17H_M10H_ROOT, false },
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{ VENDORID_AMD, DEVICEID_AMD_HOSTB17H_M10H_ROOT, false },
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{ VENDORID_AMD, DEVICEID_AMD_HOSTB17H_M30H_ROOT, false },
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{ VENDORID_AMD, DEVICEID_AMD_HOSTB17H_M30H_ROOT, false },
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{ VENDORID_AMD, DEVICEID_AMD_HOSTB17H_M60H_ROOT, false },
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{ VENDORID_AMD, DEVICEID_AMD_HOSTB17H_M60H_ROOT, false },
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{ VENDORID_AMD, DEVICEID_AMD_HOSTB19H_M10H_ROOT, false },
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{ VENDORID_AMD, DEVICEID_AMD_HOSTB19H_M60H_ROOT, false },
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{ VENDORID_AMD, DEVICEID_AMD_HOSTB19H_M60H_ROOT, false },
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};
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};
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@ -180,6 +186,7 @@ static const struct amdtemp_product {
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#define AMDTEMP_17H_CCD_TMP_BASE 0x59954
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#define AMDTEMP_17H_CCD_TMP_BASE 0x59954
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#define AMDTEMP_17H_CCD_TMP_VALID (1u << 11)
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#define AMDTEMP_17H_CCD_TMP_VALID (1u << 11)
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#define AMDTEMP_ZEN4_10H_CCD_TMP_BASE 0x59b00
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#define AMDTEMP_ZEN4_CCD_TMP_BASE 0x59b08
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#define AMDTEMP_ZEN4_CCD_TMP_BASE 0x59b08
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/*
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/*
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@ -860,6 +867,11 @@ amdtemp_probe_ccd_sensors19h(device_t dev, uint32_t model)
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maxreg = 8;
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maxreg = 8;
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_Static_assert((int)NUM_CCDS >= 8, "");
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_Static_assert((int)NUM_CCDS >= 8, "");
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break;
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break;
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case 0x10 ... 0x1f:
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sc->sc_temp_base = AMDTEMP_ZEN4_10H_CCD_TMP_BASE;
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maxreg = 12;
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_Static_assert((int)NUM_CCDS >= 12, "");
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break;
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case 0x60 ... 0x6f: /* Zen4 Ryzen "Raphael" */
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case 0x60 ... 0x6f: /* Zen4 Ryzen "Raphael" */
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sc->sc_temp_base = AMDTEMP_ZEN4_CCD_TMP_BASE;
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sc->sc_temp_base = AMDTEMP_ZEN4_CCD_TMP_BASE;
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maxreg = 8;
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maxreg = 8;
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