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Fix ordering of legacy IRQ reservations.

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Submitted by:	Jeremiah Lott   jlott at averesystems dot com
This commit is contained in:
Peter Grehan 2013-08-16 00:35:20 +00:00
parent ce625ec719
commit 50dc0db3f0
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=254395
1 changed files with 10 additions and 10 deletions
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20
usr.sbin/bhyve/pci_emul.c
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@ -1008,6 +1008,16 @@ init_pci(struct vmctx *ctx)
pci_emul_membase32 = vm_get_lowmem_limit(ctx);
pci_emul_membase64 = PCI_EMUL_MEMBASE64;
/*
* Allow ISA IRQs 5,10,11,12, and 15 to be available for
* generic use
*/
lirq[5].li_generic = 1;
lirq[10].li_generic = 1;
lirq[11].li_generic = 1;
lirq[12].li_generic = 1;
lirq[15].li_generic = 1;
for (slot = 0; slot < MAXSLOTS; slot++) {
for (func = 0; func < MAXFUNCS; func++) {
si = &pci_slotinfo[slot][func];
@ -1022,16 +1032,6 @@ init_pci(struct vmctx *ctx)
}
}
/*
* Allow ISA IRQs 5,10,11,12, and 15 to be available for
* generic use
*/
lirq[5].li_generic = 1;
lirq[10].li_generic = 1;
lirq[11].li_generic = 1;
lirq[12].li_generic = 1;
lirq[15].li_generic = 1;
/*
* The guest physical memory map looks like the following:
* [0, lowmem) guest system memory