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Add configuration for RISC-V ISA.
Reviewed by: emaste Sponsored by: DARPA, AFRL Sponsored by: HEIF5 Differential Revision: https://reviews.freebsd.org/D5020
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Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=294573
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@ -253,6 +253,9 @@ typedef unsigned szind_t;
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# ifdef __powerpc__
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# define LG_QUANTUM 4
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# endif
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# ifdef __riscv__
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# define LG_QUANTUM 4
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# endif
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# ifdef __s390__
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# define LG_QUANTUM 4
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# endif
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@ -52,6 +52,9 @@
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#elif defined(__powerpc__)
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# define LG_SIZEOF_PTR 2
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#endif
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#ifdef __riscv__
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# define LG_SIZEOF_PTR 3
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#endif
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#ifndef JEMALLOC_TLS_MODEL
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# define JEMALLOC_TLS_MODEL /* Default. */
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