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arm64: Support break and watch points in VHE
When booting the kernel with VHE it will be running at EL2. The current config register values only enable the reaces at EL1 when tracing the kernel. Set the HMC flag to also trap from EL2. Sponsored by: Arm Ltd Differential Revision: https://reviews.freebsd.org/D45121
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@ -40,6 +40,7 @@
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#include <machine/armreg.h>
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#include <machine/cpu.h>
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#include <machine/debug_monitor.h>
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#include <machine/machdep.h>
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#include <machine/kdb.h>
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#include <machine/pcb.h>
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@ -86,6 +87,7 @@ void dbg_monitor_exit(struct thread *, struct trapframe *);
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#define DBG_WATCH_CTRL_ACCESS_MASK(x) ((x) & (0x3 << 3))
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/* Common for breakpoint and watchpoint */
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#define DBG_WB_CTRL_HMC (0x1 << 13)
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#define DBG_WB_CTRL_EL1 (0x1 << 1)
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#define DBG_WB_CTRL_EL0 (0x2 << 1)
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#define DBG_WB_CTRL_ELX_MASK(x) ((x) & (0x3 << 1))
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@ -457,6 +459,8 @@ dbg_setup_breakpoint(struct debug_monitor_state *monitor, vm_offset_t addr)
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if ((monitor->dbg_flags & DBGMON_KERNEL) == 0)
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bcr_priv = DBG_WB_CTRL_EL0;
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else if (in_vhe())
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bcr_priv = DBG_WB_CTRL_EL1 | DBG_WB_CTRL_HMC;
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else
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bcr_priv = DBG_WB_CTRL_EL1;
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@ -530,6 +534,8 @@ dbg_setup_watchpoint(struct debug_monitor_state *monitor, vm_offset_t addr,
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if ((monitor->dbg_flags & DBGMON_KERNEL) == 0)
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wcr_priv = DBG_WB_CTRL_EL0;
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else if (in_vhe())
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wcr_priv = DBG_WB_CTRL_EL1 | DBG_WB_CTRL_HMC;
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else
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wcr_priv = DBG_WB_CTRL_EL1;
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