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pmc amd17h: fix inputs to jevents
This commit is contained in:
Matt Macy
parent
6044931335
commit
455d10cc4c
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=337730
File diff suppressed because it is too large
Load diff
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@ -121,619 +121,4 @@
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"EventCode": "0x1d0",
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"BriefDescription": "The number of fused retired branch instructions retired per cycle. The number of events logged per cycle can vary from 0 to 3."
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}
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][
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{
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"EventName": "ex_ret_instr",
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"EventCode": "0xc0",
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"BriefDescription": "Retired Instructions."
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},
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{
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"EventName": "ex_ret_cops",
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"EventCode": "0xc1",
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"BriefDescription": "The number of uOps retired. This includes all processor activity (instructions, exceptions, interrupts, microcode assists, etc.). The number of events logged per cycle can vary from 0 to 4."
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},
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{
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"EventName": "ex_ret_brn",
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"EventCode": "0xc2",
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"BriefDescription": "The number of branch instructions retired. This includes all types of architectural control flow changes, including exceptions and interrupts."
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},
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{
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"EventName": "ex_ret_brn_misp",
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"EventCode": "0xc3",
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"BriefDescription": "The number of branch instructions retired, of any type, that were not correctly predicted. This includes those for which prediction is not attempted (far control transfers, exceptions and interrupts)."
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},
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{
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"EventName": "ex_ret_brn_tkn",
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"EventCode": "0xc4",
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"BriefDescription": "The number of taken branches that were retired. This includes all types of architectural control flow changes, including exceptions and interrupts."
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},
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{
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"EventName": "ex_ret_brn_tkn_misp",
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"EventCode": "0xc5",
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"BriefDescription": "The number of retired taken branch instructions that were mispredicted."
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},
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{
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"EventName": "ex_ret_brn_far",
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"EventCode": "0xc6",
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"BriefDescription": "The number of far control transfers retired including far call/jump/return, IRET, SYSCALL and SYSRET, plus exceptions and interrupts. Far control transfers are not subject to branch prediction."
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},
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{
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"EventName": "ex_ret_brn_resync",
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"EventCode": "0xc7",
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"BriefDescription": "The number of resync branches. These reflect pipeline restarts due to certain microcode assists and events such as writes to the active instruction stream, among other things. Each occurrence reflects a restart penalty similar to a branch mispredict. This is relatively rare."
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},
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{
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"EventName": "ex_ret_near_ret",
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"EventCode": "0xc8",
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"BriefDescription": "The number of near return instructions (RET or RET Iw) retired."
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},
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{
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"EventName": "ex_ret_near_ret_mispred",
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"EventCode": "0xc9",
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"BriefDescription": "The number of near returns retired that were not correctly predicted by the return address predictor. Each such mispredict incurs the same penalty as a mispredicted conditional branch instruction."
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},
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{
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"EventName": "ex_ret_brn_ind_misp",
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"EventCode": "0xca",
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"BriefDescription": "Retired Indirect Branch Instructions Mispredicted."
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},
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{
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"EventName": "ex_ret_mmx_fp_instr.sse_instr",
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"EventCode": "0xcb",
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"BriefDescription": "SSE instructions (SSE, SSE2, SSE3, SSSE3, SSE4A, SSE41, SSE42, AVX).",
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"PublicDescription": "The number of MMX, SSE or x87 instructions retired. The UnitMask allows the selection of the individual classes of instructions as given in the table. Each increment represents one complete instruction. Since this event includes non-numeric instructions it is not suitable for measuring MFLOPS. SSE instructions (SSE, SSE2, SSE3, SSSE3, SSE4A, SSE41, SSE42, AVX).",
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"UMask": "0x4"
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},
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{
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"EventName": "ex_ret_mmx_fp_instr.mmx_instr",
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"EventCode": "0xcb",
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"BriefDescription": "MMX instructions.",
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"PublicDescription": "The number of MMX, SSE or x87 instructions retired. The UnitMask allows the selection of the individual classes of instructions as given in the table. Each increment represents one complete instruction. Since this event includes non-numeric instructions it is not suitable for measuring MFLOPS. MMX instructions.",
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"UMask": "0x2"
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},
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{
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"EventName": "ex_ret_mmx_fp_instr.x87_instr",
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"EventCode": "0xcb",
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"BriefDescription": "x87 instructions.",
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"PublicDescription": "The number of MMX, SSE or x87 instructions retired. The UnitMask allows the selection of the individual classes of instructions as given in the table. Each increment represents one complete instruction. Since this event includes non-numeric instructions it is not suitable for measuring MFLOPS. x87 instructions.",
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"UMask": "0x1"
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},
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{
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"EventName": "ex_ret_cond",
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"EventCode": "0xd1",
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"BriefDescription": "Retired Conditional Branch Instructions."
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},
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{
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"EventName": "ex_ret_cond_misp",
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"EventCode": "0xd2",
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"BriefDescription": "Retired Conditional Branch Instructions Mispredicted."
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},
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{
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"EventName": "ex_div_busy",
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"EventCode": "0xd3",
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"BriefDescription": "Div Cycles Busy count."
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},
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{
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"EventName": "ex_div_count",
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"EventCode": "0xd4",
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"BriefDescription": "Div Op Count."
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},
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{
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"EventName": "ex_tagged_ibs_ops.ibs_count_rollover",
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"EventCode": "0x1cf",
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"BriefDescription": "Number of times an op could not be tagged by IBS because of a previous tagged op that has not retired.",
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"PublicDescription": "Tagged IBS Ops. Number of times an op could not be tagged by IBS because of a previous tagged op that has not retired.",
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"UMask": "0x4"
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},
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{
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"EventName": "ex_tagged_ibs_ops.ibs_tagged_ops_ret",
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"EventCode": "0x1cf",
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"BriefDescription": "Number of Ops tagged by IBS that retired.",
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"PublicDescription": "Tagged IBS Ops. Number of Ops tagged by IBS that retired.",
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"UMask": "0x2"
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},
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{
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"EventName": "ex_tagged_ibs_ops.ibs_tagged_ops",
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"EventCode": "0x1cf",
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"BriefDescription": "Number of Ops tagged by IBS.",
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"PublicDescription": "Tagged IBS Ops. Number of Ops tagged by IBS.",
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"UMask": "0x1"
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},
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{
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"EventName": "ex_ret_fus_brnch_inst",
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"EventCode": "0x1d0",
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"BriefDescription": "The number of fused retired branch instructions retired per cycle. The number of events logged per cycle can vary from 0 to 3."
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}
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][
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{
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"EventName": "ex_ret_instr",
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"EventCode": "0xc0",
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"BriefDescription": "Retired Instructions."
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},
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{
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"EventName": "ex_ret_cops",
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"EventCode": "0xc1",
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"BriefDescription": "The number of uOps retired. This includes all processor activity (instructions, exceptions, interrupts, microcode assists, etc.). The number of events logged per cycle can vary from 0 to 4."
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},
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{
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"EventName": "ex_ret_brn",
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"EventCode": "0xc2",
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"BriefDescription": "The number of branch instructions retired. This includes all types of architectural control flow changes, including exceptions and interrupts."
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},
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{
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"EventName": "ex_ret_brn_misp",
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"EventCode": "0xc3",
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"BriefDescription": "The number of branch instructions retired, of any type, that were not correctly predicted. This includes those for which prediction is not attempted (far control transfers, exceptions and interrupts)."
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},
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{
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"EventName": "ex_ret_brn_tkn",
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"EventCode": "0xc4",
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"BriefDescription": "The number of taken branches that were retired. This includes all types of architectural control flow changes, including exceptions and interrupts."
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},
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{
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"EventName": "ex_ret_brn_tkn_misp",
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"EventCode": "0xc5",
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"BriefDescription": "The number of retired taken branch instructions that were mispredicted."
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},
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{
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"EventName": "ex_ret_brn_far",
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"EventCode": "0xc6",
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"BriefDescription": "The number of far control transfers retired including far call/jump/return, IRET, SYSCALL and SYSRET, plus exceptions and interrupts. Far control transfers are not subject to branch prediction."
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},
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{
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"EventName": "ex_ret_brn_resync",
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"EventCode": "0xc7",
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"BriefDescription": "The number of resync branches. These reflect pipeline restarts due to certain microcode assists and events such as writes to the active instruction stream, among other things. Each occurrence reflects a restart penalty similar to a branch mispredict. This is relatively rare."
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},
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{
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"EventName": "ex_ret_near_ret",
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"EventCode": "0xc8",
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"BriefDescription": "The number of near return instructions (RET or RET Iw) retired."
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},
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{
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"EventName": "ex_ret_near_ret_mispred",
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"EventCode": "0xc9",
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"BriefDescription": "The number of near returns retired that were not correctly predicted by the return address predictor. Each such mispredict incurs the same penalty as a mispredicted conditional branch instruction."
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},
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{
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"EventName": "ex_ret_brn_ind_misp",
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"EventCode": "0xca",
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"BriefDescription": "Retired Indirect Branch Instructions Mispredicted."
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},
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{
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"EventName": "ex_ret_mmx_fp_instr.sse_instr",
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"EventCode": "0xcb",
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"BriefDescription": "SSE instructions (SSE, SSE2, SSE3, SSSE3, SSE4A, SSE41, SSE42, AVX).",
|
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"PublicDescription": "The number of MMX, SSE or x87 instructions retired. The UnitMask allows the selection of the individual classes of instructions as given in the table. Each increment represents one complete instruction. Since this event includes non-numeric instructions it is not suitable for measuring MFLOPS. SSE instructions (SSE, SSE2, SSE3, SSSE3, SSE4A, SSE41, SSE42, AVX).",
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"UMask": "0x4"
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},
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{
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"EventName": "ex_ret_mmx_fp_instr.mmx_instr",
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"EventCode": "0xcb",
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"BriefDescription": "MMX instructions.",
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"PublicDescription": "The number of MMX, SSE or x87 instructions retired. The UnitMask allows the selection of the individual classes of instructions as given in the table. Each increment represents one complete instruction. Since this event includes non-numeric instructions it is not suitable for measuring MFLOPS. MMX instructions.",
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"UMask": "0x2"
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},
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{
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"EventName": "ex_ret_mmx_fp_instr.x87_instr",
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"EventCode": "0xcb",
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"BriefDescription": "x87 instructions.",
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"PublicDescription": "The number of MMX, SSE or x87 instructions retired. The UnitMask allows the selection of the individual classes of instructions as given in the table. Each increment represents one complete instruction. Since this event includes non-numeric instructions it is not suitable for measuring MFLOPS. x87 instructions.",
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"UMask": "0x1"
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},
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{
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"EventName": "ex_ret_cond",
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"EventCode": "0xd1",
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"BriefDescription": "Retired Conditional Branch Instructions."
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},
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{
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"EventName": "ex_ret_cond_misp",
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"EventCode": "0xd2",
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"BriefDescription": "Retired Conditional Branch Instructions Mispredicted."
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},
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{
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"EventName": "ex_div_busy",
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"EventCode": "0xd3",
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"BriefDescription": "Div Cycles Busy count."
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},
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{
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"EventName": "ex_div_count",
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"EventCode": "0xd4",
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"BriefDescription": "Div Op Count."
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},
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{
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"EventName": "ex_tagged_ibs_ops.ibs_count_rollover",
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"EventCode": "0x1cf",
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"BriefDescription": "Number of times an op could not be tagged by IBS because of a previous tagged op that has not retired.",
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"PublicDescription": "Tagged IBS Ops. Number of times an op could not be tagged by IBS because of a previous tagged op that has not retired.",
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"UMask": "0x4"
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},
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{
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"EventName": "ex_tagged_ibs_ops.ibs_tagged_ops_ret",
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"EventCode": "0x1cf",
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"BriefDescription": "Number of Ops tagged by IBS that retired.",
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"PublicDescription": "Tagged IBS Ops. Number of Ops tagged by IBS that retired.",
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"UMask": "0x2"
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},
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{
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"EventName": "ex_tagged_ibs_ops.ibs_tagged_ops",
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"EventCode": "0x1cf",
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"BriefDescription": "Number of Ops tagged by IBS.",
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"PublicDescription": "Tagged IBS Ops. Number of Ops tagged by IBS.",
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"UMask": "0x1"
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},
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{
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"EventName": "ex_ret_fus_brnch_inst",
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"EventCode": "0x1d0",
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"BriefDescription": "The number of fused retired branch instructions retired per cycle. The number of events logged per cycle can vary from 0 to 3."
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}
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][
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{
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"EventName": "ex_ret_instr",
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"EventCode": "0xc0",
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"BriefDescription": "Retired Instructions."
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},
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{
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"EventName": "ex_ret_cops",
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"EventCode": "0xc1",
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"BriefDescription": "The number of uOps retired. This includes all processor activity (instructions, exceptions, interrupts, microcode assists, etc.). The number of events logged per cycle can vary from 0 to 4."
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},
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{
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"EventName": "ex_ret_brn",
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"EventCode": "0xc2",
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"BriefDescription": "The number of branch instructions retired. This includes all types of architectural control flow changes, including exceptions and interrupts."
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},
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{
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"EventName": "ex_ret_brn_misp",
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"EventCode": "0xc3",
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"BriefDescription": "The number of branch instructions retired, of any type, that were not correctly predicted. This includes those for which prediction is not attempted (far control transfers, exceptions and interrupts)."
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},
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{
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"EventName": "ex_ret_brn_tkn",
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"EventCode": "0xc4",
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"BriefDescription": "The number of taken branches that were retired. This includes all types of architectural control flow changes, including exceptions and interrupts."
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},
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{
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"EventName": "ex_ret_brn_tkn_misp",
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"EventCode": "0xc5",
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"BriefDescription": "The number of retired taken branch instructions that were mispredicted."
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},
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{
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"EventName": "ex_ret_brn_far",
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"EventCode": "0xc6",
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"BriefDescription": "The number of far control transfers retired including far call/jump/return, IRET, SYSCALL and SYSRET, plus exceptions and interrupts. Far control transfers are not subject to branch prediction."
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},
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{
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"EventName": "ex_ret_brn_resync",
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"EventCode": "0xc7",
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"BriefDescription": "The number of resync branches. These reflect pipeline restarts due to certain microcode assists and events such as writes to the active instruction stream, among other things. Each occurrence reflects a restart penalty similar to a branch mispredict. This is relatively rare."
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},
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{
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"EventName": "ex_ret_near_ret",
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"EventCode": "0xc8",
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"BriefDescription": "The number of near return instructions (RET or RET Iw) retired."
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},
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{
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"EventName": "ex_ret_near_ret_mispred",
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"EventCode": "0xc9",
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"BriefDescription": "The number of near returns retired that were not correctly predicted by the return address predictor. Each such mispredict incurs the same penalty as a mispredicted conditional branch instruction."
|
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},
|
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{
|
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"EventName": "ex_ret_brn_ind_misp",
|
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"EventCode": "0xca",
|
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"BriefDescription": "Retired Indirect Branch Instructions Mispredicted."
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},
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{
|
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"EventName": "ex_ret_mmx_fp_instr.sse_instr",
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"EventCode": "0xcb",
|
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"BriefDescription": "SSE instructions (SSE, SSE2, SSE3, SSSE3, SSE4A, SSE41, SSE42, AVX).",
|
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"PublicDescription": "The number of MMX, SSE or x87 instructions retired. The UnitMask allows the selection of the individual classes of instructions as given in the table. Each increment represents one complete instruction. Since this event includes non-numeric instructions it is not suitable for measuring MFLOPS. SSE instructions (SSE, SSE2, SSE3, SSSE3, SSE4A, SSE41, SSE42, AVX).",
|
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"UMask": "0x4"
|
||||
},
|
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{
|
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"EventName": "ex_ret_mmx_fp_instr.mmx_instr",
|
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"EventCode": "0xcb",
|
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"BriefDescription": "MMX instructions.",
|
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"PublicDescription": "The number of MMX, SSE or x87 instructions retired. The UnitMask allows the selection of the individual classes of instructions as given in the table. Each increment represents one complete instruction. Since this event includes non-numeric instructions it is not suitable for measuring MFLOPS. MMX instructions.",
|
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"UMask": "0x2"
|
||||
},
|
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{
|
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"EventName": "ex_ret_mmx_fp_instr.x87_instr",
|
||||
"EventCode": "0xcb",
|
||||
"BriefDescription": "x87 instructions.",
|
||||
"PublicDescription": "The number of MMX, SSE or x87 instructions retired. The UnitMask allows the selection of the individual classes of instructions as given in the table. Each increment represents one complete instruction. Since this event includes non-numeric instructions it is not suitable for measuring MFLOPS. x87 instructions.",
|
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"UMask": "0x1"
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},
|
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{
|
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"EventName": "ex_ret_cond",
|
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"EventCode": "0xd1",
|
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"BriefDescription": "Retired Conditional Branch Instructions."
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},
|
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{
|
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"EventName": "ex_ret_cond_misp",
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"EventCode": "0xd2",
|
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"BriefDescription": "Retired Conditional Branch Instructions Mispredicted."
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},
|
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{
|
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"EventName": "ex_div_busy",
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"EventCode": "0xd3",
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"BriefDescription": "Div Cycles Busy count."
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},
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{
|
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"EventName": "ex_div_count",
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"EventCode": "0xd4",
|
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"BriefDescription": "Div Op Count."
|
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},
|
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{
|
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"EventName": "ex_tagged_ibs_ops.ibs_count_rollover",
|
||||
"EventCode": "0x1cf",
|
||||
"BriefDescription": "Number of times an op could not be tagged by IBS because of a previous tagged op that has not retired.",
|
||||
"PublicDescription": "Tagged IBS Ops. Number of times an op could not be tagged by IBS because of a previous tagged op that has not retired.",
|
||||
"UMask": "0x4"
|
||||
},
|
||||
{
|
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"EventName": "ex_tagged_ibs_ops.ibs_tagged_ops_ret",
|
||||
"EventCode": "0x1cf",
|
||||
"BriefDescription": "Number of Ops tagged by IBS that retired.",
|
||||
"PublicDescription": "Tagged IBS Ops. Number of Ops tagged by IBS that retired.",
|
||||
"UMask": "0x2"
|
||||
},
|
||||
{
|
||||
"EventName": "ex_tagged_ibs_ops.ibs_tagged_ops",
|
||||
"EventCode": "0x1cf",
|
||||
"BriefDescription": "Number of Ops tagged by IBS.",
|
||||
"PublicDescription": "Tagged IBS Ops. Number of Ops tagged by IBS.",
|
||||
"UMask": "0x1"
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||||
},
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||||
{
|
||||
"EventName": "ex_ret_fus_brnch_inst",
|
||||
"EventCode": "0x1d0",
|
||||
"BriefDescription": "The number of fused retired branch instructions retired per cycle. The number of events logged per cycle can vary from 0 to 3."
|
||||
}
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||||
][
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{
|
||||
"EventName": "ex_ret_instr",
|
||||
"EventCode": "0xc0",
|
||||
"BriefDescription": "Retired Instructions."
|
||||
},
|
||||
{
|
||||
"EventName": "ex_ret_cops",
|
||||
"EventCode": "0xc1",
|
||||
"BriefDescription": "The number of uOps retired. This includes all processor activity (instructions, exceptions, interrupts, microcode assists, etc.). The number of events logged per cycle can vary from 0 to 4."
|
||||
},
|
||||
{
|
||||
"EventName": "ex_ret_brn",
|
||||
"EventCode": "0xc2",
|
||||
"BriefDescription": "The number of branch instructions retired. This includes all types of architectural control flow changes, including exceptions and interrupts."
|
||||
},
|
||||
{
|
||||
"EventName": "ex_ret_brn_misp",
|
||||
"EventCode": "0xc3",
|
||||
"BriefDescription": "The number of branch instructions retired, of any type, that were not correctly predicted. This includes those for which prediction is not attempted (far control transfers, exceptions and interrupts)."
|
||||
},
|
||||
{
|
||||
"EventName": "ex_ret_brn_tkn",
|
||||
"EventCode": "0xc4",
|
||||
"BriefDescription": "The number of taken branches that were retired. This includes all types of architectural control flow changes, including exceptions and interrupts."
|
||||
},
|
||||
{
|
||||
"EventName": "ex_ret_brn_tkn_misp",
|
||||
"EventCode": "0xc5",
|
||||
"BriefDescription": "The number of retired taken branch instructions that were mispredicted."
|
||||
},
|
||||
{
|
||||
"EventName": "ex_ret_brn_far",
|
||||
"EventCode": "0xc6",
|
||||
"BriefDescription": "The number of far control transfers retired including far call/jump/return, IRET, SYSCALL and SYSRET, plus exceptions and interrupts. Far control transfers are not subject to branch prediction."
|
||||
},
|
||||
{
|
||||
"EventName": "ex_ret_brn_resync",
|
||||
"EventCode": "0xc7",
|
||||
"BriefDescription": "The number of resync branches. These reflect pipeline restarts due to certain microcode assists and events such as writes to the active instruction stream, among other things. Each occurrence reflects a restart penalty similar to a branch mispredict. This is relatively rare."
|
||||
},
|
||||
{
|
||||
"EventName": "ex_ret_near_ret",
|
||||
"EventCode": "0xc8",
|
||||
"BriefDescription": "The number of near return instructions (RET or RET Iw) retired."
|
||||
},
|
||||
{
|
||||
"EventName": "ex_ret_near_ret_mispred",
|
||||
"EventCode": "0xc9",
|
||||
"BriefDescription": "The number of near returns retired that were not correctly predicted by the return address predictor. Each such mispredict incurs the same penalty as a mispredicted conditional branch instruction."
|
||||
},
|
||||
{
|
||||
"EventName": "ex_ret_brn_ind_misp",
|
||||
"EventCode": "0xca",
|
||||
"BriefDescription": "Retired Indirect Branch Instructions Mispredicted."
|
||||
},
|
||||
{
|
||||
"EventName": "ex_ret_mmx_fp_instr.sse_instr",
|
||||
"EventCode": "0xcb",
|
||||
"BriefDescription": "SSE instructions (SSE, SSE2, SSE3, SSSE3, SSE4A, SSE41, SSE42, AVX).",
|
||||
"PublicDescription": "The number of MMX, SSE or x87 instructions retired. The UnitMask allows the selection of the individual classes of instructions as given in the table. Each increment represents one complete instruction. Since this event includes non-numeric instructions it is not suitable for measuring MFLOPS. SSE instructions (SSE, SSE2, SSE3, SSSE3, SSE4A, SSE41, SSE42, AVX).",
|
||||
"UMask": "0x4"
|
||||
},
|
||||
{
|
||||
"EventName": "ex_ret_mmx_fp_instr.mmx_instr",
|
||||
"EventCode": "0xcb",
|
||||
"BriefDescription": "MMX instructions.",
|
||||
"PublicDescription": "The number of MMX, SSE or x87 instructions retired. The UnitMask allows the selection of the individual classes of instructions as given in the table. Each increment represents one complete instruction. Since this event includes non-numeric instructions it is not suitable for measuring MFLOPS. MMX instructions.",
|
||||
"UMask": "0x2"
|
||||
},
|
||||
{
|
||||
"EventName": "ex_ret_mmx_fp_instr.x87_instr",
|
||||
"EventCode": "0xcb",
|
||||
"BriefDescription": "x87 instructions.",
|
||||
"PublicDescription": "The number of MMX, SSE or x87 instructions retired. The UnitMask allows the selection of the individual classes of instructions as given in the table. Each increment represents one complete instruction. Since this event includes non-numeric instructions it is not suitable for measuring MFLOPS. x87 instructions.",
|
||||
"UMask": "0x1"
|
||||
},
|
||||
{
|
||||
"EventName": "ex_ret_cond",
|
||||
"EventCode": "0xd1",
|
||||
"BriefDescription": "Retired Conditional Branch Instructions."
|
||||
},
|
||||
{
|
||||
"EventName": "ex_ret_cond_misp",
|
||||
"EventCode": "0xd2",
|
||||
"BriefDescription": "Retired Conditional Branch Instructions Mispredicted."
|
||||
},
|
||||
{
|
||||
"EventName": "ex_div_busy",
|
||||
"EventCode": "0xd3",
|
||||
"BriefDescription": "Div Cycles Busy count."
|
||||
},
|
||||
{
|
||||
"EventName": "ex_div_count",
|
||||
"EventCode": "0xd4",
|
||||
"BriefDescription": "Div Op Count."
|
||||
},
|
||||
{
|
||||
"EventName": "ex_tagged_ibs_ops.ibs_count_rollover",
|
||||
"EventCode": "0x1cf",
|
||||
"BriefDescription": "Number of times an op could not be tagged by IBS because of a previous tagged op that has not retired.",
|
||||
"PublicDescription": "Tagged IBS Ops. Number of times an op could not be tagged by IBS because of a previous tagged op that has not retired.",
|
||||
"UMask": "0x4"
|
||||
},
|
||||
{
|
||||
"EventName": "ex_tagged_ibs_ops.ibs_tagged_ops_ret",
|
||||
"EventCode": "0x1cf",
|
||||
"BriefDescription": "Number of Ops tagged by IBS that retired.",
|
||||
"PublicDescription": "Tagged IBS Ops. Number of Ops tagged by IBS that retired.",
|
||||
"UMask": "0x2"
|
||||
},
|
||||
{
|
||||
"EventName": "ex_tagged_ibs_ops.ibs_tagged_ops",
|
||||
"EventCode": "0x1cf",
|
||||
"BriefDescription": "Number of Ops tagged by IBS.",
|
||||
"PublicDescription": "Tagged IBS Ops. Number of Ops tagged by IBS.",
|
||||
"UMask": "0x1"
|
||||
},
|
||||
{
|
||||
"EventName": "ex_ret_fus_brnch_inst",
|
||||
"EventCode": "0x1d0",
|
||||
"BriefDescription": "The number of fused retired branch instructions retired per cycle. The number of events logged per cycle can vary from 0 to 3."
|
||||
}
|
||||
][
|
||||
{
|
||||
"EventName": "ex_ret_instr",
|
||||
"EventCode": "0xc0",
|
||||
"BriefDescription": "Retired Instructions."
|
||||
},
|
||||
{
|
||||
"EventName": "ex_ret_cops",
|
||||
"EventCode": "0xc1",
|
||||
"BriefDescription": "The number of uOps retired. This includes all processor activity (instructions, exceptions, interrupts, microcode assists, etc.). The number of events logged per cycle can vary from 0 to 4."
|
||||
},
|
||||
{
|
||||
"EventName": "ex_ret_brn",
|
||||
"EventCode": "0xc2",
|
||||
"BriefDescription": "The number of branch instructions retired. This includes all types of architectural control flow changes, including exceptions and interrupts."
|
||||
},
|
||||
{
|
||||
"EventName": "ex_ret_brn_misp",
|
||||
"EventCode": "0xc3",
|
||||
"BriefDescription": "The number of branch instructions retired, of any type, that were not correctly predicted. This includes those for which prediction is not attempted (far control transfers, exceptions and interrupts)."
|
||||
},
|
||||
{
|
||||
"EventName": "ex_ret_brn_tkn",
|
||||
"EventCode": "0xc4",
|
||||
"BriefDescription": "The number of taken branches that were retired. This includes all types of architectural control flow changes, including exceptions and interrupts."
|
||||
},
|
||||
{
|
||||
"EventName": "ex_ret_brn_tkn_misp",
|
||||
"EventCode": "0xc5",
|
||||
"BriefDescription": "The number of retired taken branch instructions that were mispredicted."
|
||||
},
|
||||
{
|
||||
"EventName": "ex_ret_brn_far",
|
||||
"EventCode": "0xc6",
|
||||
"BriefDescription": "The number of far control transfers retired including far call/jump/return, IRET, SYSCALL and SYSRET, plus exceptions and interrupts. Far control transfers are not subject to branch prediction."
|
||||
},
|
||||
{
|
||||
"EventName": "ex_ret_brn_resync",
|
||||
"EventCode": "0xc7",
|
||||
"BriefDescription": "The number of resync branches. These reflect pipeline restarts due to certain microcode assists and events such as writes to the active instruction stream, among other things. Each occurrence reflects a restart penalty similar to a branch mispredict. This is relatively rare."
|
||||
},
|
||||
{
|
||||
"EventName": "ex_ret_near_ret",
|
||||
"EventCode": "0xc8",
|
||||
"BriefDescription": "The number of near return instructions (RET or RET Iw) retired."
|
||||
},
|
||||
{
|
||||
"EventName": "ex_ret_near_ret_mispred",
|
||||
"EventCode": "0xc9",
|
||||
"BriefDescription": "The number of near returns retired that were not correctly predicted by the return address predictor. Each such mispredict incurs the same penalty as a mispredicted conditional branch instruction."
|
||||
},
|
||||
{
|
||||
"EventName": "ex_ret_brn_ind_misp",
|
||||
"EventCode": "0xca",
|
||||
"BriefDescription": "Retired Indirect Branch Instructions Mispredicted."
|
||||
},
|
||||
{
|
||||
"EventName": "ex_ret_mmx_fp_instr.sse_instr",
|
||||
"EventCode": "0xcb",
|
||||
"BriefDescription": "SSE instructions (SSE, SSE2, SSE3, SSSE3, SSE4A, SSE41, SSE42, AVX).",
|
||||
"PublicDescription": "The number of MMX, SSE or x87 instructions retired. The UnitMask allows the selection of the individual classes of instructions as given in the table. Each increment represents one complete instruction. Since this event includes non-numeric instructions it is not suitable for measuring MFLOPS. SSE instructions (SSE, SSE2, SSE3, SSSE3, SSE4A, SSE41, SSE42, AVX).",
|
||||
"UMask": "0x4"
|
||||
},
|
||||
{
|
||||
"EventName": "ex_ret_mmx_fp_instr.mmx_instr",
|
||||
"EventCode": "0xcb",
|
||||
"BriefDescription": "MMX instructions.",
|
||||
"PublicDescription": "The number of MMX, SSE or x87 instructions retired. The UnitMask allows the selection of the individual classes of instructions as given in the table. Each increment represents one complete instruction. Since this event includes non-numeric instructions it is not suitable for measuring MFLOPS. MMX instructions.",
|
||||
"UMask": "0x2"
|
||||
},
|
||||
{
|
||||
"EventName": "ex_ret_mmx_fp_instr.x87_instr",
|
||||
"EventCode": "0xcb",
|
||||
"BriefDescription": "x87 instructions.",
|
||||
"PublicDescription": "The number of MMX, SSE or x87 instructions retired. The UnitMask allows the selection of the individual classes of instructions as given in the table. Each increment represents one complete instruction. Since this event includes non-numeric instructions it is not suitable for measuring MFLOPS. x87 instructions.",
|
||||
"UMask": "0x1"
|
||||
},
|
||||
{
|
||||
"EventName": "ex_ret_cond",
|
||||
"EventCode": "0xd1",
|
||||
"BriefDescription": "Retired Conditional Branch Instructions."
|
||||
},
|
||||
{
|
||||
"EventName": "ex_ret_cond_misp",
|
||||
"EventCode": "0xd2",
|
||||
"BriefDescription": "Retired Conditional Branch Instructions Mispredicted."
|
||||
},
|
||||
{
|
||||
"EventName": "ex_div_busy",
|
||||
"EventCode": "0xd3",
|
||||
"BriefDescription": "Div Cycles Busy count."
|
||||
},
|
||||
{
|
||||
"EventName": "ex_div_count",
|
||||
"EventCode": "0xd4",
|
||||
"BriefDescription": "Div Op Count."
|
||||
},
|
||||
{
|
||||
"EventName": "ex_tagged_ibs_ops.ibs_count_rollover",
|
||||
"EventCode": "0x1cf",
|
||||
"BriefDescription": "Number of times an op could not be tagged by IBS because of a previous tagged op that has not retired.",
|
||||
"PublicDescription": "Tagged IBS Ops. Number of times an op could not be tagged by IBS because of a previous tagged op that has not retired.",
|
||||
"UMask": "0x4"
|
||||
},
|
||||
{
|
||||
"EventName": "ex_tagged_ibs_ops.ibs_tagged_ops_ret",
|
||||
"EventCode": "0x1cf",
|
||||
"BriefDescription": "Number of Ops tagged by IBS that retired.",
|
||||
"PublicDescription": "Tagged IBS Ops. Number of Ops tagged by IBS that retired.",
|
||||
"UMask": "0x2"
|
||||
},
|
||||
{
|
||||
"EventName": "ex_tagged_ibs_ops.ibs_tagged_ops",
|
||||
"EventCode": "0x1cf",
|
||||
"BriefDescription": "Number of Ops tagged by IBS.",
|
||||
"PublicDescription": "Tagged IBS Ops. Number of Ops tagged by IBS.",
|
||||
"UMask": "0x1"
|
||||
},
|
||||
{
|
||||
"EventName": "ex_ret_fus_brnch_inst",
|
||||
"EventCode": "0x1d0",
|
||||
"BriefDescription": "The number of fused retired branch instructions retired per cycle. The number of events logged per cycle can vary from 0 to 3."
|
||||
}
|
||||
]
|
||||
]
|
||||
|
|
|
|||
|
|
@ -193,979 +193,4 @@
|
|||
"PublicDescription": "The number of serializing Ops retired. SSE bottom-executing uOps retired.",
|
||||
"UMask": "0x1"
|
||||
}
|
||||
][
|
||||
{
|
||||
"EventName": "fpu_pipe_assignment.dual3",
|
||||
"EventCode": "0x00",
|
||||
"BriefDescription": "Total number multi-pipe uOps assigned to Pipe 3.",
|
||||
"PublicDescription": "The number of operations (uOps) and dual-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the FPU pipelines are and may be used for workload characterization. This includes all operations performed by x87, MMXTM, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. This event is a speculative event. Since this event includes non-numeric operations it is not suitable for measuring MFLOPS. Total number multi-pipe uOps assigned to Pipe 3.",
|
||||
"UMask": "0x80"
|
||||
},
|
||||
{
|
||||
"EventName": "fpu_pipe_assignment.dual2",
|
||||
"EventCode": "0x00",
|
||||
"BriefDescription": "Total number multi-pipe uOps assigned to Pipe 2.",
|
||||
"PublicDescription": "The number of operations (uOps) and dual-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the FPU pipelines are and may be used for workload characterization. This includes all operations performed by x87, MMXTM, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. This event is a speculative event. Since this event includes non-numeric operations it is not suitable for measuring MFLOPS. Total number multi-pipe uOps assigned to Pipe 2.",
|
||||
"UMask": "0x40"
|
||||
},
|
||||
{
|
||||
"EventName": "fpu_pipe_assignment.dual1",
|
||||
"EventCode": "0x00",
|
||||
"BriefDescription": "Total number multi-pipe uOps assigned to Pipe 1.",
|
||||
"PublicDescription": "The number of operations (uOps) and dual-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the FPU pipelines are and may be used for workload characterization. This includes all operations performed by x87, MMXTM, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. This event is a speculative event. Since this event includes non-numeric operations it is not suitable for measuring MFLOPS. Total number multi-pipe uOps assigned to Pipe 1.",
|
||||
"UMask": "0x20"
|
||||
},
|
||||
{
|
||||
"EventName": "fpu_pipe_assignment.dual0",
|
||||
"EventCode": "0x00",
|
||||
"BriefDescription": "Total number multi-pipe uOps assigned to Pipe 0.",
|
||||
"PublicDescription": "The number of operations (uOps) and dual-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the FPU pipelines are and may be used for workload characterization. This includes all operations performed by x87, MMXTM, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. This event is a speculative event. Since this event includes non-numeric operations it is not suitable for measuring MFLOPS. Total number multi-pipe uOps assigned to Pipe 0.",
|
||||
"UMask": "0x10"
|
||||
},
|
||||
{
|
||||
"EventName": "fpu_pipe_assignment.total3",
|
||||
"EventCode": "0x00",
|
||||
"BriefDescription": "Total number uOps assigned to Pipe 3.",
|
||||
"PublicDescription": "The number of operations (uOps) and dual-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the FPU pipelines are and may be used for workload characterization. This includes all operations performed by x87, MMXTM, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. This event is a speculative event. Since this event includes non-numeric operations it is not suitable for measuring MFLOPS. Total number uOps assigned to Pipe 3.",
|
||||
"UMask": "0x8"
|
||||
},
|
||||
{
|
||||
"EventName": "fpu_pipe_assignment.total2",
|
||||
"EventCode": "0x00",
|
||||
"BriefDescription": "Total number uOps assigned to Pipe 2.",
|
||||
"PublicDescription": "The number of operations (uOps) and dual-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the FPU pipelines are and may be used for workload characterization. This includes all operations performed by x87, MMXTM, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. This event is a speculative event. Since this event includes non-numeric operations it is not suitable for measuring MFLOPS. Total number uOps assigned to Pipe 2.",
|
||||
"UMask": "0x4"
|
||||
},
|
||||
{
|
||||
"EventName": "fpu_pipe_assignment.total1",
|
||||
"EventCode": "0x00",
|
||||
"BriefDescription": "Total number uOps assigned to Pipe 1.",
|
||||
"PublicDescription": "The number of operations (uOps) and dual-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the FPU pipelines are and may be used for workload characterization. This includes all operations performed by x87, MMXTM, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. This event is a speculative event. Since this event includes non-numeric operations it is not suitable for measuring MFLOPS. Total number uOps assigned to Pipe 1.",
|
||||
"UMask": "0x2"
|
||||
},
|
||||
{
|
||||
"EventName": "fpu_pipe_assignment.total0",
|
||||
"EventCode": "0x00",
|
||||
"BriefDescription": "Total number uOps assigned to Pipe 0.",
|
||||
"PublicDescription": "The number of operations (uOps) and dual-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the FPU pipelines are and may be used for workload characterization. This includes all operations performed by x87, MMXTM, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. This event is a speculative event. Since this event includes non-numeric operations it is not suitable for measuring MFLOPS. Total number uOps assigned to Pipe 0.",
|
||||
"UMask": "0x1"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_sched_empty",
|
||||
"EventCode": "0x01",
|
||||
"BriefDescription": "This is a speculative event. The number of cycles in which the FPU scheduler is empty. Note that some Ops like FP loads bypass the scheduler."
|
||||
},
|
||||
{
|
||||
"EventName": "fp_retx87_fp_ops.div_sqr_r_ops",
|
||||
"EventCode": "0x02",
|
||||
"BriefDescription": "Divide and square root Ops.",
|
||||
"PublicDescription": "The number of x87 floating-point Ops that have retired. The number of events logged per cycle can vary from 0 to 8. Divide and square root Ops.",
|
||||
"UMask": "0x4"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_retx87_fp_ops.mul_ops",
|
||||
"EventCode": "0x02",
|
||||
"BriefDescription": "Multiply Ops.",
|
||||
"PublicDescription": "The number of x87 floating-point Ops that have retired. The number of events logged per cycle can vary from 0 to 8. Multiply Ops.",
|
||||
"UMask": "0x2"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_retx87_fp_ops.add_sub_ops",
|
||||
"EventCode": "0x02",
|
||||
"BriefDescription": "Add/subtract Ops.",
|
||||
"PublicDescription": "The number of x87 floating-point Ops that have retired. The number of events logged per cycle can vary from 0 to 8. Add/subtract Ops.",
|
||||
"UMask": "0x1"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_ret_sse_avx_ops.dp_mult_add_flops",
|
||||
"EventCode": "0x03",
|
||||
"BriefDescription": "Double precision multiply-add FLOPS. Multiply-add counts as 2 FLOPS.",
|
||||
"PublicDescription": "This is a retire-based event. The number of retired SSE/AVX FLOPS. The number of events logged per cycle can vary from 0 to 64. This event can count above 15. Double precision multiply-add FLOPS. Multiply-add counts as 2 FLOPS.",
|
||||
"UMask": "0x80"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_ret_sse_avx_ops.dp_div_flops",
|
||||
"EventCode": "0x03",
|
||||
"BriefDescription": "Double precision divide/square root FLOPS.",
|
||||
"PublicDescription": "This is a retire-based event. The number of retired SSE/AVX FLOPS. The number of events logged per cycle can vary from 0 to 64. This event can count above 15. Double precision divide/square root FLOPS.",
|
||||
"UMask": "0x40"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_ret_sse_avx_ops.dp_mult_flops",
|
||||
"EventCode": "0x03",
|
||||
"BriefDescription": "Double precision multiply FLOPS.",
|
||||
"PublicDescription": "This is a retire-based event. The number of retired SSE/AVX FLOPS. The number of events logged per cycle can vary from 0 to 64. This event can count above 15. Double precision multiply FLOPS.",
|
||||
"UMask": "0x20"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_ret_sse_avx_ops.dp_add_sub_flops",
|
||||
"EventCode": "0x03",
|
||||
"BriefDescription": "Double precision add/subtract FLOPS.",
|
||||
"PublicDescription": "This is a retire-based event. The number of retired SSE/AVX FLOPS. The number of events logged per cycle can vary from 0 to 64. This event can count above 15. Double precision add/subtract FLOPS.",
|
||||
"UMask": "0x10"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_ret_sse_avx_ops.sp_mult_add_flops",
|
||||
"EventCode": "0x03",
|
||||
"BriefDescription": "Single precision multiply-add FLOPS. Multiply-add counts as 2 FLOPS.",
|
||||
"PublicDescription": "This is a retire-based event. The number of retired SSE/AVX FLOPS. The number of events logged per cycle can vary from 0 to 64. This event can count above 15. Single precision multiply-add FLOPS. Multiply-add counts as 2 FLOPS.",
|
||||
"UMask": "0x8"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_ret_sse_avx_ops.sp_div_flops",
|
||||
"EventCode": "0x03",
|
||||
"BriefDescription": "Single-precision divide/square root FLOPS.",
|
||||
"PublicDescription": "This is a retire-based event. The number of retired SSE/AVX FLOPS. The number of events logged per cycle can vary from 0 to 64. This event can count above 15. Single-precision divide/square root FLOPS.",
|
||||
"UMask": "0x4"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_ret_sse_avx_ops.sp_mult_flops",
|
||||
"EventCode": "0x03",
|
||||
"BriefDescription": "Single-precision multiply FLOPS.",
|
||||
"PublicDescription": "This is a retire-based event. The number of retired SSE/AVX FLOPS. The number of events logged per cycle can vary from 0 to 64. This event can count above 15. Single-precision multiply FLOPS.",
|
||||
"UMask": "0x2"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_ret_sse_avx_ops.sp_add_sub_flops",
|
||||
"EventCode": "0x03",
|
||||
"BriefDescription": "Single-precision add/subtract FLOPS.",
|
||||
"PublicDescription": "This is a retire-based event. The number of retired SSE/AVX FLOPS. The number of events logged per cycle can vary from 0 to 64. This event can count above 15. Single-precision add/subtract FLOPS.",
|
||||
"UMask": "0x1"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_num_mov_elim_scal_op.optimized",
|
||||
"EventCode": "0x04",
|
||||
"BriefDescription": "Number of Scalar Ops optimized.",
|
||||
"PublicDescription": "This is a dispatch based speculative event, and is useful for measuring the effectiveness of the Move elimination and Scalar code optimization schemes. Number of Scalar Ops optimized.",
|
||||
"UMask": "0x8"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_num_mov_elim_scal_op.opt_potential",
|
||||
"EventCode": "0x04",
|
||||
"BriefDescription": "Number of Ops that are candidates for optimization (have Z-bit either set or pass).",
|
||||
"PublicDescription": "This is a dispatch based speculative event, and is useful for measuring the effectiveness of the Move elimination and Scalar code optimization schemes. Number of Ops that are candidates for optimization (have Z-bit either set or pass).",
|
||||
"UMask": "0x4"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_num_mov_elim_scal_op.sse_mov_ops_elim",
|
||||
"EventCode": "0x04",
|
||||
"BriefDescription": "Number of SSE Move Ops eliminated.",
|
||||
"PublicDescription": "This is a dispatch based speculative event, and is useful for measuring the effectiveness of the Move elimination and Scalar code optimization schemes. Number of SSE Move Ops eliminated.",
|
||||
"UMask": "0x2"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_num_mov_elim_scal_op.sse_mov_ops",
|
||||
"EventCode": "0x04",
|
||||
"BriefDescription": "Number of SSE Move Ops.",
|
||||
"PublicDescription": "This is a dispatch based speculative event, and is useful for measuring the effectiveness of the Move elimination and Scalar code optimization schemes. Number of SSE Move Ops.",
|
||||
"UMask": "0x1"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_retired_ser_ops.x87_ctrl_ret",
|
||||
"EventCode": "0x05",
|
||||
"BriefDescription": "x87 control word mispredict traps due to mispredictions in RC or PC, or changes in mask bits.",
|
||||
"PublicDescription": "The number of serializing Ops retired. x87 control word mispredict traps due to mispredictions in RC or PC, or changes in mask bits.",
|
||||
"UMask": "0x8"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_retired_ser_ops.x87_bot_ret",
|
||||
"EventCode": "0x05",
|
||||
"BriefDescription": "x87 bottom-executing uOps retired.",
|
||||
"PublicDescription": "The number of serializing Ops retired. x87 bottom-executing uOps retired.",
|
||||
"UMask": "0x4"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_retired_ser_ops.sse_ctrl_ret",
|
||||
"EventCode": "0x05",
|
||||
"BriefDescription": "SSE control word mispredict traps due to mispredictions in RC, FTZ or DAZ, or changes in mask bits.",
|
||||
"PublicDescription": "The number of serializing Ops retired. SSE control word mispredict traps due to mispredictions in RC, FTZ or DAZ, or changes in mask bits.",
|
||||
"UMask": "0x2"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_retired_ser_ops.sse_bot_ret",
|
||||
"EventCode": "0x05",
|
||||
"BriefDescription": "SSE bottom-executing uOps retired.",
|
||||
"PublicDescription": "The number of serializing Ops retired. SSE bottom-executing uOps retired.",
|
||||
"UMask": "0x1"
|
||||
}
|
||||
][
|
||||
{
|
||||
"EventName": "fpu_pipe_assignment.dual3",
|
||||
"EventCode": "0x00",
|
||||
"BriefDescription": "Total number multi-pipe uOps assigned to Pipe 3.",
|
||||
"PublicDescription": "The number of operations (uOps) and dual-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the FPU pipelines are and may be used for workload characterization. This includes all operations performed by x87, MMXTM, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. This event is a speculative event. Since this event includes non-numeric operations it is not suitable for measuring MFLOPS. Total number multi-pipe uOps assigned to Pipe 3.",
|
||||
"UMask": "0x80"
|
||||
},
|
||||
{
|
||||
"EventName": "fpu_pipe_assignment.dual2",
|
||||
"EventCode": "0x00",
|
||||
"BriefDescription": "Total number multi-pipe uOps assigned to Pipe 2.",
|
||||
"PublicDescription": "The number of operations (uOps) and dual-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the FPU pipelines are and may be used for workload characterization. This includes all operations performed by x87, MMXTM, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. This event is a speculative event. Since this event includes non-numeric operations it is not suitable for measuring MFLOPS. Total number multi-pipe uOps assigned to Pipe 2.",
|
||||
"UMask": "0x40"
|
||||
},
|
||||
{
|
||||
"EventName": "fpu_pipe_assignment.dual1",
|
||||
"EventCode": "0x00",
|
||||
"BriefDescription": "Total number multi-pipe uOps assigned to Pipe 1.",
|
||||
"PublicDescription": "The number of operations (uOps) and dual-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the FPU pipelines are and may be used for workload characterization. This includes all operations performed by x87, MMXTM, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. This event is a speculative event. Since this event includes non-numeric operations it is not suitable for measuring MFLOPS. Total number multi-pipe uOps assigned to Pipe 1.",
|
||||
"UMask": "0x20"
|
||||
},
|
||||
{
|
||||
"EventName": "fpu_pipe_assignment.dual0",
|
||||
"EventCode": "0x00",
|
||||
"BriefDescription": "Total number multi-pipe uOps assigned to Pipe 0.",
|
||||
"PublicDescription": "The number of operations (uOps) and dual-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the FPU pipelines are and may be used for workload characterization. This includes all operations performed by x87, MMXTM, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. This event is a speculative event. Since this event includes non-numeric operations it is not suitable for measuring MFLOPS. Total number multi-pipe uOps assigned to Pipe 0.",
|
||||
"UMask": "0x10"
|
||||
},
|
||||
{
|
||||
"EventName": "fpu_pipe_assignment.total3",
|
||||
"EventCode": "0x00",
|
||||
"BriefDescription": "Total number uOps assigned to Pipe 3.",
|
||||
"PublicDescription": "The number of operations (uOps) and dual-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the FPU pipelines are and may be used for workload characterization. This includes all operations performed by x87, MMXTM, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. This event is a speculative event. Since this event includes non-numeric operations it is not suitable for measuring MFLOPS. Total number uOps assigned to Pipe 3.",
|
||||
"UMask": "0x8"
|
||||
},
|
||||
{
|
||||
"EventName": "fpu_pipe_assignment.total2",
|
||||
"EventCode": "0x00",
|
||||
"BriefDescription": "Total number uOps assigned to Pipe 2.",
|
||||
"PublicDescription": "The number of operations (uOps) and dual-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the FPU pipelines are and may be used for workload characterization. This includes all operations performed by x87, MMXTM, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. This event is a speculative event. Since this event includes non-numeric operations it is not suitable for measuring MFLOPS. Total number uOps assigned to Pipe 2.",
|
||||
"UMask": "0x4"
|
||||
},
|
||||
{
|
||||
"EventName": "fpu_pipe_assignment.total1",
|
||||
"EventCode": "0x00",
|
||||
"BriefDescription": "Total number uOps assigned to Pipe 1.",
|
||||
"PublicDescription": "The number of operations (uOps) and dual-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the FPU pipelines are and may be used for workload characterization. This includes all operations performed by x87, MMXTM, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. This event is a speculative event. Since this event includes non-numeric operations it is not suitable for measuring MFLOPS. Total number uOps assigned to Pipe 1.",
|
||||
"UMask": "0x2"
|
||||
},
|
||||
{
|
||||
"EventName": "fpu_pipe_assignment.total0",
|
||||
"EventCode": "0x00",
|
||||
"BriefDescription": "Total number uOps assigned to Pipe 0.",
|
||||
"PublicDescription": "The number of operations (uOps) and dual-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the FPU pipelines are and may be used for workload characterization. This includes all operations performed by x87, MMXTM, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. This event is a speculative event. Since this event includes non-numeric operations it is not suitable for measuring MFLOPS. Total number uOps assigned to Pipe 0.",
|
||||
"UMask": "0x1"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_sched_empty",
|
||||
"EventCode": "0x01",
|
||||
"BriefDescription": "This is a speculative event. The number of cycles in which the FPU scheduler is empty. Note that some Ops like FP loads bypass the scheduler."
|
||||
},
|
||||
{
|
||||
"EventName": "fp_retx87_fp_ops.div_sqr_r_ops",
|
||||
"EventCode": "0x02",
|
||||
"BriefDescription": "Divide and square root Ops.",
|
||||
"PublicDescription": "The number of x87 floating-point Ops that have retired. The number of events logged per cycle can vary from 0 to 8. Divide and square root Ops.",
|
||||
"UMask": "0x4"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_retx87_fp_ops.mul_ops",
|
||||
"EventCode": "0x02",
|
||||
"BriefDescription": "Multiply Ops.",
|
||||
"PublicDescription": "The number of x87 floating-point Ops that have retired. The number of events logged per cycle can vary from 0 to 8. Multiply Ops.",
|
||||
"UMask": "0x2"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_retx87_fp_ops.add_sub_ops",
|
||||
"EventCode": "0x02",
|
||||
"BriefDescription": "Add/subtract Ops.",
|
||||
"PublicDescription": "The number of x87 floating-point Ops that have retired. The number of events logged per cycle can vary from 0 to 8. Add/subtract Ops.",
|
||||
"UMask": "0x1"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_ret_sse_avx_ops.dp_mult_add_flops",
|
||||
"EventCode": "0x03",
|
||||
"BriefDescription": "Double precision multiply-add FLOPS. Multiply-add counts as 2 FLOPS.",
|
||||
"PublicDescription": "This is a retire-based event. The number of retired SSE/AVX FLOPS. The number of events logged per cycle can vary from 0 to 64. This event can count above 15. Double precision multiply-add FLOPS. Multiply-add counts as 2 FLOPS.",
|
||||
"UMask": "0x80"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_ret_sse_avx_ops.dp_div_flops",
|
||||
"EventCode": "0x03",
|
||||
"BriefDescription": "Double precision divide/square root FLOPS.",
|
||||
"PublicDescription": "This is a retire-based event. The number of retired SSE/AVX FLOPS. The number of events logged per cycle can vary from 0 to 64. This event can count above 15. Double precision divide/square root FLOPS.",
|
||||
"UMask": "0x40"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_ret_sse_avx_ops.dp_mult_flops",
|
||||
"EventCode": "0x03",
|
||||
"BriefDescription": "Double precision multiply FLOPS.",
|
||||
"PublicDescription": "This is a retire-based event. The number of retired SSE/AVX FLOPS. The number of events logged per cycle can vary from 0 to 64. This event can count above 15. Double precision multiply FLOPS.",
|
||||
"UMask": "0x20"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_ret_sse_avx_ops.dp_add_sub_flops",
|
||||
"EventCode": "0x03",
|
||||
"BriefDescription": "Double precision add/subtract FLOPS.",
|
||||
"PublicDescription": "This is a retire-based event. The number of retired SSE/AVX FLOPS. The number of events logged per cycle can vary from 0 to 64. This event can count above 15. Double precision add/subtract FLOPS.",
|
||||
"UMask": "0x10"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_ret_sse_avx_ops.sp_mult_add_flops",
|
||||
"EventCode": "0x03",
|
||||
"BriefDescription": "Single precision multiply-add FLOPS. Multiply-add counts as 2 FLOPS.",
|
||||
"PublicDescription": "This is a retire-based event. The number of retired SSE/AVX FLOPS. The number of events logged per cycle can vary from 0 to 64. This event can count above 15. Single precision multiply-add FLOPS. Multiply-add counts as 2 FLOPS.",
|
||||
"UMask": "0x8"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_ret_sse_avx_ops.sp_div_flops",
|
||||
"EventCode": "0x03",
|
||||
"BriefDescription": "Single-precision divide/square root FLOPS.",
|
||||
"PublicDescription": "This is a retire-based event. The number of retired SSE/AVX FLOPS. The number of events logged per cycle can vary from 0 to 64. This event can count above 15. Single-precision divide/square root FLOPS.",
|
||||
"UMask": "0x4"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_ret_sse_avx_ops.sp_mult_flops",
|
||||
"EventCode": "0x03",
|
||||
"BriefDescription": "Single-precision multiply FLOPS.",
|
||||
"PublicDescription": "This is a retire-based event. The number of retired SSE/AVX FLOPS. The number of events logged per cycle can vary from 0 to 64. This event can count above 15. Single-precision multiply FLOPS.",
|
||||
"UMask": "0x2"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_ret_sse_avx_ops.sp_add_sub_flops",
|
||||
"EventCode": "0x03",
|
||||
"BriefDescription": "Single-precision add/subtract FLOPS.",
|
||||
"PublicDescription": "This is a retire-based event. The number of retired SSE/AVX FLOPS. The number of events logged per cycle can vary from 0 to 64. This event can count above 15. Single-precision add/subtract FLOPS.",
|
||||
"UMask": "0x1"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_num_mov_elim_scal_op.optimized",
|
||||
"EventCode": "0x04",
|
||||
"BriefDescription": "Number of Scalar Ops optimized.",
|
||||
"PublicDescription": "This is a dispatch based speculative event, and is useful for measuring the effectiveness of the Move elimination and Scalar code optimization schemes. Number of Scalar Ops optimized.",
|
||||
"UMask": "0x8"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_num_mov_elim_scal_op.opt_potential",
|
||||
"EventCode": "0x04",
|
||||
"BriefDescription": "Number of Ops that are candidates for optimization (have Z-bit either set or pass).",
|
||||
"PublicDescription": "This is a dispatch based speculative event, and is useful for measuring the effectiveness of the Move elimination and Scalar code optimization schemes. Number of Ops that are candidates for optimization (have Z-bit either set or pass).",
|
||||
"UMask": "0x4"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_num_mov_elim_scal_op.sse_mov_ops_elim",
|
||||
"EventCode": "0x04",
|
||||
"BriefDescription": "Number of SSE Move Ops eliminated.",
|
||||
"PublicDescription": "This is a dispatch based speculative event, and is useful for measuring the effectiveness of the Move elimination and Scalar code optimization schemes. Number of SSE Move Ops eliminated.",
|
||||
"UMask": "0x2"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_num_mov_elim_scal_op.sse_mov_ops",
|
||||
"EventCode": "0x04",
|
||||
"BriefDescription": "Number of SSE Move Ops.",
|
||||
"PublicDescription": "This is a dispatch based speculative event, and is useful for measuring the effectiveness of the Move elimination and Scalar code optimization schemes. Number of SSE Move Ops.",
|
||||
"UMask": "0x1"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_retired_ser_ops.x87_ctrl_ret",
|
||||
"EventCode": "0x05",
|
||||
"BriefDescription": "x87 control word mispredict traps due to mispredictions in RC or PC, or changes in mask bits.",
|
||||
"PublicDescription": "The number of serializing Ops retired. x87 control word mispredict traps due to mispredictions in RC or PC, or changes in mask bits.",
|
||||
"UMask": "0x8"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_retired_ser_ops.x87_bot_ret",
|
||||
"EventCode": "0x05",
|
||||
"BriefDescription": "x87 bottom-executing uOps retired.",
|
||||
"PublicDescription": "The number of serializing Ops retired. x87 bottom-executing uOps retired.",
|
||||
"UMask": "0x4"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_retired_ser_ops.sse_ctrl_ret",
|
||||
"EventCode": "0x05",
|
||||
"BriefDescription": "SSE control word mispredict traps due to mispredictions in RC, FTZ or DAZ, or changes in mask bits.",
|
||||
"PublicDescription": "The number of serializing Ops retired. SSE control word mispredict traps due to mispredictions in RC, FTZ or DAZ, or changes in mask bits.",
|
||||
"UMask": "0x2"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_retired_ser_ops.sse_bot_ret",
|
||||
"EventCode": "0x05",
|
||||
"BriefDescription": "SSE bottom-executing uOps retired.",
|
||||
"PublicDescription": "The number of serializing Ops retired. SSE bottom-executing uOps retired.",
|
||||
"UMask": "0x1"
|
||||
}
|
||||
][
|
||||
{
|
||||
"EventName": "fpu_pipe_assignment.dual3",
|
||||
"EventCode": "0x00",
|
||||
"BriefDescription": "Total number multi-pipe uOps assigned to Pipe 3.",
|
||||
"PublicDescription": "The number of operations (uOps) and dual-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the FPU pipelines are and may be used for workload characterization. This includes all operations performed by x87, MMXTM, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. This event is a speculative event. Since this event includes non-numeric operations it is not suitable for measuring MFLOPS. Total number multi-pipe uOps assigned to Pipe 3.",
|
||||
"UMask": "0x80"
|
||||
},
|
||||
{
|
||||
"EventName": "fpu_pipe_assignment.dual2",
|
||||
"EventCode": "0x00",
|
||||
"BriefDescription": "Total number multi-pipe uOps assigned to Pipe 2.",
|
||||
"PublicDescription": "The number of operations (uOps) and dual-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the FPU pipelines are and may be used for workload characterization. This includes all operations performed by x87, MMXTM, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. This event is a speculative event. Since this event includes non-numeric operations it is not suitable for measuring MFLOPS. Total number multi-pipe uOps assigned to Pipe 2.",
|
||||
"UMask": "0x40"
|
||||
},
|
||||
{
|
||||
"EventName": "fpu_pipe_assignment.dual1",
|
||||
"EventCode": "0x00",
|
||||
"BriefDescription": "Total number multi-pipe uOps assigned to Pipe 1.",
|
||||
"PublicDescription": "The number of operations (uOps) and dual-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the FPU pipelines are and may be used for workload characterization. This includes all operations performed by x87, MMXTM, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. This event is a speculative event. Since this event includes non-numeric operations it is not suitable for measuring MFLOPS. Total number multi-pipe uOps assigned to Pipe 1.",
|
||||
"UMask": "0x20"
|
||||
},
|
||||
{
|
||||
"EventName": "fpu_pipe_assignment.dual0",
|
||||
"EventCode": "0x00",
|
||||
"BriefDescription": "Total number multi-pipe uOps assigned to Pipe 0.",
|
||||
"PublicDescription": "The number of operations (uOps) and dual-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the FPU pipelines are and may be used for workload characterization. This includes all operations performed by x87, MMXTM, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. This event is a speculative event. Since this event includes non-numeric operations it is not suitable for measuring MFLOPS. Total number multi-pipe uOps assigned to Pipe 0.",
|
||||
"UMask": "0x10"
|
||||
},
|
||||
{
|
||||
"EventName": "fpu_pipe_assignment.total3",
|
||||
"EventCode": "0x00",
|
||||
"BriefDescription": "Total number uOps assigned to Pipe 3.",
|
||||
"PublicDescription": "The number of operations (uOps) and dual-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the FPU pipelines are and may be used for workload characterization. This includes all operations performed by x87, MMXTM, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. This event is a speculative event. Since this event includes non-numeric operations it is not suitable for measuring MFLOPS. Total number uOps assigned to Pipe 3.",
|
||||
"UMask": "0x8"
|
||||
},
|
||||
{
|
||||
"EventName": "fpu_pipe_assignment.total2",
|
||||
"EventCode": "0x00",
|
||||
"BriefDescription": "Total number uOps assigned to Pipe 2.",
|
||||
"PublicDescription": "The number of operations (uOps) and dual-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the FPU pipelines are and may be used for workload characterization. This includes all operations performed by x87, MMXTM, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. This event is a speculative event. Since this event includes non-numeric operations it is not suitable for measuring MFLOPS. Total number uOps assigned to Pipe 2.",
|
||||
"UMask": "0x4"
|
||||
},
|
||||
{
|
||||
"EventName": "fpu_pipe_assignment.total1",
|
||||
"EventCode": "0x00",
|
||||
"BriefDescription": "Total number uOps assigned to Pipe 1.",
|
||||
"PublicDescription": "The number of operations (uOps) and dual-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the FPU pipelines are and may be used for workload characterization. This includes all operations performed by x87, MMXTM, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. This event is a speculative event. Since this event includes non-numeric operations it is not suitable for measuring MFLOPS. Total number uOps assigned to Pipe 1.",
|
||||
"UMask": "0x2"
|
||||
},
|
||||
{
|
||||
"EventName": "fpu_pipe_assignment.total0",
|
||||
"EventCode": "0x00",
|
||||
"BriefDescription": "Total number uOps assigned to Pipe 0.",
|
||||
"PublicDescription": "The number of operations (uOps) and dual-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the FPU pipelines are and may be used for workload characterization. This includes all operations performed by x87, MMXTM, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. This event is a speculative event. Since this event includes non-numeric operations it is not suitable for measuring MFLOPS. Total number uOps assigned to Pipe 0.",
|
||||
"UMask": "0x1"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_sched_empty",
|
||||
"EventCode": "0x01",
|
||||
"BriefDescription": "This is a speculative event. The number of cycles in which the FPU scheduler is empty. Note that some Ops like FP loads bypass the scheduler."
|
||||
},
|
||||
{
|
||||
"EventName": "fp_retx87_fp_ops.div_sqr_r_ops",
|
||||
"EventCode": "0x02",
|
||||
"BriefDescription": "Divide and square root Ops.",
|
||||
"PublicDescription": "The number of x87 floating-point Ops that have retired. The number of events logged per cycle can vary from 0 to 8. Divide and square root Ops.",
|
||||
"UMask": "0x4"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_retx87_fp_ops.mul_ops",
|
||||
"EventCode": "0x02",
|
||||
"BriefDescription": "Multiply Ops.",
|
||||
"PublicDescription": "The number of x87 floating-point Ops that have retired. The number of events logged per cycle can vary from 0 to 8. Multiply Ops.",
|
||||
"UMask": "0x2"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_retx87_fp_ops.add_sub_ops",
|
||||
"EventCode": "0x02",
|
||||
"BriefDescription": "Add/subtract Ops.",
|
||||
"PublicDescription": "The number of x87 floating-point Ops that have retired. The number of events logged per cycle can vary from 0 to 8. Add/subtract Ops.",
|
||||
"UMask": "0x1"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_ret_sse_avx_ops.dp_mult_add_flops",
|
||||
"EventCode": "0x03",
|
||||
"BriefDescription": "Double precision multiply-add FLOPS. Multiply-add counts as 2 FLOPS.",
|
||||
"PublicDescription": "This is a retire-based event. The number of retired SSE/AVX FLOPS. The number of events logged per cycle can vary from 0 to 64. This event can count above 15. Double precision multiply-add FLOPS. Multiply-add counts as 2 FLOPS.",
|
||||
"UMask": "0x80"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_ret_sse_avx_ops.dp_div_flops",
|
||||
"EventCode": "0x03",
|
||||
"BriefDescription": "Double precision divide/square root FLOPS.",
|
||||
"PublicDescription": "This is a retire-based event. The number of retired SSE/AVX FLOPS. The number of events logged per cycle can vary from 0 to 64. This event can count above 15. Double precision divide/square root FLOPS.",
|
||||
"UMask": "0x40"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_ret_sse_avx_ops.dp_mult_flops",
|
||||
"EventCode": "0x03",
|
||||
"BriefDescription": "Double precision multiply FLOPS.",
|
||||
"PublicDescription": "This is a retire-based event. The number of retired SSE/AVX FLOPS. The number of events logged per cycle can vary from 0 to 64. This event can count above 15. Double precision multiply FLOPS.",
|
||||
"UMask": "0x20"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_ret_sse_avx_ops.dp_add_sub_flops",
|
||||
"EventCode": "0x03",
|
||||
"BriefDescription": "Double precision add/subtract FLOPS.",
|
||||
"PublicDescription": "This is a retire-based event. The number of retired SSE/AVX FLOPS. The number of events logged per cycle can vary from 0 to 64. This event can count above 15. Double precision add/subtract FLOPS.",
|
||||
"UMask": "0x10"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_ret_sse_avx_ops.sp_mult_add_flops",
|
||||
"EventCode": "0x03",
|
||||
"BriefDescription": "Single precision multiply-add FLOPS. Multiply-add counts as 2 FLOPS.",
|
||||
"PublicDescription": "This is a retire-based event. The number of retired SSE/AVX FLOPS. The number of events logged per cycle can vary from 0 to 64. This event can count above 15. Single precision multiply-add FLOPS. Multiply-add counts as 2 FLOPS.",
|
||||
"UMask": "0x8"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_ret_sse_avx_ops.sp_div_flops",
|
||||
"EventCode": "0x03",
|
||||
"BriefDescription": "Single-precision divide/square root FLOPS.",
|
||||
"PublicDescription": "This is a retire-based event. The number of retired SSE/AVX FLOPS. The number of events logged per cycle can vary from 0 to 64. This event can count above 15. Single-precision divide/square root FLOPS.",
|
||||
"UMask": "0x4"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_ret_sse_avx_ops.sp_mult_flops",
|
||||
"EventCode": "0x03",
|
||||
"BriefDescription": "Single-precision multiply FLOPS.",
|
||||
"PublicDescription": "This is a retire-based event. The number of retired SSE/AVX FLOPS. The number of events logged per cycle can vary from 0 to 64. This event can count above 15. Single-precision multiply FLOPS.",
|
||||
"UMask": "0x2"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_ret_sse_avx_ops.sp_add_sub_flops",
|
||||
"EventCode": "0x03",
|
||||
"BriefDescription": "Single-precision add/subtract FLOPS.",
|
||||
"PublicDescription": "This is a retire-based event. The number of retired SSE/AVX FLOPS. The number of events logged per cycle can vary from 0 to 64. This event can count above 15. Single-precision add/subtract FLOPS.",
|
||||
"UMask": "0x1"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_num_mov_elim_scal_op.optimized",
|
||||
"EventCode": "0x04",
|
||||
"BriefDescription": "Number of Scalar Ops optimized.",
|
||||
"PublicDescription": "This is a dispatch based speculative event, and is useful for measuring the effectiveness of the Move elimination and Scalar code optimization schemes. Number of Scalar Ops optimized.",
|
||||
"UMask": "0x8"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_num_mov_elim_scal_op.opt_potential",
|
||||
"EventCode": "0x04",
|
||||
"BriefDescription": "Number of Ops that are candidates for optimization (have Z-bit either set or pass).",
|
||||
"PublicDescription": "This is a dispatch based speculative event, and is useful for measuring the effectiveness of the Move elimination and Scalar code optimization schemes. Number of Ops that are candidates for optimization (have Z-bit either set or pass).",
|
||||
"UMask": "0x4"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_num_mov_elim_scal_op.sse_mov_ops_elim",
|
||||
"EventCode": "0x04",
|
||||
"BriefDescription": "Number of SSE Move Ops eliminated.",
|
||||
"PublicDescription": "This is a dispatch based speculative event, and is useful for measuring the effectiveness of the Move elimination and Scalar code optimization schemes. Number of SSE Move Ops eliminated.",
|
||||
"UMask": "0x2"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_num_mov_elim_scal_op.sse_mov_ops",
|
||||
"EventCode": "0x04",
|
||||
"BriefDescription": "Number of SSE Move Ops.",
|
||||
"PublicDescription": "This is a dispatch based speculative event, and is useful for measuring the effectiveness of the Move elimination and Scalar code optimization schemes. Number of SSE Move Ops.",
|
||||
"UMask": "0x1"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_retired_ser_ops.x87_ctrl_ret",
|
||||
"EventCode": "0x05",
|
||||
"BriefDescription": "x87 control word mispredict traps due to mispredictions in RC or PC, or changes in mask bits.",
|
||||
"PublicDescription": "The number of serializing Ops retired. x87 control word mispredict traps due to mispredictions in RC or PC, or changes in mask bits.",
|
||||
"UMask": "0x8"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_retired_ser_ops.x87_bot_ret",
|
||||
"EventCode": "0x05",
|
||||
"BriefDescription": "x87 bottom-executing uOps retired.",
|
||||
"PublicDescription": "The number of serializing Ops retired. x87 bottom-executing uOps retired.",
|
||||
"UMask": "0x4"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_retired_ser_ops.sse_ctrl_ret",
|
||||
"EventCode": "0x05",
|
||||
"BriefDescription": "SSE control word mispredict traps due to mispredictions in RC, FTZ or DAZ, or changes in mask bits.",
|
||||
"PublicDescription": "The number of serializing Ops retired. SSE control word mispredict traps due to mispredictions in RC, FTZ or DAZ, or changes in mask bits.",
|
||||
"UMask": "0x2"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_retired_ser_ops.sse_bot_ret",
|
||||
"EventCode": "0x05",
|
||||
"BriefDescription": "SSE bottom-executing uOps retired.",
|
||||
"PublicDescription": "The number of serializing Ops retired. SSE bottom-executing uOps retired.",
|
||||
"UMask": "0x1"
|
||||
}
|
||||
][
|
||||
{
|
||||
"EventName": "fpu_pipe_assignment.dual3",
|
||||
"EventCode": "0x00",
|
||||
"BriefDescription": "Total number multi-pipe uOps assigned to Pipe 3.",
|
||||
"PublicDescription": "The number of operations (uOps) and dual-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the FPU pipelines are and may be used for workload characterization. This includes all operations performed by x87, MMXTM, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. This event is a speculative event. Since this event includes non-numeric operations it is not suitable for measuring MFLOPS. Total number multi-pipe uOps assigned to Pipe 3.",
|
||||
"UMask": "0x80"
|
||||
},
|
||||
{
|
||||
"EventName": "fpu_pipe_assignment.dual2",
|
||||
"EventCode": "0x00",
|
||||
"BriefDescription": "Total number multi-pipe uOps assigned to Pipe 2.",
|
||||
"PublicDescription": "The number of operations (uOps) and dual-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the FPU pipelines are and may be used for workload characterization. This includes all operations performed by x87, MMXTM, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. This event is a speculative event. Since this event includes non-numeric operations it is not suitable for measuring MFLOPS. Total number multi-pipe uOps assigned to Pipe 2.",
|
||||
"UMask": "0x40"
|
||||
},
|
||||
{
|
||||
"EventName": "fpu_pipe_assignment.dual1",
|
||||
"EventCode": "0x00",
|
||||
"BriefDescription": "Total number multi-pipe uOps assigned to Pipe 1.",
|
||||
"PublicDescription": "The number of operations (uOps) and dual-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the FPU pipelines are and may be used for workload characterization. This includes all operations performed by x87, MMXTM, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. This event is a speculative event. Since this event includes non-numeric operations it is not suitable for measuring MFLOPS. Total number multi-pipe uOps assigned to Pipe 1.",
|
||||
"UMask": "0x20"
|
||||
},
|
||||
{
|
||||
"EventName": "fpu_pipe_assignment.dual0",
|
||||
"EventCode": "0x00",
|
||||
"BriefDescription": "Total number multi-pipe uOps assigned to Pipe 0.",
|
||||
"PublicDescription": "The number of operations (uOps) and dual-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the FPU pipelines are and may be used for workload characterization. This includes all operations performed by x87, MMXTM, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. This event is a speculative event. Since this event includes non-numeric operations it is not suitable for measuring MFLOPS. Total number multi-pipe uOps assigned to Pipe 0.",
|
||||
"UMask": "0x10"
|
||||
},
|
||||
{
|
||||
"EventName": "fpu_pipe_assignment.total3",
|
||||
"EventCode": "0x00",
|
||||
"BriefDescription": "Total number uOps assigned to Pipe 3.",
|
||||
"PublicDescription": "The number of operations (uOps) and dual-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the FPU pipelines are and may be used for workload characterization. This includes all operations performed by x87, MMXTM, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. This event is a speculative event. Since this event includes non-numeric operations it is not suitable for measuring MFLOPS. Total number uOps assigned to Pipe 3.",
|
||||
"UMask": "0x8"
|
||||
},
|
||||
{
|
||||
"EventName": "fpu_pipe_assignment.total2",
|
||||
"EventCode": "0x00",
|
||||
"BriefDescription": "Total number uOps assigned to Pipe 2.",
|
||||
"PublicDescription": "The number of operations (uOps) and dual-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the FPU pipelines are and may be used for workload characterization. This includes all operations performed by x87, MMXTM, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. This event is a speculative event. Since this event includes non-numeric operations it is not suitable for measuring MFLOPS. Total number uOps assigned to Pipe 2.",
|
||||
"UMask": "0x4"
|
||||
},
|
||||
{
|
||||
"EventName": "fpu_pipe_assignment.total1",
|
||||
"EventCode": "0x00",
|
||||
"BriefDescription": "Total number uOps assigned to Pipe 1.",
|
||||
"PublicDescription": "The number of operations (uOps) and dual-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the FPU pipelines are and may be used for workload characterization. This includes all operations performed by x87, MMXTM, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. This event is a speculative event. Since this event includes non-numeric operations it is not suitable for measuring MFLOPS. Total number uOps assigned to Pipe 1.",
|
||||
"UMask": "0x2"
|
||||
},
|
||||
{
|
||||
"EventName": "fpu_pipe_assignment.total0",
|
||||
"EventCode": "0x00",
|
||||
"BriefDescription": "Total number uOps assigned to Pipe 0.",
|
||||
"PublicDescription": "The number of operations (uOps) and dual-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the FPU pipelines are and may be used for workload characterization. This includes all operations performed by x87, MMXTM, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. This event is a speculative event. Since this event includes non-numeric operations it is not suitable for measuring MFLOPS. Total number uOps assigned to Pipe 0.",
|
||||
"UMask": "0x1"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_sched_empty",
|
||||
"EventCode": "0x01",
|
||||
"BriefDescription": "This is a speculative event. The number of cycles in which the FPU scheduler is empty. Note that some Ops like FP loads bypass the scheduler."
|
||||
},
|
||||
{
|
||||
"EventName": "fp_retx87_fp_ops.div_sqr_r_ops",
|
||||
"EventCode": "0x02",
|
||||
"BriefDescription": "Divide and square root Ops.",
|
||||
"PublicDescription": "The number of x87 floating-point Ops that have retired. The number of events logged per cycle can vary from 0 to 8. Divide and square root Ops.",
|
||||
"UMask": "0x4"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_retx87_fp_ops.mul_ops",
|
||||
"EventCode": "0x02",
|
||||
"BriefDescription": "Multiply Ops.",
|
||||
"PublicDescription": "The number of x87 floating-point Ops that have retired. The number of events logged per cycle can vary from 0 to 8. Multiply Ops.",
|
||||
"UMask": "0x2"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_retx87_fp_ops.add_sub_ops",
|
||||
"EventCode": "0x02",
|
||||
"BriefDescription": "Add/subtract Ops.",
|
||||
"PublicDescription": "The number of x87 floating-point Ops that have retired. The number of events logged per cycle can vary from 0 to 8. Add/subtract Ops.",
|
||||
"UMask": "0x1"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_ret_sse_avx_ops.dp_mult_add_flops",
|
||||
"EventCode": "0x03",
|
||||
"BriefDescription": "Double precision multiply-add FLOPS. Multiply-add counts as 2 FLOPS.",
|
||||
"PublicDescription": "This is a retire-based event. The number of retired SSE/AVX FLOPS. The number of events logged per cycle can vary from 0 to 64. This event can count above 15. Double precision multiply-add FLOPS. Multiply-add counts as 2 FLOPS.",
|
||||
"UMask": "0x80"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_ret_sse_avx_ops.dp_div_flops",
|
||||
"EventCode": "0x03",
|
||||
"BriefDescription": "Double precision divide/square root FLOPS.",
|
||||
"PublicDescription": "This is a retire-based event. The number of retired SSE/AVX FLOPS. The number of events logged per cycle can vary from 0 to 64. This event can count above 15. Double precision divide/square root FLOPS.",
|
||||
"UMask": "0x40"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_ret_sse_avx_ops.dp_mult_flops",
|
||||
"EventCode": "0x03",
|
||||
"BriefDescription": "Double precision multiply FLOPS.",
|
||||
"PublicDescription": "This is a retire-based event. The number of retired SSE/AVX FLOPS. The number of events logged per cycle can vary from 0 to 64. This event can count above 15. Double precision multiply FLOPS.",
|
||||
"UMask": "0x20"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_ret_sse_avx_ops.dp_add_sub_flops",
|
||||
"EventCode": "0x03",
|
||||
"BriefDescription": "Double precision add/subtract FLOPS.",
|
||||
"PublicDescription": "This is a retire-based event. The number of retired SSE/AVX FLOPS. The number of events logged per cycle can vary from 0 to 64. This event can count above 15. Double precision add/subtract FLOPS.",
|
||||
"UMask": "0x10"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_ret_sse_avx_ops.sp_mult_add_flops",
|
||||
"EventCode": "0x03",
|
||||
"BriefDescription": "Single precision multiply-add FLOPS. Multiply-add counts as 2 FLOPS.",
|
||||
"PublicDescription": "This is a retire-based event. The number of retired SSE/AVX FLOPS. The number of events logged per cycle can vary from 0 to 64. This event can count above 15. Single precision multiply-add FLOPS. Multiply-add counts as 2 FLOPS.",
|
||||
"UMask": "0x8"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_ret_sse_avx_ops.sp_div_flops",
|
||||
"EventCode": "0x03",
|
||||
"BriefDescription": "Single-precision divide/square root FLOPS.",
|
||||
"PublicDescription": "This is a retire-based event. The number of retired SSE/AVX FLOPS. The number of events logged per cycle can vary from 0 to 64. This event can count above 15. Single-precision divide/square root FLOPS.",
|
||||
"UMask": "0x4"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_ret_sse_avx_ops.sp_mult_flops",
|
||||
"EventCode": "0x03",
|
||||
"BriefDescription": "Single-precision multiply FLOPS.",
|
||||
"PublicDescription": "This is a retire-based event. The number of retired SSE/AVX FLOPS. The number of events logged per cycle can vary from 0 to 64. This event can count above 15. Single-precision multiply FLOPS.",
|
||||
"UMask": "0x2"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_ret_sse_avx_ops.sp_add_sub_flops",
|
||||
"EventCode": "0x03",
|
||||
"BriefDescription": "Single-precision add/subtract FLOPS.",
|
||||
"PublicDescription": "This is a retire-based event. The number of retired SSE/AVX FLOPS. The number of events logged per cycle can vary from 0 to 64. This event can count above 15. Single-precision add/subtract FLOPS.",
|
||||
"UMask": "0x1"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_num_mov_elim_scal_op.optimized",
|
||||
"EventCode": "0x04",
|
||||
"BriefDescription": "Number of Scalar Ops optimized.",
|
||||
"PublicDescription": "This is a dispatch based speculative event, and is useful for measuring the effectiveness of the Move elimination and Scalar code optimization schemes. Number of Scalar Ops optimized.",
|
||||
"UMask": "0x8"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_num_mov_elim_scal_op.opt_potential",
|
||||
"EventCode": "0x04",
|
||||
"BriefDescription": "Number of Ops that are candidates for optimization (have Z-bit either set or pass).",
|
||||
"PublicDescription": "This is a dispatch based speculative event, and is useful for measuring the effectiveness of the Move elimination and Scalar code optimization schemes. Number of Ops that are candidates for optimization (have Z-bit either set or pass).",
|
||||
"UMask": "0x4"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_num_mov_elim_scal_op.sse_mov_ops_elim",
|
||||
"EventCode": "0x04",
|
||||
"BriefDescription": "Number of SSE Move Ops eliminated.",
|
||||
"PublicDescription": "This is a dispatch based speculative event, and is useful for measuring the effectiveness of the Move elimination and Scalar code optimization schemes. Number of SSE Move Ops eliminated.",
|
||||
"UMask": "0x2"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_num_mov_elim_scal_op.sse_mov_ops",
|
||||
"EventCode": "0x04",
|
||||
"BriefDescription": "Number of SSE Move Ops.",
|
||||
"PublicDescription": "This is a dispatch based speculative event, and is useful for measuring the effectiveness of the Move elimination and Scalar code optimization schemes. Number of SSE Move Ops.",
|
||||
"UMask": "0x1"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_retired_ser_ops.x87_ctrl_ret",
|
||||
"EventCode": "0x05",
|
||||
"BriefDescription": "x87 control word mispredict traps due to mispredictions in RC or PC, or changes in mask bits.",
|
||||
"PublicDescription": "The number of serializing Ops retired. x87 control word mispredict traps due to mispredictions in RC or PC, or changes in mask bits.",
|
||||
"UMask": "0x8"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_retired_ser_ops.x87_bot_ret",
|
||||
"EventCode": "0x05",
|
||||
"BriefDescription": "x87 bottom-executing uOps retired.",
|
||||
"PublicDescription": "The number of serializing Ops retired. x87 bottom-executing uOps retired.",
|
||||
"UMask": "0x4"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_retired_ser_ops.sse_ctrl_ret",
|
||||
"EventCode": "0x05",
|
||||
"BriefDescription": "SSE control word mispredict traps due to mispredictions in RC, FTZ or DAZ, or changes in mask bits.",
|
||||
"PublicDescription": "The number of serializing Ops retired. SSE control word mispredict traps due to mispredictions in RC, FTZ or DAZ, or changes in mask bits.",
|
||||
"UMask": "0x2"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_retired_ser_ops.sse_bot_ret",
|
||||
"EventCode": "0x05",
|
||||
"BriefDescription": "SSE bottom-executing uOps retired.",
|
||||
"PublicDescription": "The number of serializing Ops retired. SSE bottom-executing uOps retired.",
|
||||
"UMask": "0x1"
|
||||
}
|
||||
][
|
||||
{
|
||||
"EventName": "fpu_pipe_assignment.dual3",
|
||||
"EventCode": "0x00",
|
||||
"BriefDescription": "Total number multi-pipe uOps assigned to Pipe 3.",
|
||||
"PublicDescription": "The number of operations (uOps) and dual-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the FPU pipelines are and may be used for workload characterization. This includes all operations performed by x87, MMXTM, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. This event is a speculative event. Since this event includes non-numeric operations it is not suitable for measuring MFLOPS. Total number multi-pipe uOps assigned to Pipe 3.",
|
||||
"UMask": "0x80"
|
||||
},
|
||||
{
|
||||
"EventName": "fpu_pipe_assignment.dual2",
|
||||
"EventCode": "0x00",
|
||||
"BriefDescription": "Total number multi-pipe uOps assigned to Pipe 2.",
|
||||
"PublicDescription": "The number of operations (uOps) and dual-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the FPU pipelines are and may be used for workload characterization. This includes all operations performed by x87, MMXTM, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. This event is a speculative event. Since this event includes non-numeric operations it is not suitable for measuring MFLOPS. Total number multi-pipe uOps assigned to Pipe 2.",
|
||||
"UMask": "0x40"
|
||||
},
|
||||
{
|
||||
"EventName": "fpu_pipe_assignment.dual1",
|
||||
"EventCode": "0x00",
|
||||
"BriefDescription": "Total number multi-pipe uOps assigned to Pipe 1.",
|
||||
"PublicDescription": "The number of operations (uOps) and dual-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the FPU pipelines are and may be used for workload characterization. This includes all operations performed by x87, MMXTM, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. This event is a speculative event. Since this event includes non-numeric operations it is not suitable for measuring MFLOPS. Total number multi-pipe uOps assigned to Pipe 1.",
|
||||
"UMask": "0x20"
|
||||
},
|
||||
{
|
||||
"EventName": "fpu_pipe_assignment.dual0",
|
||||
"EventCode": "0x00",
|
||||
"BriefDescription": "Total number multi-pipe uOps assigned to Pipe 0.",
|
||||
"PublicDescription": "The number of operations (uOps) and dual-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the FPU pipelines are and may be used for workload characterization. This includes all operations performed by x87, MMXTM, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. This event is a speculative event. Since this event includes non-numeric operations it is not suitable for measuring MFLOPS. Total number multi-pipe uOps assigned to Pipe 0.",
|
||||
"UMask": "0x10"
|
||||
},
|
||||
{
|
||||
"EventName": "fpu_pipe_assignment.total3",
|
||||
"EventCode": "0x00",
|
||||
"BriefDescription": "Total number uOps assigned to Pipe 3.",
|
||||
"PublicDescription": "The number of operations (uOps) and dual-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the FPU pipelines are and may be used for workload characterization. This includes all operations performed by x87, MMXTM, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. This event is a speculative event. Since this event includes non-numeric operations it is not suitable for measuring MFLOPS. Total number uOps assigned to Pipe 3.",
|
||||
"UMask": "0x8"
|
||||
},
|
||||
{
|
||||
"EventName": "fpu_pipe_assignment.total2",
|
||||
"EventCode": "0x00",
|
||||
"BriefDescription": "Total number uOps assigned to Pipe 2.",
|
||||
"PublicDescription": "The number of operations (uOps) and dual-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the FPU pipelines are and may be used for workload characterization. This includes all operations performed by x87, MMXTM, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. This event is a speculative event. Since this event includes non-numeric operations it is not suitable for measuring MFLOPS. Total number uOps assigned to Pipe 2.",
|
||||
"UMask": "0x4"
|
||||
},
|
||||
{
|
||||
"EventName": "fpu_pipe_assignment.total1",
|
||||
"EventCode": "0x00",
|
||||
"BriefDescription": "Total number uOps assigned to Pipe 1.",
|
||||
"PublicDescription": "The number of operations (uOps) and dual-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the FPU pipelines are and may be used for workload characterization. This includes all operations performed by x87, MMXTM, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. This event is a speculative event. Since this event includes non-numeric operations it is not suitable for measuring MFLOPS. Total number uOps assigned to Pipe 1.",
|
||||
"UMask": "0x2"
|
||||
},
|
||||
{
|
||||
"EventName": "fpu_pipe_assignment.total0",
|
||||
"EventCode": "0x00",
|
||||
"BriefDescription": "Total number uOps assigned to Pipe 0.",
|
||||
"PublicDescription": "The number of operations (uOps) and dual-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the FPU pipelines are and may be used for workload characterization. This includes all operations performed by x87, MMXTM, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. This event is a speculative event. Since this event includes non-numeric operations it is not suitable for measuring MFLOPS. Total number uOps assigned to Pipe 0.",
|
||||
"UMask": "0x1"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_sched_empty",
|
||||
"EventCode": "0x01",
|
||||
"BriefDescription": "This is a speculative event. The number of cycles in which the FPU scheduler is empty. Note that some Ops like FP loads bypass the scheduler."
|
||||
},
|
||||
{
|
||||
"EventName": "fp_retx87_fp_ops.div_sqr_r_ops",
|
||||
"EventCode": "0x02",
|
||||
"BriefDescription": "Divide and square root Ops.",
|
||||
"PublicDescription": "The number of x87 floating-point Ops that have retired. The number of events logged per cycle can vary from 0 to 8. Divide and square root Ops.",
|
||||
"UMask": "0x4"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_retx87_fp_ops.mul_ops",
|
||||
"EventCode": "0x02",
|
||||
"BriefDescription": "Multiply Ops.",
|
||||
"PublicDescription": "The number of x87 floating-point Ops that have retired. The number of events logged per cycle can vary from 0 to 8. Multiply Ops.",
|
||||
"UMask": "0x2"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_retx87_fp_ops.add_sub_ops",
|
||||
"EventCode": "0x02",
|
||||
"BriefDescription": "Add/subtract Ops.",
|
||||
"PublicDescription": "The number of x87 floating-point Ops that have retired. The number of events logged per cycle can vary from 0 to 8. Add/subtract Ops.",
|
||||
"UMask": "0x1"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_ret_sse_avx_ops.dp_mult_add_flops",
|
||||
"EventCode": "0x03",
|
||||
"BriefDescription": "Double precision multiply-add FLOPS. Multiply-add counts as 2 FLOPS.",
|
||||
"PublicDescription": "This is a retire-based event. The number of retired SSE/AVX FLOPS. The number of events logged per cycle can vary from 0 to 64. This event can count above 15. Double precision multiply-add FLOPS. Multiply-add counts as 2 FLOPS.",
|
||||
"UMask": "0x80"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_ret_sse_avx_ops.dp_div_flops",
|
||||
"EventCode": "0x03",
|
||||
"BriefDescription": "Double precision divide/square root FLOPS.",
|
||||
"PublicDescription": "This is a retire-based event. The number of retired SSE/AVX FLOPS. The number of events logged per cycle can vary from 0 to 64. This event can count above 15. Double precision divide/square root FLOPS.",
|
||||
"UMask": "0x40"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_ret_sse_avx_ops.dp_mult_flops",
|
||||
"EventCode": "0x03",
|
||||
"BriefDescription": "Double precision multiply FLOPS.",
|
||||
"PublicDescription": "This is a retire-based event. The number of retired SSE/AVX FLOPS. The number of events logged per cycle can vary from 0 to 64. This event can count above 15. Double precision multiply FLOPS.",
|
||||
"UMask": "0x20"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_ret_sse_avx_ops.dp_add_sub_flops",
|
||||
"EventCode": "0x03",
|
||||
"BriefDescription": "Double precision add/subtract FLOPS.",
|
||||
"PublicDescription": "This is a retire-based event. The number of retired SSE/AVX FLOPS. The number of events logged per cycle can vary from 0 to 64. This event can count above 15. Double precision add/subtract FLOPS.",
|
||||
"UMask": "0x10"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_ret_sse_avx_ops.sp_mult_add_flops",
|
||||
"EventCode": "0x03",
|
||||
"BriefDescription": "Single precision multiply-add FLOPS. Multiply-add counts as 2 FLOPS.",
|
||||
"PublicDescription": "This is a retire-based event. The number of retired SSE/AVX FLOPS. The number of events logged per cycle can vary from 0 to 64. This event can count above 15. Single precision multiply-add FLOPS. Multiply-add counts as 2 FLOPS.",
|
||||
"UMask": "0x8"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_ret_sse_avx_ops.sp_div_flops",
|
||||
"EventCode": "0x03",
|
||||
"BriefDescription": "Single-precision divide/square root FLOPS.",
|
||||
"PublicDescription": "This is a retire-based event. The number of retired SSE/AVX FLOPS. The number of events logged per cycle can vary from 0 to 64. This event can count above 15. Single-precision divide/square root FLOPS.",
|
||||
"UMask": "0x4"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_ret_sse_avx_ops.sp_mult_flops",
|
||||
"EventCode": "0x03",
|
||||
"BriefDescription": "Single-precision multiply FLOPS.",
|
||||
"PublicDescription": "This is a retire-based event. The number of retired SSE/AVX FLOPS. The number of events logged per cycle can vary from 0 to 64. This event can count above 15. Single-precision multiply FLOPS.",
|
||||
"UMask": "0x2"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_ret_sse_avx_ops.sp_add_sub_flops",
|
||||
"EventCode": "0x03",
|
||||
"BriefDescription": "Single-precision add/subtract FLOPS.",
|
||||
"PublicDescription": "This is a retire-based event. The number of retired SSE/AVX FLOPS. The number of events logged per cycle can vary from 0 to 64. This event can count above 15. Single-precision add/subtract FLOPS.",
|
||||
"UMask": "0x1"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_num_mov_elim_scal_op.optimized",
|
||||
"EventCode": "0x04",
|
||||
"BriefDescription": "Number of Scalar Ops optimized.",
|
||||
"PublicDescription": "This is a dispatch based speculative event, and is useful for measuring the effectiveness of the Move elimination and Scalar code optimization schemes. Number of Scalar Ops optimized.",
|
||||
"UMask": "0x8"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_num_mov_elim_scal_op.opt_potential",
|
||||
"EventCode": "0x04",
|
||||
"BriefDescription": "Number of Ops that are candidates for optimization (have Z-bit either set or pass).",
|
||||
"PublicDescription": "This is a dispatch based speculative event, and is useful for measuring the effectiveness of the Move elimination and Scalar code optimization schemes. Number of Ops that are candidates for optimization (have Z-bit either set or pass).",
|
||||
"UMask": "0x4"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_num_mov_elim_scal_op.sse_mov_ops_elim",
|
||||
"EventCode": "0x04",
|
||||
"BriefDescription": "Number of SSE Move Ops eliminated.",
|
||||
"PublicDescription": "This is a dispatch based speculative event, and is useful for measuring the effectiveness of the Move elimination and Scalar code optimization schemes. Number of SSE Move Ops eliminated.",
|
||||
"UMask": "0x2"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_num_mov_elim_scal_op.sse_mov_ops",
|
||||
"EventCode": "0x04",
|
||||
"BriefDescription": "Number of SSE Move Ops.",
|
||||
"PublicDescription": "This is a dispatch based speculative event, and is useful for measuring the effectiveness of the Move elimination and Scalar code optimization schemes. Number of SSE Move Ops.",
|
||||
"UMask": "0x1"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_retired_ser_ops.x87_ctrl_ret",
|
||||
"EventCode": "0x05",
|
||||
"BriefDescription": "x87 control word mispredict traps due to mispredictions in RC or PC, or changes in mask bits.",
|
||||
"PublicDescription": "The number of serializing Ops retired. x87 control word mispredict traps due to mispredictions in RC or PC, or changes in mask bits.",
|
||||
"UMask": "0x8"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_retired_ser_ops.x87_bot_ret",
|
||||
"EventCode": "0x05",
|
||||
"BriefDescription": "x87 bottom-executing uOps retired.",
|
||||
"PublicDescription": "The number of serializing Ops retired. x87 bottom-executing uOps retired.",
|
||||
"UMask": "0x4"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_retired_ser_ops.sse_ctrl_ret",
|
||||
"EventCode": "0x05",
|
||||
"BriefDescription": "SSE control word mispredict traps due to mispredictions in RC, FTZ or DAZ, or changes in mask bits.",
|
||||
"PublicDescription": "The number of serializing Ops retired. SSE control word mispredict traps due to mispredictions in RC, FTZ or DAZ, or changes in mask bits.",
|
||||
"UMask": "0x2"
|
||||
},
|
||||
{
|
||||
"EventName": "fp_retired_ser_ops.sse_bot_ret",
|
||||
"EventCode": "0x05",
|
||||
"BriefDescription": "SSE bottom-executing uOps retired.",
|
||||
"PublicDescription": "The number of serializing Ops retired. SSE bottom-executing uOps retired.",
|
||||
"UMask": "0x1"
|
||||
}
|
||||
]
|
||||
]
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load diff
|
|
@ -49,258 +49,3 @@
|
|||
"UMask": "0x1"
|
||||
}
|
||||
]
|
||||
[
|
||||
{
|
||||
"EventName": "de_dis_dispatch_token_stalls0.retire_token_stall",
|
||||
"EventCode": "0xaf",
|
||||
"BriefDescription": "RETIRE Tokens unavailable.",
|
||||
"PublicDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a token stall. RETIRE Tokens unavailable.",
|
||||
"UMask": "0x40"
|
||||
},
|
||||
{
|
||||
"EventName": "de_dis_dispatch_token_stalls0.agsq_token_stall",
|
||||
"EventCode": "0xaf",
|
||||
"BriefDescription": "AGSQ Tokens unavailable.",
|
||||
"PublicDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a token stall. AGSQ Tokens unavailable.",
|
||||
"UMask": "0x20"
|
||||
},
|
||||
{
|
||||
"EventName": "de_dis_dispatch_token_stalls0.alu_token_stall",
|
||||
"EventCode": "0xaf",
|
||||
"BriefDescription": "ALU tokens total unavailable.",
|
||||
"PublicDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a token stall. ALU tokens total unavailable.",
|
||||
"UMask": "0x10"
|
||||
},
|
||||
{
|
||||
"EventName": "de_dis_dispatch_token_stalls0.alsq3_0_token_stall",
|
||||
"EventCode": "0xaf",
|
||||
"BriefDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a token stall.",
|
||||
"PublicDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a token stall.",
|
||||
"UMask": "0x8"
|
||||
},
|
||||
{
|
||||
"EventName": "de_dis_dispatch_token_stalls0.alsq3_token_stall",
|
||||
"EventCode": "0xaf",
|
||||
"BriefDescription": "ALSQ 3 Tokens unavailable.",
|
||||
"PublicDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a token stall. ALSQ 3 Tokens unavailable.",
|
||||
"UMask": "0x4"
|
||||
},
|
||||
{
|
||||
"EventName": "de_dis_dispatch_token_stalls0.alsq2_token_stall",
|
||||
"EventCode": "0xaf",
|
||||
"BriefDescription": "ALSQ 2 Tokens unavailable.",
|
||||
"PublicDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a token stall. ALSQ 2 Tokens unavailable.",
|
||||
"UMask": "0x2"
|
||||
},
|
||||
{
|
||||
"EventName": "de_dis_dispatch_token_stalls0.alsq1_token_stall",
|
||||
"EventCode": "0xaf",
|
||||
"BriefDescription": "ALSQ 1 Tokens unavailable.",
|
||||
"PublicDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a token stall. ALSQ 1 Tokens unavailable.",
|
||||
"UMask": "0x1"
|
||||
}
|
||||
]
|
||||
[
|
||||
{
|
||||
"EventName": "de_dis_dispatch_token_stalls0.retire_token_stall",
|
||||
"EventCode": "0xaf",
|
||||
"BriefDescription": "RETIRE Tokens unavailable.",
|
||||
"PublicDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a token stall. RETIRE Tokens unavailable.",
|
||||
"UMask": "0x40"
|
||||
},
|
||||
{
|
||||
"EventName": "de_dis_dispatch_token_stalls0.agsq_token_stall",
|
||||
"EventCode": "0xaf",
|
||||
"BriefDescription": "AGSQ Tokens unavailable.",
|
||||
"PublicDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a token stall. AGSQ Tokens unavailable.",
|
||||
"UMask": "0x20"
|
||||
},
|
||||
{
|
||||
"EventName": "de_dis_dispatch_token_stalls0.alu_token_stall",
|
||||
"EventCode": "0xaf",
|
||||
"BriefDescription": "ALU tokens total unavailable.",
|
||||
"PublicDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a token stall. ALU tokens total unavailable.",
|
||||
"UMask": "0x10"
|
||||
},
|
||||
{
|
||||
"EventName": "de_dis_dispatch_token_stalls0.alsq3_0_token_stall",
|
||||
"EventCode": "0xaf",
|
||||
"BriefDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a token stall.",
|
||||
"PublicDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a token stall.",
|
||||
"UMask": "0x8"
|
||||
},
|
||||
{
|
||||
"EventName": "de_dis_dispatch_token_stalls0.alsq3_token_stall",
|
||||
"EventCode": "0xaf",
|
||||
"BriefDescription": "ALSQ 3 Tokens unavailable.",
|
||||
"PublicDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a token stall. ALSQ 3 Tokens unavailable.",
|
||||
"UMask": "0x4"
|
||||
},
|
||||
{
|
||||
"EventName": "de_dis_dispatch_token_stalls0.alsq2_token_stall",
|
||||
"EventCode": "0xaf",
|
||||
"BriefDescription": "ALSQ 2 Tokens unavailable.",
|
||||
"PublicDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a token stall. ALSQ 2 Tokens unavailable.",
|
||||
"UMask": "0x2"
|
||||
},
|
||||
{
|
||||
"EventName": "de_dis_dispatch_token_stalls0.alsq1_token_stall",
|
||||
"EventCode": "0xaf",
|
||||
"BriefDescription": "ALSQ 1 Tokens unavailable.",
|
||||
"PublicDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a token stall. ALSQ 1 Tokens unavailable.",
|
||||
"UMask": "0x1"
|
||||
}
|
||||
]
|
||||
[
|
||||
{
|
||||
"EventName": "de_dis_dispatch_token_stalls0.retire_token_stall",
|
||||
"EventCode": "0xaf",
|
||||
"BriefDescription": "RETIRE Tokens unavailable.",
|
||||
"PublicDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a token stall. RETIRE Tokens unavailable.",
|
||||
"UMask": "0x40"
|
||||
},
|
||||
{
|
||||
"EventName": "de_dis_dispatch_token_stalls0.agsq_token_stall",
|
||||
"EventCode": "0xaf",
|
||||
"BriefDescription": "AGSQ Tokens unavailable.",
|
||||
"PublicDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a token stall. AGSQ Tokens unavailable.",
|
||||
"UMask": "0x20"
|
||||
},
|
||||
{
|
||||
"EventName": "de_dis_dispatch_token_stalls0.alu_token_stall",
|
||||
"EventCode": "0xaf",
|
||||
"BriefDescription": "ALU tokens total unavailable.",
|
||||
"PublicDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a token stall. ALU tokens total unavailable.",
|
||||
"UMask": "0x10"
|
||||
},
|
||||
{
|
||||
"EventName": "de_dis_dispatch_token_stalls0.alsq3_0_token_stall",
|
||||
"EventCode": "0xaf",
|
||||
"BriefDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a token stall.",
|
||||
"PublicDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a token stall.",
|
||||
"UMask": "0x8"
|
||||
},
|
||||
{
|
||||
"EventName": "de_dis_dispatch_token_stalls0.alsq3_token_stall",
|
||||
"EventCode": "0xaf",
|
||||
"BriefDescription": "ALSQ 3 Tokens unavailable.",
|
||||
"PublicDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a token stall. ALSQ 3 Tokens unavailable.",
|
||||
"UMask": "0x4"
|
||||
},
|
||||
{
|
||||
"EventName": "de_dis_dispatch_token_stalls0.alsq2_token_stall",
|
||||
"EventCode": "0xaf",
|
||||
"BriefDescription": "ALSQ 2 Tokens unavailable.",
|
||||
"PublicDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a token stall. ALSQ 2 Tokens unavailable.",
|
||||
"UMask": "0x2"
|
||||
},
|
||||
{
|
||||
"EventName": "de_dis_dispatch_token_stalls0.alsq1_token_stall",
|
||||
"EventCode": "0xaf",
|
||||
"BriefDescription": "ALSQ 1 Tokens unavailable.",
|
||||
"PublicDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a token stall. ALSQ 1 Tokens unavailable.",
|
||||
"UMask": "0x1"
|
||||
}
|
||||
]
|
||||
[
|
||||
{
|
||||
"EventName": "de_dis_dispatch_token_stalls0.retire_token_stall",
|
||||
"EventCode": "0xaf",
|
||||
"BriefDescription": "RETIRE Tokens unavailable.",
|
||||
"PublicDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a token stall. RETIRE Tokens unavailable.",
|
||||
"UMask": "0x40"
|
||||
},
|
||||
{
|
||||
"EventName": "de_dis_dispatch_token_stalls0.agsq_token_stall",
|
||||
"EventCode": "0xaf",
|
||||
"BriefDescription": "AGSQ Tokens unavailable.",
|
||||
"PublicDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a token stall. AGSQ Tokens unavailable.",
|
||||
"UMask": "0x20"
|
||||
},
|
||||
{
|
||||
"EventName": "de_dis_dispatch_token_stalls0.alu_token_stall",
|
||||
"EventCode": "0xaf",
|
||||
"BriefDescription": "ALU tokens total unavailable.",
|
||||
"PublicDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a token stall. ALU tokens total unavailable.",
|
||||
"UMask": "0x10"
|
||||
},
|
||||
{
|
||||
"EventName": "de_dis_dispatch_token_stalls0.alsq3_0_token_stall",
|
||||
"EventCode": "0xaf",
|
||||
"BriefDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a token stall.",
|
||||
"PublicDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a token stall.",
|
||||
"UMask": "0x8"
|
||||
},
|
||||
{
|
||||
"EventName": "de_dis_dispatch_token_stalls0.alsq3_token_stall",
|
||||
"EventCode": "0xaf",
|
||||
"BriefDescription": "ALSQ 3 Tokens unavailable.",
|
||||
"PublicDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a token stall. ALSQ 3 Tokens unavailable.",
|
||||
"UMask": "0x4"
|
||||
},
|
||||
{
|
||||
"EventName": "de_dis_dispatch_token_stalls0.alsq2_token_stall",
|
||||
"EventCode": "0xaf",
|
||||
"BriefDescription": "ALSQ 2 Tokens unavailable.",
|
||||
"PublicDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a token stall. ALSQ 2 Tokens unavailable.",
|
||||
"UMask": "0x2"
|
||||
},
|
||||
{
|
||||
"EventName": "de_dis_dispatch_token_stalls0.alsq1_token_stall",
|
||||
"EventCode": "0xaf",
|
||||
"BriefDescription": "ALSQ 1 Tokens unavailable.",
|
||||
"PublicDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a token stall. ALSQ 1 Tokens unavailable.",
|
||||
"UMask": "0x1"
|
||||
}
|
||||
]
|
||||
[
|
||||
{
|
||||
"EventName": "de_dis_dispatch_token_stalls0.retire_token_stall",
|
||||
"EventCode": "0xaf",
|
||||
"BriefDescription": "RETIRE Tokens unavailable.",
|
||||
"PublicDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a token stall. RETIRE Tokens unavailable.",
|
||||
"UMask": "0x40"
|
||||
},
|
||||
{
|
||||
"EventName": "de_dis_dispatch_token_stalls0.agsq_token_stall",
|
||||
"EventCode": "0xaf",
|
||||
"BriefDescription": "AGSQ Tokens unavailable.",
|
||||
"PublicDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a token stall. AGSQ Tokens unavailable.",
|
||||
"UMask": "0x20"
|
||||
},
|
||||
{
|
||||
"EventName": "de_dis_dispatch_token_stalls0.alu_token_stall",
|
||||
"EventCode": "0xaf",
|
||||
"BriefDescription": "ALU tokens total unavailable.",
|
||||
"PublicDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a token stall. ALU tokens total unavailable.",
|
||||
"UMask": "0x10"
|
||||
},
|
||||
{
|
||||
"EventName": "de_dis_dispatch_token_stalls0.alsq3_0_token_stall",
|
||||
"EventCode": "0xaf",
|
||||
"BriefDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a token stall.",
|
||||
"PublicDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a token stall.",
|
||||
"UMask": "0x8"
|
||||
},
|
||||
{
|
||||
"EventName": "de_dis_dispatch_token_stalls0.alsq3_token_stall",
|
||||
"EventCode": "0xaf",
|
||||
"BriefDescription": "ALSQ 3 Tokens unavailable.",
|
||||
"PublicDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a token stall. ALSQ 3 Tokens unavailable.",
|
||||
"UMask": "0x4"
|
||||
},
|
||||
{
|
||||
"EventName": "de_dis_dispatch_token_stalls0.alsq2_token_stall",
|
||||
"EventCode": "0xaf",
|
||||
"BriefDescription": "ALSQ 2 Tokens unavailable.",
|
||||
"PublicDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a token stall. ALSQ 2 Tokens unavailable.",
|
||||
"UMask": "0x2"
|
||||
},
|
||||
{
|
||||
"EventName": "de_dis_dispatch_token_stalls0.alsq1_token_stall",
|
||||
"EventCode": "0xaf",
|
||||
"BriefDescription": "ALSQ 1 Tokens unavailable.",
|
||||
"PublicDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a token stall. ALSQ 1 Tokens unavailable.",
|
||||
"UMask": "0x1"
|
||||
}
|
||||
]
|
||||
|
|
@ -36,4 +36,4 @@ GenuineIntel-6-2C,v2,westmereep-dp,core
|
|||
GenuineIntel-6-25,v2,westmereep-sp,core
|
||||
GenuineIntel-6-2F,v2,westmereex,core
|
||||
GenuineIntel-6-55,v1,skylakex,core
|
||||
AuthenticAMD-23-[[:xdigit:]]+,v1,amdfam17h,core
|
||||
AuthenticAMD-23-1,v1,amdfam17h,core
|
||||
|
|
|
|||
|
Loading…
Reference in a new issue