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riscv: add FPE code.
Add floating point extension (FPE) code needed for bhyve and world switch. Reviewed by: mhorne Sponsored by: UKRI Differential Revision: https://reviews.freebsd.org/D45697
This commit is contained in:
Ruslan Bukin
parent
d5963606f0
commit
44d4ee7f3d
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/*-
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* Copyright (c) 2016 Ruslan Bukin <br@bsdpad.com>
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* Copyright (c) 2016-2024 Ruslan Bukin <br@bsdpad.com>
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* All rights reserved.
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*
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* This software was developed by SRI International and the University of
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@ -34,4 +34,14 @@
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void fpe_state_save(struct thread *td);
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void fpe_state_clear(void);
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struct fpreg *fpu_save_area_alloc(void);
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void fpu_save_area_free(struct fpreg *fsa);
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void fpu_save_area_reset(struct fpreg *fsa);
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void fpe_enable(void);
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void fpe_disable(void);
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void fpe_store(struct fpreg *state);
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void fpe_restore(struct fpreg *state);
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#endif /* !_MACHINE_FPE_H_ */
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190
sys/riscv/riscv/fpe.c
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190
sys/riscv/riscv/fpe.c
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@ -0,0 +1,190 @@
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/*-
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* Copyright (c) 2024 Ruslan Bukin <br@bsdpad.com>
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*
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* This software was developed by the University of Cambridge Computer
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* Laboratory (Department of Computer Science and Technology) under Innovate
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* UK project 105694, "Digital Security by Design (DSbD) Technology Platform
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* Prototype".
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <vm/uma.h>
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#include <machine/fpe.h>
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#include <machine/reg.h>
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static uma_zone_t fpu_save_area_zone;
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static struct fpreg *fpu_initialstate;
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void
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fpe_enable(void)
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{
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uint64_t reg;
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reg = SSTATUS_FS_INITIAL;
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csr_set(sstatus, reg);
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}
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void
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fpe_disable(void)
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{
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uint64_t mask;
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mask = SSTATUS_FS_MASK;
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csr_clear(sstatus, mask);
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}
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void
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fpe_store(struct fpreg *regs)
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{
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uint64_t fcsr, (*fp_x)[32][2];
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fp_x = ®s->fp_x;
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__asm __volatile(
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"frcsr %0 \n"
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"fsd f0, (16 * 0)(%1)\n"
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"fsd f1, (16 * 1)(%1)\n"
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"fsd f2, (16 * 2)(%1)\n"
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"fsd f3, (16 * 3)(%1)\n"
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"fsd f4, (16 * 4)(%1)\n"
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"fsd f5, (16 * 5)(%1)\n"
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"fsd f6, (16 * 6)(%1)\n"
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"fsd f7, (16 * 7)(%1)\n"
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"fsd f8, (16 * 8)(%1)\n"
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"fsd f9, (16 * 9)(%1)\n"
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"fsd f10, (16 * 10)(%1)\n"
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"fsd f11, (16 * 11)(%1)\n"
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"fsd f12, (16 * 12)(%1)\n"
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"fsd f13, (16 * 13)(%1)\n"
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"fsd f14, (16 * 14)(%1)\n"
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"fsd f15, (16 * 15)(%1)\n"
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"fsd f16, (16 * 16)(%1)\n"
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"fsd f17, (16 * 17)(%1)\n"
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"fsd f18, (16 * 18)(%1)\n"
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"fsd f19, (16 * 19)(%1)\n"
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"fsd f20, (16 * 20)(%1)\n"
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"fsd f21, (16 * 21)(%1)\n"
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"fsd f22, (16 * 22)(%1)\n"
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"fsd f23, (16 * 23)(%1)\n"
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"fsd f24, (16 * 24)(%1)\n"
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"fsd f25, (16 * 25)(%1)\n"
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"fsd f26, (16 * 26)(%1)\n"
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"fsd f27, (16 * 27)(%1)\n"
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"fsd f28, (16 * 28)(%1)\n"
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"fsd f29, (16 * 29)(%1)\n"
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"fsd f30, (16 * 30)(%1)\n"
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"fsd f31, (16 * 31)(%1)\n"
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: "=&r"(fcsr), "=r"(fp_x), "=m"(*fp_x));
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regs->fp_fcsr = fcsr;
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}
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void
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fpe_restore(struct fpreg *regs)
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{
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uint64_t fcsr, (*fp_x)[32][2];
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fp_x = ®s->fp_x;
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fcsr = regs->fp_fcsr;
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__asm __volatile(
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"fscsr %0 \n"
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"fld f0, (16 * 0)(%1)\n"
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"fld f1, (16 * 1)(%1)\n"
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"fld f2, (16 * 2)(%1)\n"
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"fld f3, (16 * 3)(%1)\n"
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"fld f4, (16 * 4)(%1)\n"
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"fld f5, (16 * 5)(%1)\n"
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"fld f6, (16 * 6)(%1)\n"
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"fld f7, (16 * 7)(%1)\n"
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"fld f8, (16 * 8)(%1)\n"
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"fld f9, (16 * 9)(%1)\n"
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"fld f10, (16 * 10)(%1)\n"
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"fld f11, (16 * 11)(%1)\n"
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"fld f12, (16 * 12)(%1)\n"
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"fld f13, (16 * 13)(%1)\n"
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"fld f14, (16 * 14)(%1)\n"
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"fld f15, (16 * 15)(%1)\n"
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"fld f16, (16 * 16)(%1)\n"
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"fld f17, (16 * 17)(%1)\n"
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"fld f18, (16 * 18)(%1)\n"
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"fld f19, (16 * 19)(%1)\n"
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"fld f20, (16 * 20)(%1)\n"
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"fld f21, (16 * 21)(%1)\n"
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"fld f22, (16 * 22)(%1)\n"
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"fld f23, (16 * 23)(%1)\n"
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"fld f24, (16 * 24)(%1)\n"
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"fld f25, (16 * 25)(%1)\n"
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"fld f26, (16 * 26)(%1)\n"
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"fld f27, (16 * 27)(%1)\n"
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"fld f28, (16 * 28)(%1)\n"
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"fld f29, (16 * 29)(%1)\n"
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"fld f30, (16 * 30)(%1)\n"
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"fld f31, (16 * 31)(%1)\n"
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:: "r"(fcsr), "r"(fp_x), "m"(*fp_x));
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}
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struct fpreg *
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fpu_save_area_alloc(void)
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{
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return (uma_zalloc(fpu_save_area_zone, M_WAITOK));
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}
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void
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fpu_save_area_free(struct fpreg *fsa)
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{
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uma_zfree(fpu_save_area_zone, fsa);
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}
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void
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fpu_save_area_reset(struct fpreg *fsa)
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{
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memcpy(fsa, fpu_initialstate, sizeof(*fsa));
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}
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static void
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fpe_init(const void *dummy __unused)
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{
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fpu_save_area_zone = uma_zcreate("FPE save area", sizeof(struct fpreg),
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NULL, NULL, NULL, NULL, _Alignof(struct fpreg) - 1, 0);
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fpu_initialstate = uma_zalloc(fpu_save_area_zone, M_WAITOK | M_ZERO);
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fpe_enable();
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fpe_store(fpu_initialstate);
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fpe_disable();
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bzero(fpu_initialstate->fp_x, sizeof(fpu_initialstate->fp_x));
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}
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SYSINIT(fpe, SI_SUB_CPU, SI_ORDER_ANY, fpe_init, NULL);
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