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mpc85xx/pci: Conditionally reset PCI bridges
Sometimes we need to reset a PCIe bus, but sometimes it breaks the downstream device(s). Since, from my testing, this is only needed for Radeon cards installed in the AmigaOne machines because the card was already initialized by firmware, make the reset dependent on a device hint (hint.pcib.X.reset=1). With this, AmigaOne X5000 machines can have other devices in the secondary PCIe slots.
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@ -313,7 +313,7 @@ fsl_pcib_attach(device_t dev)
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struct fsl_pcib_softc *sc;
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phandle_t node;
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uint32_t cfgreg, brctl, ipreg;
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int error, rid;
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int do_reset, error, rid;
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uint8_t ltssm, capptr;
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sc = device_get_softc(dev);
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@ -374,17 +374,21 @@ fsl_pcib_attach(device_t dev)
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PCIM_CMD_PORTEN;
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fsl_pcib_cfgwrite(sc, 0, 0, 0, PCIR_COMMAND, cfgreg, 2);
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/* Reset the bus. Needed for Radeon video cards. */
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brctl = fsl_pcib_read_config(sc->sc_dev, 0, 0, 0,
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PCIR_BRIDGECTL_1, 1);
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brctl |= PCIB_BCR_SECBUS_RESET;
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fsl_pcib_write_config(sc->sc_dev, 0, 0, 0,
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PCIR_BRIDGECTL_1, brctl, 1);
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DELAY(100000);
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brctl &= ~PCIB_BCR_SECBUS_RESET;
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fsl_pcib_write_config(sc->sc_dev, 0, 0, 0,
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PCIR_BRIDGECTL_1, brctl, 1);
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DELAY(100000);
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do_reset = 0;
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resource_int_value("pcib", device_get_unit(dev), "reset", &do_reset);
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if (do_reset) {
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/* Reset the bus. Needed for Radeon video cards. */
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brctl = fsl_pcib_read_config(sc->sc_dev, 0, 0, 0,
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PCIR_BRIDGECTL_1, 1);
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brctl |= PCIB_BCR_SECBUS_RESET;
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fsl_pcib_write_config(sc->sc_dev, 0, 0, 0,
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PCIR_BRIDGECTL_1, brctl, 1);
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DELAY(100000);
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brctl &= ~PCIB_BCR_SECBUS_RESET;
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fsl_pcib_write_config(sc->sc_dev, 0, 0, 0,
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PCIR_BRIDGECTL_1, brctl, 1);
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DELAY(100000);
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}
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if (sc->sc_pcie) {
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ltssm = fsl_pcib_cfgread(sc, 0, 0, 0, PCIR_LTSSM, 1);
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