mirror of
https://github.com/freebsd/freebsd-src
synced 2024-09-21 01:03:42 +00:00
ss if_vx through indent, and use ANSI function definitions, prior to adding
if_media and DMA support to the driver. The previous style was inconsistent making it difficult to emulate existing style.
This commit is contained in:
parent
28b31df727
commit
4187cdf189
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=133980
1525
sys/dev/vx/if_vx.c
1525
sys/dev/vx/if_vx.c
File diff suppressed because it is too large
Load diff
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@ -63,121 +63,117 @@ __FBSDID("$FreeBSD$");
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static const char *vx_match(eisa_id_t type);
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static const char*
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static const char *
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vx_match(eisa_id_t type)
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{
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switch (type) {
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case EISA_DEVICE_ID_3COM_3C592:
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return "3Com 3C592 Network Adapter";
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case EISA_DEVICE_ID_3COM_3C597_TX:
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return "3Com 3C597-TX Network Adapter";
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case EISA_DEVICE_ID_3COM_3C597_T4:
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return "3Com 3C597-T4 Network Adapter";
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case EISA_DEVICE_ID_3COM_3C597_MII:
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return "3Com 3C597-MII Network Adapter";
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default:
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break;
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}
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return (NULL);
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switch (type) {
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case EISA_DEVICE_ID_3COM_3C592:
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return "3Com 3C592 Network Adapter";
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case EISA_DEVICE_ID_3COM_3C597_TX:
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return "3Com 3C597-TX Network Adapter";
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case EISA_DEVICE_ID_3COM_3C597_T4:
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return "3Com 3C597-T4 Network Adapter";
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case EISA_DEVICE_ID_3COM_3C597_MII:
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return "3Com 3C597-MII Network Adapter";
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default:
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break;
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}
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return (NULL);
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}
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static int
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vx_eisa_probe(device_t dev)
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{
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const char *desc;
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u_long iobase;
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u_long port;
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const char *desc;
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u_long iobase;
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u_long port;
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desc = vx_match(eisa_get_id(dev));
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if (!desc)
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return (ENXIO);
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device_set_desc(dev, desc);
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desc = vx_match(eisa_get_id(dev));
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if (!desc)
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return (ENXIO);
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device_set_desc(dev, desc);
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port = eisa_get_slot(dev) * EISA_SLOT_SIZE;
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iobase = port + VX_EISA_SLOT_OFFSET;
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port = eisa_get_slot(dev) * EISA_SLOT_SIZE;
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iobase = port + VX_EISA_SLOT_OFFSET;
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eisa_add_iospace(dev, iobase, VX_EISA_IOSIZE, RESVADDR_NONE);
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eisa_add_iospace(dev, port, VX_IOSIZE, RESVADDR_NONE);
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eisa_add_iospace(dev, iobase, VX_EISA_IOSIZE, RESVADDR_NONE);
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eisa_add_iospace(dev, port, VX_IOSIZE, RESVADDR_NONE);
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/* Set irq */
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eisa_add_intr(dev, inw(iobase + VX_RESOURCE_CONFIG) >> 12,
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EISA_TRIGGER_EDGE);
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/* Set irq */
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eisa_add_intr(dev, inw(iobase + VX_RESOURCE_CONFIG) >> 12,
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EISA_TRIGGER_EDGE);
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return (0);
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return (0);
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}
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static int
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vx_eisa_attach(device_t dev)
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{
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struct vx_softc *sc;
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struct resource *io = 0;
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struct resource *eisa_io = 0;
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struct resource *irq = 0;
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int rid;
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void *ih;
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struct vx_softc *sc;
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struct resource *io = 0;
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struct resource *eisa_io = 0;
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struct resource *irq = 0;
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int rid;
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void *ih;
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/*
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* The addresses are sorted in increasing order
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* so we know the port to pass to the core ep
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* driver comes first.
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*/
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rid = 0;
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io = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &rid, RF_ACTIVE);
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if (!io) {
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device_printf(dev, "No I/O space?!\n");
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goto bad;
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}
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/*
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* The addresses are sorted in increasing order
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* so we know the port to pass to the core ep
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* driver comes first.
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*/
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rid = 0;
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io = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &rid, RF_ACTIVE);
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if (!io) {
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device_printf(dev, "No I/O space?!\n");
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goto bad;
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}
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rid = 1;
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eisa_io = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &rid, RF_ACTIVE);
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if (!eisa_io) {
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device_printf(dev, "No I/O space?!\n");
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goto bad;
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}
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sc = device_get_softc(dev);
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rid = 1;
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eisa_io = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &rid, RF_ACTIVE);
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if (!eisa_io) {
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device_printf(dev, "No I/O space?!\n");
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goto bad;
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}
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sc->vx_res = io;
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sc->bst = rman_get_bustag(io);
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sc->bsh = rman_get_bushandle(io);
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sc = device_get_softc(dev);
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rid = 0;
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irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE);
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if (!irq) {
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device_printf(dev, "No irq?!\n");
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goto bad;
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}
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sc->vx_irq = irq;
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sc->vx_res = io;
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sc->bst = rman_get_bustag(io);
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sc->bsh = rman_get_bushandle(io);
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/* Now the registers are availible through the lower ioport */
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rid = 0;
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irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE);
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if (!irq) {
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device_printf(dev, "No irq?!\n");
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goto bad;
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}
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vxattach(dev);
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sc->vx_irq = irq;
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if (bus_setup_intr(dev, irq, INTR_TYPE_NET, vxintr, sc, &ih))
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goto bad;
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/* Now the registers are availible through the lower ioport */
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sc->vx_intrhand = ih;
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vxattach(dev);
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return 0;
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if (bus_setup_intr(dev, irq, INTR_TYPE_NET, vxintr, sc, &ih)) {
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goto bad;
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}
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sc->vx_intrhand = ih;
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return 0;
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bad:
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if (io)
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bus_release_resource(dev, SYS_RES_IOPORT, 0, io);
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if (eisa_io)
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bus_release_resource(dev, SYS_RES_IOPORT, 0, eisa_io);
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if (irq)
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bus_release_resource(dev, SYS_RES_IRQ, 0, irq);
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return -1;
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bad:
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if (io)
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bus_release_resource(dev, SYS_RES_IOPORT, 0, io);
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if (eisa_io)
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bus_release_resource(dev, SYS_RES_IOPORT, 0, eisa_io);
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if (irq)
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bus_release_resource(dev, SYS_RES_IRQ, 0, irq);
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return -1;
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}
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static device_method_t vx_eisa_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, vx_eisa_probe),
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DEVMETHOD(device_attach, vx_eisa_attach),
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DEVMETHOD(device_probe, vx_eisa_probe),
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DEVMETHOD(device_attach, vx_eisa_attach),
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{ 0, 0 }
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{0, 0}
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};
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static driver_t vx_eisa_driver = {
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@ -57,11 +57,11 @@ static int vx_pci_attach(device_t);
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static device_method_t vx_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, vx_pci_probe),
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DEVMETHOD(device_attach, vx_pci_attach),
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DEVMETHOD(device_shutdown, vx_pci_shutdown),
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DEVMETHOD(device_probe, vx_pci_probe),
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DEVMETHOD(device_attach, vx_pci_attach),
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DEVMETHOD(device_shutdown, vx_pci_shutdown),
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{ 0, 0 }
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{0, 0}
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};
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static driver_t vx_driver = {
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@ -77,106 +77,100 @@ MODULE_DEPEND(vx, pci, 1, 1, 1);
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MODULE_DEPEND(vx, ether, 1, 1, 1);
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static void
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vx_pci_shutdown(
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device_t dev)
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vx_pci_shutdown(device_t dev)
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{
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struct vx_softc *sc;
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struct vx_softc *sc;
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sc = device_get_softc(dev);
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vxstop(sc);
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return;
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sc = device_get_softc(dev);
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vxstop(sc);
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}
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static int
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vx_pci_probe(
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device_t dev)
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vx_pci_probe(device_t dev)
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{
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u_int32_t device_id;
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u_int32_t device_id;
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device_id = pci_read_config(dev, PCIR_DEVVENDOR, 4);
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device_id = pci_read_config(dev, PCIR_DEVVENDOR, 4);
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if(device_id == 0x590010b7ul) {
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device_set_desc(dev, "3COM 3C590 Etherlink III PCI");
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return(0);
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}
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if(device_id == 0x595010b7ul || device_id == 0x595110b7ul ||
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device_id == 0x595210b7ul) {
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device_set_desc(dev, "3COM 3C595 Etherlink III PCI");
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return(0);
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}
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if (device_id == 0x590010b7ul) {
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device_set_desc(dev, "3COM 3C590 Etherlink III PCI");
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return (0);
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}
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if (device_id == 0x595010b7ul || device_id == 0x595110b7ul ||
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device_id == 0x595210b7ul) {
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device_set_desc(dev, "3COM 3C595 Etherlink III PCI");
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return (0);
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}
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/*
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* The (Fast) Etherlink XL adapters are now supported by
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* the xl driver, which uses bus master DMA and is much
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* faster. (And which also supports the 3c905B.
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*/
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#ifdef VORTEX_ETHERLINK_XL
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if(device_id == 0x900010b7ul || device_id == 0x900110b7ul) {
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device_set_desc(dev, "3COM 3C900 Etherlink XL PCI");
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return(0);
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}
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if(device_id == 0x905010b7ul || device_id == 0x905110b7ul) {
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device_set_desc(dev, "3COM 3C905 Etherlink XL PCI");
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return(0);
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}
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if (device_id == 0x900010b7ul || device_id == 0x900110b7ul) {
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device_set_desc(dev, "3COM 3C900 Etherlink XL PCI");
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return (0);
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}
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if (device_id == 0x905010b7ul || device_id == 0x905110b7ul) {
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device_set_desc(dev, "3COM 3C905 Etherlink XL PCI");
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return (0);
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}
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#endif
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return (ENXIO);
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return (ENXIO);
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}
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static int
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vx_pci_attach(
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device_t dev)
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static int
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vx_pci_attach(device_t dev)
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{
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struct vx_softc *sc;
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int rid;
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struct vx_softc *sc;
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int rid;
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sc = device_get_softc(dev);
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sc = device_get_softc(dev);
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rid = PCIR_BAR(0);
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sc->vx_res = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &rid, RF_ACTIVE);
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rid = PCIR_BAR(0);
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sc->vx_res =
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bus_alloc_resource_any(dev, SYS_RES_IOPORT, &rid, RF_ACTIVE);
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if (sc->vx_res == NULL)
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goto bad;
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if (sc->vx_res == NULL)
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goto bad;
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sc->bst = rman_get_bustag(sc->vx_res);
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sc->bsh = rman_get_bushandle(sc->vx_res);
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sc->bst = rman_get_bustag(sc->vx_res);
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sc->bsh = rman_get_bushandle(sc->vx_res);
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rid = 0;
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sc->vx_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
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RF_SHAREABLE | RF_ACTIVE);
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rid = 0;
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sc->vx_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
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RF_SHAREABLE | RF_ACTIVE);
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if (sc->vx_irq == NULL)
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goto bad;
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if (sc->vx_irq == NULL)
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goto bad;
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if (bus_setup_intr(dev, sc->vx_irq, INTR_TYPE_NET,
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vxintr, sc, &sc->vx_intrhand))
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goto bad;
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if (bus_setup_intr(dev, sc->vx_irq, INTR_TYPE_NET,
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vxintr, sc, &sc->vx_intrhand))
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goto bad;
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if (vxattach(dev) == 0) {
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goto bad;
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}
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if (vxattach(dev) == 0)
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goto bad;
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/* defect check for 3C590 */
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if ((pci_read_config(dev, PCIR_DEVVENDOR, 4) >> 16) == 0x5900) {
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GO_WINDOW(0);
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if (vxbusyeeprom(sc))
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goto bad;
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CSR_WRITE_2(sc, VX_W0_EEPROM_COMMAND,
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EEPROM_CMD_RD | EEPROM_SOFTINFO2);
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if (vxbusyeeprom(sc))
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goto bad;
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if (!(CSR_READ_2(sc, VX_W0_EEPROM_DATA) & NO_RX_OVN_ANOMALY)) {
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printf("Warning! Defective early revision adapter!\n");
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/* defect check for 3C590 */
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if ((pci_read_config(dev, PCIR_DEVVENDOR, 4) >> 16) == 0x5900) {
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GO_WINDOW(0);
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if (vxbusyeeprom(sc))
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goto bad;
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CSR_WRITE_2(sc, VX_W0_EEPROM_COMMAND,
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EEPROM_CMD_RD | EEPROM_SOFTINFO2);
|
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if (vxbusyeeprom(sc))
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goto bad;
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if (!(CSR_READ_2(sc, VX_W0_EEPROM_DATA) & NO_RX_OVN_ANOMALY))
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printf("Warning! Defective early revision adapter!\n");
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}
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}
|
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|
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return(0);
|
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return (0);
|
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|
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bad:
|
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if (sc->vx_intrhand != NULL)
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bus_teardown_intr(dev, sc->vx_irq, sc->vx_intrhand);
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if (sc->vx_res != NULL)
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bus_release_resource(dev, SYS_RES_IOPORT, 0, sc->vx_res);
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if (sc->vx_irq != NULL)
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bus_release_resource(dev, SYS_RES_IRQ, 0, sc->vx_irq);
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return(ENXIO);
|
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if (sc->vx_intrhand != NULL)
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bus_teardown_intr(dev, sc->vx_irq, sc->vx_intrhand);
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if (sc->vx_res != NULL)
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bus_release_resource(dev, SYS_RES_IOPORT, 0, sc->vx_res);
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if (sc->vx_irq != NULL)
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bus_release_resource(dev, SYS_RES_IRQ, 0, sc->vx_irq);
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return (ENXIO);
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}
|
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|
|
|
@ -31,17 +31,17 @@
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* Some global constants
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*/
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#define TX_INIT_RATE 16
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#define TX_INIT_MAX_RATE 64
|
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#define RX_INIT_LATENCY 64
|
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#define RX_INIT_EARLY_THRESH 64
|
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#define MIN_RX_EARLY_THRESHF 16 /* not less than ether_header */
|
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#define MIN_RX_EARLY_THRESHL 4
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#define TX_INIT_RATE 16
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#define TX_INIT_MAX_RATE 64
|
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#define RX_INIT_LATENCY 64
|
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#define RX_INIT_EARLY_THRESH 64
|
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#define MIN_RX_EARLY_THRESHF 16 /* not less than ether_header */
|
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#define MIN_RX_EARLY_THRESHL 4
|
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|
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#define EEPROMSIZE 0x40
|
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#define MAX_EEPROMBUSY 1000
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#define VX_LAST_TAG 0xd7
|
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#define VX_MAX_BOARDS 16
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#define EEPROMSIZE 0x40
|
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#define MAX_EEPROMBUSY 1000
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#define VX_LAST_TAG 0xd7
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#define VX_MAX_BOARDS 16
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|
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/*
|
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* Commands to read/write EEPROM trough EEPROM command register (Window 0,
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|
@ -111,14 +111,11 @@
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#define NO_RX_OVN_ANOMALY (1<<5)
|
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|
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/**************************************************************************
|
||||
* *
|
||||
* These are the registers for the 3Com 3c509 and their bit patterns when *
|
||||
* applicable. They have been taken out the the "EtherLink III Parallel *
|
||||
* Tasking EISA and ISA Technical Reference" "Beta Draft 10/30/92" manual *
|
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* from 3com. *
|
||||
* *
|
||||
**************************************************************************/
|
||||
|
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#define VX_COMMAND 0x0e /* Write. BASE+0x0e is always a
|
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* command reg. */
|
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#define VX_STATUS 0x0e /* Read. BASE+0x0e is always status
|
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|
@ -134,7 +131,7 @@
|
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#define VX_W0_RESOURCE_CFG 0x08
|
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#define VX_W0_ADDRESS_CFG 0x06
|
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#define VX_W0_CONFIG_CTRL 0x04
|
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/* Read */
|
||||
/* Read */
|
||||
#define VX_W0_PRODUCT_ID 0x02
|
||||
#define VX_W0_MFG_ID 0x00
|
||||
|
||||
|
@ -243,25 +240,25 @@
|
|||
#define TX_RESET (u_short) (0xb<<11)
|
||||
#define REQ_INTR (u_short) (0xc<<11)
|
||||
/*
|
||||
* The following C_* acknowledge the various interrupts. Some of them don't
|
||||
* do anything. See the manual.
|
||||
* The following C_* acknowledge the various interrupts.
|
||||
* Some of them don't do anything. See the manual.
|
||||
*/
|
||||
#define ACK_INTR (u_short) (0x6800)
|
||||
# define C_INTR_LATCH (u_short) (ACK_INTR|0x1)
|
||||
# define C_CARD_FAILURE (u_short) (ACK_INTR|0x2)
|
||||
# define C_TX_COMPLETE (u_short) (ACK_INTR|0x4)
|
||||
# define C_TX_AVAIL (u_short) (ACK_INTR|0x8)
|
||||
# define C_RX_COMPLETE (u_short) (ACK_INTR|0x10)
|
||||
# define C_RX_EARLY (u_short) (ACK_INTR|0x20)
|
||||
# define C_INT_RQD (u_short) (ACK_INTR|0x40)
|
||||
# define C_UPD_STATS (u_short) (ACK_INTR|0x80)
|
||||
#define C_INTR_LATCH (u_short) (ACK_INTR|0x1)
|
||||
#define C_CARD_FAILURE (u_short) (ACK_INTR|0x2)
|
||||
#define C_TX_COMPLETE (u_short) (ACK_INTR|0x4)
|
||||
#define C_TX_AVAIL (u_short) (ACK_INTR|0x8)
|
||||
#define C_RX_COMPLETE (u_short) (ACK_INTR|0x10)
|
||||
#define C_RX_EARLY (u_short) (ACK_INTR|0x20)
|
||||
#define C_INT_RQD (u_short) (ACK_INTR|0x40)
|
||||
#define C_UPD_STATS (u_short) (ACK_INTR|0x80)
|
||||
#define SET_INTR_MASK (u_short) (0xe<<11)
|
||||
#define SET_RD_0_MASK (u_short) (0xf<<11)
|
||||
#define SET_RX_FILTER (u_short) (0x10<<11)
|
||||
# define FIL_INDIVIDUAL (u_short) (0x1)
|
||||
# define FIL_MULTICAST (u_short) (0x02)
|
||||
# define FIL_BRDCST (u_short) (0x04)
|
||||
# define FIL_PROMISC (u_short) (0x08)
|
||||
#define FIL_INDIVIDUAL (u_short) (0x1)
|
||||
#define FIL_MULTICAST (u_short) (0x02)
|
||||
#define FIL_BRDCST (u_short) (0x04)
|
||||
#define FIL_PROMISC (u_short) (0x08)
|
||||
#define SET_RX_EARLY_THRESH (u_short) (0x11<<11)
|
||||
#define SET_TX_AVAIL_THRESH (u_short) (0x12<<11)
|
||||
#define SET_TX_START_THRESH (u_short) (0x13<<11)
|
||||
|
@ -299,7 +296,7 @@
|
|||
|
||||
#define VX_BUSY_WAIT while (CSR_READ_2(sc, VX_STATUS) & S_COMMAND_IN_PROGRESS)
|
||||
|
||||
/* Address Config. Register.
|
||||
/* Address Config. Register.
|
||||
* Window 0/Port 06
|
||||
*/
|
||||
|
||||
|
@ -307,7 +304,7 @@
|
|||
#define ACF_CONNECTOR_UTP 0
|
||||
#define ACF_CONNECTOR_AUI 1
|
||||
#define ACF_CONNECTOR_BNC 3
|
||||
|
||||
|
||||
#define INTERNAL_CONNECTOR_BITS 20
|
||||
#define INTERNAL_CONNECTOR_MASK 0x01700000
|
||||
|
||||
|
@ -338,7 +335,7 @@
|
|||
#define ERR_DRIBBLE (u_short) (0x1000)
|
||||
|
||||
/*
|
||||
* TX Status.
|
||||
* TX Status.
|
||||
*
|
||||
* Reports the transmit status of a completed transmission. Writing this
|
||||
* register pops the transmit completion stack.
|
||||
|
@ -415,15 +412,15 @@
|
|||
#define TAG_ADAPTER 0xd0
|
||||
#define ACTIVATE_ADAPTER_TO_CONFIG 0xff
|
||||
#define ENABLE_DRQ_IRQ 0x0001
|
||||
#define MFG_ID 0x506d /* `TCM' */
|
||||
#define MFG_ID 0x506d /* `TCM' */
|
||||
#define PROD_ID 0x5090
|
||||
#define JABBER_GUARD_ENABLE 0x40
|
||||
#define LINKBEAT_ENABLE 0x80
|
||||
#define ENABLE_UTP (JABBER_GUARD_ENABLE | LINKBEAT_ENABLE)
|
||||
#define DISABLE_UTP 0x0
|
||||
#define RX_BYTES_MASK (u_short) (0x07ff)
|
||||
#define TX_INDICATE 1<<15
|
||||
#define JABBER_GUARD_ENABLE 0x40
|
||||
#define LINKBEAT_ENABLE 0x80
|
||||
#define ENABLE_UTP (JABBER_GUARD_ENABLE | LINKBEAT_ENABLE)
|
||||
#define DISABLE_UTP 0x0
|
||||
#define RX_BYTES_MASK (u_short) (0x07ff)
|
||||
#define TX_INDICATE (1<<15)
|
||||
|
||||
#define VX_IOSIZE 0x20
|
||||
#define VX_IOSIZE 0x20
|
||||
|
||||
#define VX_CONNECTORS 8
|
||||
|
|
|
@ -35,24 +35,24 @@
|
|||
* Ethernet software status per interface.
|
||||
*/
|
||||
struct vx_softc {
|
||||
struct arpcom arpcom; /* Ethernet common part */
|
||||
int unit; /* unit number */
|
||||
bus_space_tag_t bst;
|
||||
bus_space_handle_t bsh;
|
||||
void *vx_intrhand;
|
||||
struct resource *vx_irq;
|
||||
struct resource *vx_res;
|
||||
#define MAX_MBS 8 /* # of mbufs we keep around */
|
||||
struct mbuf *mb[MAX_MBS]; /* spare mbuf storage. */
|
||||
int next_mb; /* Which mbuf to use next. */
|
||||
int last_mb; /* Last mbuf. */
|
||||
char vx_connectors; /* Connectors on this card. */
|
||||
char vx_connector; /* Connector to use. */
|
||||
short tx_start_thresh; /* Current TX_start_thresh. */
|
||||
int tx_succ_ok; /* # packets sent in sequence */
|
||||
/* w/o underrun */
|
||||
struct callout_handle ch; /* Callout handle for timeouts */
|
||||
int buffill_pending;
|
||||
struct arpcom arpcom; /* Ethernet common part */
|
||||
int unit; /* unit number */
|
||||
bus_space_tag_t bst;
|
||||
bus_space_handle_t bsh;
|
||||
void *vx_intrhand;
|
||||
struct resource *vx_irq;
|
||||
struct resource *vx_res;
|
||||
#define MAX_MBS 8 /* # of mbufs we keep around */
|
||||
struct mbuf *mb[MAX_MBS]; /* spare mbuf storage. */
|
||||
int next_mb; /* Which mbuf to use next. */
|
||||
int last_mb; /* Last mbuf. */
|
||||
char vx_connectors; /* Connectors on this card. */
|
||||
char vx_connector; /* Connector to use. */
|
||||
short tx_start_thresh; /* Current TX_start_thresh. */
|
||||
int tx_succ_ok; /* # packets sent in sequence */
|
||||
/* w/o underrun */
|
||||
struct callout_handle ch; /* Callout handle for timeouts */
|
||||
int buffill_pending;
|
||||
};
|
||||
|
||||
#define CSR_WRITE_4(sc, reg, val) \
|
||||
|
|
Loading…
Reference in a new issue