mirror of
https://github.com/freebsd/freebsd-src
synced 2024-10-04 15:40:44 +00:00
- Encapsulate the code responsible for initializing a new TX descriptor
from an mbuf into the fxp_encap() function, as done in other drivers. - Don't waste time calling bus_dmamap_load_mbuf() if we know the mbuf chain is too long to fit in a TX descriptor, call m_defrag() first. - Convert fxp(4) to use bus_dmamap_load_mbuf_sg().
This commit is contained in:
Maxime Henrion
parent
ec3074aef1
commit
40c20505a8
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=143243
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@ -214,6 +214,7 @@ static void fxp_init_body(struct fxp_softc *sc);
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static void fxp_tick(void *xsc);
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static void fxp_start(struct ifnet *ifp);
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static void fxp_start_body(struct ifnet *ifp);
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static int fxp_encap(struct fxp_softc *sc, struct mbuf *m_head);
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static void fxp_stop(struct fxp_softc *sc);
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static void fxp_release(struct fxp_softc *sc);
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static int fxp_ioctl(struct ifnet *ifp, u_long command,
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@ -372,7 +373,7 @@ fxp_attach(device_t dev)
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struct ifnet *ifp;
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uint32_t val;
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uint16_t data, myea[ETHER_ADDR_LEN / 2];
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int i, rid, m1, m2, prefer_iomap, maxtxseg;
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int i, rid, m1, m2, prefer_iomap;
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int error, s;
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error = 0;
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@ -591,10 +592,13 @@ fxp_attach(device_t dev)
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/*
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* Allocate DMA tags and DMA safe memory.
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*/
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maxtxseg = sc->flags & FXP_FLAG_EXT_RFA ? FXP_NTXSEG - 1 : FXP_NTXSEG;
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sc->maxtxseg = FXP_NTXSEG;
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if (sc->flags & FXP_FLAG_EXT_RFA)
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sc->maxtxseg--;
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error = bus_dma_tag_create(NULL, 2, 0, BUS_SPACE_MAXADDR_32BIT,
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BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES * maxtxseg,
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maxtxseg, MCLBYTES, 0, busdma_lock_mutex, &Giant, &sc->fxp_mtag);
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BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES * sc->maxtxseg,
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sc->maxtxseg, MCLBYTES, 0, busdma_lock_mutex, &Giant,
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&sc->fxp_mtag);
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if (error) {
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device_printf(dev, "could not allocate dma tag\n");
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goto fail;
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@ -1178,47 +1182,6 @@ fxp_write_eeprom(struct fxp_softc *sc, u_short *data, int offset, int words)
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fxp_eeprom_putword(sc, offset + i, data[i]);
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}
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static void
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fxp_dma_map_txbuf(void *arg, bus_dma_segment_t *segs, int nseg,
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bus_size_t mapsize, int error)
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{
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struct fxp_softc *sc;
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struct fxp_cb_tx *txp;
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int i;
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if (error)
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return;
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KASSERT(nseg <= FXP_NTXSEG, ("too many DMA segments"));
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sc = arg;
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txp = sc->fxp_desc.tx_last->tx_next->tx_cb;
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for (i = 0; i < nseg; i++) {
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KASSERT(segs[i].ds_len <= MCLBYTES, ("segment size too large"));
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/*
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* If this is an 82550/82551, then we're using extended
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* TxCBs _and_ we're using checksum offload. This means
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* that the TxCB is really an IPCB. One major difference
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* between the two is that with plain extended TxCBs,
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* the bottom half of the TxCB contains two entries from
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* the TBD array, whereas IPCBs contain just one entry:
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* one entry (8 bytes) has been sacrificed for the TCP/IP
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* checksum offload control bits. So to make things work
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* right, we have to start filling in the TBD array
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* starting from a different place depending on whether
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* the chip is an 82550/82551 or not.
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*/
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if (sc->flags & FXP_FLAG_EXT_RFA) {
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txp->tbd[i + 1].tb_addr = htole32(segs[i].ds_addr);
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txp->tbd[i + 1].tb_size = htole32(segs[i].ds_len);
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} else {
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txp->tbd[i].tb_addr = htole32(segs[i].ds_addr);
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txp->tbd[i].tb_size = htole32(segs[i].ds_len);
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}
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}
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txp->tbd_number = nseg;
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}
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/*
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* Grab the softc lock and call the real fxp_start_body() routine
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*/
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@ -1241,21 +1204,18 @@ static void
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fxp_start_body(struct ifnet *ifp)
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{
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struct fxp_softc *sc = ifp->if_softc;
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struct fxp_tx *txp;
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struct mbuf *mb_head;
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int error;
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int error, txqueued;
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FXP_LOCK_ASSERT(sc, MA_OWNED);
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/*
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* See if we need to suspend xmit until the multicast filter
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* has been reprogrammed (which can only be done at the head
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* of the command chain).
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*/
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if (sc->need_mcsetup) {
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if (sc->need_mcsetup)
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return;
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}
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txp = NULL;
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/*
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* We're finished if there is nothing more to add to the list or if
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@ -1263,6 +1223,7 @@ fxp_start_body(struct ifnet *ifp)
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* NOTE: One TxCB is reserved to guarantee that fxp_mc_setup() can add
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* a NOP command when needed.
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*/
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txqueued = 0;
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while (!IFQ_DRV_IS_EMPTY(&ifp->if_snd) &&
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sc->tx_queued < FXP_NTXCB - 1) {
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@ -1273,45 +1234,75 @@ fxp_start_body(struct ifnet *ifp)
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if (mb_head == NULL)
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break;
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/*
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* Get pointer to next available tx desc.
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*/
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txp = sc->fxp_desc.tx_last->tx_next;
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error = fxp_encap(sc, mb_head);
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if (error)
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break;
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txqueued = 1;
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}
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bus_dmamap_sync(sc->cbl_tag, sc->cbl_map, BUS_DMASYNC_PREWRITE);
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/*
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* A note in Appendix B of the Intel 8255x 10/100 Mbps
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* Ethernet Controller Family Open Source Software
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* Developer Manual says:
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* Using software parsing is only allowed with legal
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* TCP/IP or UDP/IP packets.
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* ...
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* For all other datagrams, hardware parsing must
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* be used.
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* Software parsing appears to truncate ICMP and
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* fragmented UDP packets that contain one to three
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* bytes in the second (and final) mbuf of the packet.
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*/
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if (sc->flags & FXP_FLAG_EXT_RFA)
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txp->tx_cb->ipcb_ip_activation_high =
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FXP_IPCB_HARDWAREPARSING_ENABLE;
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/*
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* We're finished. If we added to the list, issue a RESUME to get DMA
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* going again if suspended.
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*/
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if (txqueued) {
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fxp_scb_wait(sc);
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fxp_scb_cmd(sc, FXP_SCB_COMMAND_CU_RESUME);
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}
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}
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/*
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* Deal with TCP/IP checksum offload. Note that
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* in order for TCP checksum offload to work,
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* the pseudo header checksum must have already
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* been computed and stored in the checksum field
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* in the TCP header. The stack should have
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* already done this for us.
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*/
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static int
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fxp_encap(struct fxp_softc *sc, struct mbuf *m_head)
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{
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struct ifnet *ifp;
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struct mbuf *m;
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struct fxp_tx *txp;
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struct fxp_cb_tx *cbp;
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bus_dma_segment_t segs[FXP_NTXSEG];
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int chainlen, error, i, nseg;
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FXP_LOCK_ASSERT(sc, MA_OWNED);
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ifp = &sc->sc_if;
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/*
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* Get pointer to next available tx desc.
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*/
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txp = sc->fxp_desc.tx_last->tx_next;
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/*
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* A note in Appendix B of the Intel 8255x 10/100 Mbps
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* Ethernet Controller Family Open Source Software
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* Developer Manual says:
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* Using software parsing is only allowed with legal
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* TCP/IP or UDP/IP packets.
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* ...
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* For all other datagrams, hardware parsing must
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* be used.
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* Software parsing appears to truncate ICMP and
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* fragmented UDP packets that contain one to three
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* bytes in the second (and final) mbuf of the packet.
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*/
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if (sc->flags & FXP_FLAG_EXT_RFA)
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txp->tx_cb->ipcb_ip_activation_high =
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FXP_IPCB_HARDWAREPARSING_ENABLE;
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/*
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* Deal with TCP/IP checksum offload. Note that
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* in order for TCP checksum offload to work,
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* the pseudo header checksum must have already
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* been computed and stored in the checksum field
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* in the TCP header. The stack should have
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* already done this for us.
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*/
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if (m_head->m_pkthdr.csum_flags) {
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if (m_head->m_pkthdr.csum_flags & CSUM_DELAY_DATA) {
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txp->tx_cb->ipcb_ip_schedule =
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FXP_IPCB_TCPUDP_CHECKSUM_ENABLE;
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if (m_head->m_pkthdr.csum_flags & CSUM_TCP)
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txp->tx_cb->ipcb_ip_schedule |=
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FXP_IPCB_TCP_PACKET;
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}
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if (mb_head->m_pkthdr.csum_flags) {
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if (mb_head->m_pkthdr.csum_flags & CSUM_DELAY_DATA) {
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txp->tx_cb->ipcb_ip_schedule =
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FXP_IPCB_TCPUDP_CHECKSUM_ENABLE;
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if (mb_head->m_pkthdr.csum_flags & CSUM_TCP)
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txp->tx_cb->ipcb_ip_schedule |=
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FXP_IPCB_TCP_PACKET;
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}
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#ifdef FXP_IP_CSUM_WAR
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/*
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* XXX The 82550 chip appears to have trouble
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@ -1335,132 +1326,139 @@ fxp_start_body(struct ifnet *ifp)
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* the header sizes/offsets vary.
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*/
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if (mb_head->m_pkthdr.csum_flags & CSUM_IP) {
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if (mb_head->m_pkthdr.len < 38) {
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struct ip *ip;
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mb_head->m_data += ETHER_HDR_LEN;
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ip = mtod(mb_head, struct ip *);
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ip->ip_sum = in_cksum(mb_head,
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ip->ip_hl << 2);
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mb_head->m_data -= ETHER_HDR_LEN;
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} else {
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txp->tx_cb->ipcb_ip_activation_high =
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FXP_IPCB_HARDWAREPARSING_ENABLE;
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txp->tx_cb->ipcb_ip_schedule |=
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FXP_IPCB_IP_CHECKSUM_ENABLE;
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}
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}
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#endif
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}
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/*
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* Go through each of the mbufs in the chain and initialize
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* the transmit buffer descriptors with the physical address
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* and size of the mbuf.
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*/
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error = bus_dmamap_load_mbuf(sc->fxp_mtag, txp->tx_map,
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mb_head, fxp_dma_map_txbuf, sc, 0);
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if (error && error != EFBIG) {
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device_printf(sc->dev, "can't map mbuf (error %d)\n",
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error);
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m_freem(mb_head);
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break;
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}
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if (error) {
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struct mbuf *mn;
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/*
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* We ran out of segments. We have to recopy this
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* mbuf chain first. Bail out if we can't get the
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* new buffers.
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*/
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mn = m_defrag(mb_head, M_DONTWAIT);
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if (mn == NULL) {
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m_freem(mb_head);
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break;
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if (m_head->m_pkthdr.csum_flags & CSUM_IP) {
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if (m_head->m_pkthdr.len < 38) {
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struct ip *ip;
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m_head->m_data += ETHER_HDR_LEN;
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ip = mtod(mb_head, struct ip *);
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ip->ip_sum = in_cksum(mb_head, ip->ip_hl << 2);
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m_head->m_data -= ETHER_HDR_LEN;
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} else {
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mb_head = mn;
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}
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error = bus_dmamap_load_mbuf(sc->fxp_mtag, txp->tx_map,
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mb_head, fxp_dma_map_txbuf, sc, 0);
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if (error) {
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device_printf(sc->dev,
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"can't map mbuf (error %d)\n", error);
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m_freem(mb_head);
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break;
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txp->tx_cb->ipcb_ip_activation_high =
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FXP_IPCB_HARDWAREPARSING_ENABLE;
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txp->tx_cb->ipcb_ip_schedule |=
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FXP_IPCB_IP_CHECKSUM_ENABLE;
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}
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}
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bus_dmamap_sync(sc->fxp_mtag, txp->tx_map,
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BUS_DMASYNC_PREWRITE);
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txp->tx_mbuf = mb_head;
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txp->tx_cb->cb_status = 0;
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txp->tx_cb->byte_count = 0;
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if (sc->tx_queued != FXP_CXINT_THRESH - 1) {
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txp->tx_cb->cb_command =
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htole16(sc->tx_cmd | FXP_CB_COMMAND_SF |
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FXP_CB_COMMAND_S);
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} else {
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txp->tx_cb->cb_command =
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htole16(sc->tx_cmd | FXP_CB_COMMAND_SF |
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FXP_CB_COMMAND_S | FXP_CB_COMMAND_I);
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/*
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* Set a 5 second timer just in case we don't hear
|
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* from the card again.
|
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*/
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ifp->if_timer = 5;
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}
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txp->tx_cb->tx_threshold = tx_threshold;
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/*
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* Advance the end of list forward.
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*/
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#ifdef __alpha__
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/*
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* On platforms which can't access memory in 16-bit
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* granularities, we must prevent the card from DMA'ing
|
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* up the status while we update the command field.
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* This could cause us to overwrite the completion status.
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* XXX This is probably bogus and we're _not_ looking
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* for atomicity here.
|
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*/
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atomic_clear_16(&sc->fxp_desc.tx_last->tx_cb->cb_command,
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htole16(FXP_CB_COMMAND_S));
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#else
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sc->fxp_desc.tx_last->tx_cb->cb_command &=
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htole16(~FXP_CB_COMMAND_S);
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#endif /*__alpha__*/
|
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sc->fxp_desc.tx_last = txp;
|
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|
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/*
|
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* Advance the beginning of the list forward if there are
|
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* no other packets queued (when nothing is queued, tx_first
|
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* sits on the last TxCB that was sent out).
|
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*/
|
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if (sc->tx_queued == 0)
|
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sc->fxp_desc.tx_first = txp;
|
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|
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sc->tx_queued++;
|
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|
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/*
|
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* Pass packet to bpf if there is a listener.
|
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*/
|
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BPF_MTAP(ifp, mb_head);
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#endif
|
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}
|
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|
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chainlen = 0;
|
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for (m = m_head; m != NULL && chainlen <= sc->maxtxseg; m = m->m_next)
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chainlen++;
|
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if (chainlen > sc->maxtxseg) {
|
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struct mbuf *mn;
|
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|
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/*
|
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* We ran out of segments. We have to recopy this
|
||||
* mbuf chain first. Bail out if we can't get the
|
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* new buffers.
|
||||
*/
|
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mn = m_defrag(m_head, M_DONTWAIT);
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if (mn == NULL) {
|
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m_freem(m_head);
|
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return (-1);
|
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} else {
|
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m_head = mn;
|
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}
|
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}
|
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bus_dmamap_sync(sc->cbl_tag, sc->cbl_map, BUS_DMASYNC_PREWRITE);
|
||||
|
||||
/*
|
||||
* We're finished. If we added to the list, issue a RESUME to get DMA
|
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* going again if suspended.
|
||||
* Go through each of the mbufs in the chain and initialize
|
||||
* the transmit buffer descriptors with the physical address
|
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* and size of the mbuf.
|
||||
*/
|
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if (txp != NULL) {
|
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fxp_scb_wait(sc);
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fxp_scb_cmd(sc, FXP_SCB_COMMAND_CU_RESUME);
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error = bus_dmamap_load_mbuf_sg(sc->fxp_mtag, txp->tx_map,
|
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m_head, segs, &nseg, 0);
|
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if (error) {
|
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device_printf(sc->dev, "can't map mbuf (error %d)\n", error);
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m_freem(m_head);
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return (-1);
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}
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|
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KASSERT(nseg <= sc->maxtxseg, ("too many DMA segments"));
|
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|
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cbp = txp->tx_cb;
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for (i = 0; i < nseg; i++) {
|
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KASSERT(segs[i].ds_len <= MCLBYTES, ("segment size too large"));
|
||||
/*
|
||||
* If this is an 82550/82551, then we're using extended
|
||||
* TxCBs _and_ we're using checksum offload. This means
|
||||
* that the TxCB is really an IPCB. One major difference
|
||||
* between the two is that with plain extended TxCBs,
|
||||
* the bottom half of the TxCB contains two entries from
|
||||
* the TBD array, whereas IPCBs contain just one entry:
|
||||
* one entry (8 bytes) has been sacrificed for the TCP/IP
|
||||
* checksum offload control bits. So to make things work
|
||||
* right, we have to start filling in the TBD array
|
||||
* starting from a different place depending on whether
|
||||
* the chip is an 82550/82551 or not.
|
||||
*/
|
||||
if (sc->flags & FXP_FLAG_EXT_RFA) {
|
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cbp->tbd[i + 1].tb_addr = htole32(segs[i].ds_addr);
|
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cbp->tbd[i + 1].tb_size = htole32(segs[i].ds_len);
|
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} else {
|
||||
cbp->tbd[i].tb_addr = htole32(segs[i].ds_addr);
|
||||
cbp->tbd[i].tb_size = htole32(segs[i].ds_len);
|
||||
}
|
||||
}
|
||||
cbp->tbd_number = nseg;
|
||||
|
||||
bus_dmamap_sync(sc->fxp_mtag, txp->tx_map, BUS_DMASYNC_PREWRITE);
|
||||
txp->tx_mbuf = m_head;
|
||||
txp->tx_cb->cb_status = 0;
|
||||
txp->tx_cb->byte_count = 0;
|
||||
if (sc->tx_queued != FXP_CXINT_THRESH - 1) {
|
||||
txp->tx_cb->cb_command =
|
||||
htole16(sc->tx_cmd | FXP_CB_COMMAND_SF |
|
||||
FXP_CB_COMMAND_S);
|
||||
} else {
|
||||
txp->tx_cb->cb_command =
|
||||
htole16(sc->tx_cmd | FXP_CB_COMMAND_SF |
|
||||
FXP_CB_COMMAND_S | FXP_CB_COMMAND_I);
|
||||
/*
|
||||
* Set a 5 second timer just in case we don't hear
|
||||
* from the card again.
|
||||
*/
|
||||
ifp->if_timer = 5;
|
||||
}
|
||||
txp->tx_cb->tx_threshold = tx_threshold;
|
||||
|
||||
/*
|
||||
* Advance the end of list forward.
|
||||
*/
|
||||
|
||||
#ifdef __alpha__
|
||||
/*
|
||||
* On platforms which can't access memory in 16-bit
|
||||
* granularities, we must prevent the card from DMA'ing
|
||||
* up the status while we update the command field.
|
||||
* This could cause us to overwrite the completion status.
|
||||
* XXX This is probably bogus and we're _not_ looking
|
||||
* for atomicity here.
|
||||
*/
|
||||
atomic_clear_16(&sc->fxp_desc.tx_last->tx_cb->cb_command,
|
||||
htole16(FXP_CB_COMMAND_S));
|
||||
#else
|
||||
sc->fxp_desc.tx_last->tx_cb->cb_command &= htole16(~FXP_CB_COMMAND_S);
|
||||
#endif /*__alpha__*/
|
||||
sc->fxp_desc.tx_last = txp;
|
||||
|
||||
/*
|
||||
* Advance the beginning of the list forward if there are
|
||||
* no other packets queued (when nothing is queued, tx_first
|
||||
* sits on the last TxCB that was sent out).
|
||||
*/
|
||||
if (sc->tx_queued == 0)
|
||||
sc->fxp_desc.tx_first = txp;
|
||||
|
||||
sc->tx_queued++;
|
||||
|
||||
/*
|
||||
* Pass packet to bpf if there is a listener.
|
||||
*/
|
||||
BPF_MTAP(ifp, m_head);
|
||||
return (0);
|
||||
}
|
||||
|
||||
#ifdef DEVICE_POLLING
|
||||
|
|
|
|||
|
|
@ -171,6 +171,7 @@ struct fxp_softc {
|
|||
bus_dmamap_t mcs_map; /* DMA map for the multicast setup */
|
||||
bus_dmamap_t spare_map; /* spare DMA map */
|
||||
struct fxp_desc_list fxp_desc; /* descriptors management struct */
|
||||
int maxtxseg; /* maximum # of TX segments */
|
||||
int tx_queued; /* # of active TxCB's */
|
||||
int need_mcsetup; /* multicast filter needs programming */
|
||||
struct fxp_stats *fxp_stats; /* Pointer to interface stats */
|
||||
|
|
|
|||
Loading…
Reference in a new issue