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Name these gpio pins better, they are on an external PLD and not the same as

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the cpu wired gpio.
This commit is contained in:
Andrew Thompson 2011-10-12 20:58:54 +00:00
parent bbdb7f2f2e
commit 3cd6db794c
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=226325
1 changed files with 5 additions and 5 deletions
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10
sys/arm/xscale/ixp425/cambria_gpio.c
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@ -96,11 +96,11 @@ struct cambria_gpio_pin {
extern struct ixp425_softc *ixp425_softc;
static struct cambria_gpio_pin cambria_gpio_pins[GPIO_PINS] = {
{ "GPIO0", 0, GPIO_PIN_OUTPUT },
{ "GPIO1", 1, GPIO_PIN_OUTPUT },
{ "GPIO2", 2, GPIO_PIN_OUTPUT },
{ "GPIO3", 3, GPIO_PIN_OUTPUT },
{ "GPIO4", 4, GPIO_PIN_OUTPUT },
{ "PLD0", 0, GPIO_PIN_OUTPUT },
{ "PLD1", 1, GPIO_PIN_OUTPUT },
{ "PLD2", 2, GPIO_PIN_OUTPUT },
{ "PLD3", 3, GPIO_PIN_OUTPUT },
{ "PLD4", 4, GPIO_PIN_OUTPUT },
};
/*