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Collapse several adjacent .if's into .if/.elif.
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parent
222be03974
commit
39ebd90532
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=136895
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@ -5,17 +5,14 @@ SRCS+= interp_backslash.c interp_parse.c ls.c misc.c
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SRCS+= module.c panic.c
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.if ${MACHINE} == "i386" || ${MACHINE_ARCH} == "amd64"
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SRCS+= load_elf32.c load_elf32_obj.c load_elf64.c load_elf64_obj.c
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SRCS+= reloc_elf32.c reloc_elf64.c
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.endif
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.if ${MACHINE} == "pc98"
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SRCS+= load_elf32.c load_elf32_obj.c
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SRCS+= reloc_elf32.c
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.endif
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.if ${MACHINE_ARCH} == "powerpc"
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SRCS+= load_elf32.c load_elf32_obj.c reloc_elf32.c
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SRCS+= load_elf64.c load_elf64_obj.c reloc_elf64.c
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.elif ${MACHINE} == "pc98"
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SRCS+= load_elf32.c load_elf32_obj.c reloc_elf32.c
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.elif ${MACHINE_ARCH} == "powerpc"
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SRCS+= load_elf32.c reloc_elf32.c
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.endif
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.if ${MACHINE_ARCH} == "sparc64" || ${MACHINE_ARCH} == "ia64" || ${MACHINE_ARCH} == "alpha"
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.elif ${MACHINE_ARCH} == "sparc64" || ${MACHINE_ARCH} == "ia64" || \
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${MACHINE_ARCH} == "alpha"
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SRCS+= load_elf64.c reloc_elf64.c
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.endif
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