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Do "selective" reset rather than full reset...the manual specifically
says not to do the full reset because it can lock up the PCI bus if the chip is active. Added various PORT command definitions to facilitate this.
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parent
6e39e59963
commit
33d14d8671
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=22255
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@ -243,9 +243,9 @@ fxp_attach(config_id, unit)
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}
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/*
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* Issue a software reset.
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* Reset to a stable state.
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*/
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sc->csr->port = 0;
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sc->csr->port = FXP_PORT_SELECTIVE_RESET;
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DELAY(10);
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/*
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@ -739,7 +739,7 @@ fxp_stop(sc)
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/*
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* Issue software reset
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*/
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sc->csr->port = 0;
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sc->csr->port = FXP_PORT_SELECTIVE_RESET;
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DELAY(10);
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/*
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@ -47,6 +47,11 @@ struct fxp_csr {
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volatile u_int32_t mdi_control;
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};
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#define FXP_PORT_SOFTWARE_RESET 0
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#define FXP_PORT_SELFTEST 1
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#define FXP_PORT_SELECTIVE_RESET 2
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#define FXP_PORT_DUMP 3
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#define FXP_SCB_RUS_IDLE 0
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#define FXP_SCB_RUS_SUSPENDED 1
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#define FXP_SCB_RUS_NORESOURCES 2
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@ -243,9 +243,9 @@ fxp_attach(config_id, unit)
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}
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/*
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* Issue a software reset.
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* Reset to a stable state.
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*/
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sc->csr->port = 0;
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sc->csr->port = FXP_PORT_SELECTIVE_RESET;
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DELAY(10);
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/*
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@ -739,7 +739,7 @@ fxp_stop(sc)
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/*
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* Issue software reset
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*/
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sc->csr->port = 0;
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sc->csr->port = FXP_PORT_SELECTIVE_RESET;
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DELAY(10);
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/*
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@ -47,6 +47,11 @@ struct fxp_csr {
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volatile u_int32_t mdi_control;
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};
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#define FXP_PORT_SOFTWARE_RESET 0
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#define FXP_PORT_SELFTEST 1
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#define FXP_PORT_SELECTIVE_RESET 2
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#define FXP_PORT_DUMP 3
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#define FXP_SCB_RUS_IDLE 0
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#define FXP_SCB_RUS_SUSPENDED 1
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#define FXP_SCB_RUS_NORESOURCES 2
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