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Implement PLL configuration override support, similar to what openwrt
implements.
This commit is contained in:
parent
ceec92152b
commit
337ef3cad0
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=234919
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@ -101,6 +101,7 @@ typedef enum {
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ARGE_DBG_RX = 0x00000008,
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ARGE_DBG_ERR = 0x00000010,
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ARGE_DBG_RESET = 0x00000020,
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ARGE_DBG_PLL = 0x00000040,
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} arge_debug_flags;
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static const char * arge_miicfg_str[] = {
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@ -331,6 +332,34 @@ arge_reset_miibus(struct arge_softc *sc)
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DELAY(100);
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}
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static void
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arge_fetch_pll_config(struct arge_softc *sc)
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{
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long int val;
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if (resource_long_value(device_get_name(sc->arge_dev),
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device_get_unit(sc->arge_dev),
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"pll_10", &val) == 0) {
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sc->arge_pllcfg.pll_10 = val;
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device_printf(sc->arge_dev, "%s: pll_10 = 0x%x\n",
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__func__, (int) val);
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}
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if (resource_long_value(device_get_name(sc->arge_dev),
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device_get_unit(sc->arge_dev),
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"pll_100", &val) == 0) {
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sc->arge_pllcfg.pll_100 = val;
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device_printf(sc->arge_dev, "%s: pll_100 = 0x%x\n",
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__func__, (int) val);
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}
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if (resource_long_value(device_get_name(sc->arge_dev),
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device_get_unit(sc->arge_dev),
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"pll_1000", &val) == 0) {
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sc->arge_pllcfg.pll_1000 = val;
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device_printf(sc->arge_dev, "%s: pll_1000 = 0x%x\n",
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__func__, (int) val);
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}
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}
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static int
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arge_attach(device_t dev)
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{
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@ -371,6 +400,11 @@ arge_attach(device_t dev)
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KASSERT(((sc->arge_mac_unit == 0) || (sc->arge_mac_unit == 1)),
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("if_arge: Only MAC0 and MAC1 supported"));
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/*
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* Fetch the PLL configuration.
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*/
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arge_fetch_pll_config(sc);
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/*
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* Get the MII configuration, if applicable.
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*/
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@ -821,7 +855,7 @@ arge_set_pll(struct arge_softc *sc, int media, int duplex)
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uint32_t fifo_tx, pll;
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int if_speed;
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ARGEDEBUG(sc, ARGE_DBG_MII, "set_pll(%04x, %s)\n", media,
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ARGEDEBUG(sc, ARGE_DBG_PLL, "set_pll(%04x, %s)\n", media,
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duplex == IFM_FDX ? "full" : "half");
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cfg = ARGE_READ(sc, AR71XX_MAC_CFG2);
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cfg &= ~(MAC_CFG2_IFACE_MODE_1000
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@ -859,7 +893,7 @@ arge_set_pll(struct arge_softc *sc, int media, int duplex)
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"Unknown media %d\n", media);
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}
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ARGEDEBUG(sc, ARGE_DBG_MII, "%s: if_speed=%d\n", __func__, if_speed);
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ARGEDEBUG(sc, ARGE_DBG_PLL, "%s: if_speed=%d\n", __func__, if_speed);
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switch (ar71xx_soc) {
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case AR71XX_SOC_AR7240:
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@ -881,8 +915,18 @@ arge_set_pll(struct arge_softc *sc, int media, int duplex)
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rx_filtmask);
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ARGE_WRITE(sc, AR71XX_MAC_FIFO_TX_THRESHOLD, fifo_tx);
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/* set PLL registers */
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/* fetch PLL registers */
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pll = ar71xx_device_get_eth_pll(sc->arge_mac_unit, if_speed);
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ARGEDEBUG(sc, ARGE_DBG_PLL, "%s: pll=0x%x\n", __func__, pll);
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/* Override if required by platform data */
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if (if_speed == 10 && sc->arge_pllcfg.pll_10 != 0)
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pll = sc->arge_pllcfg.pll_10;
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else if (if_speed == 100 && sc->arge_pllcfg.pll_100 != 0)
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pll = sc->arge_pllcfg.pll_100;
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else if (if_speed == 1000 && sc->arge_pllcfg.pll_1000 != 0)
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pll = sc->arge_pllcfg.pll_1000;
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ARGEDEBUG(sc, ARGE_DBG_PLL, "%s: final pll=0x%x\n", __func__, pll);
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/* XXX ensure pll != 0 */
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ar71xx_device_set_pll_ge(sc->arge_mac_unit, if_speed, pll);
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@ -118,6 +118,15 @@ struct arge_ring_data {
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bus_addr_t arge_tx_ring_paddr;
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};
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/*
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* Allow PLL values to be overridden.
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*/
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struct arge_pll_data {
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uint32_t pll_10;
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uint32_t pll_100;
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uint32_t pll_1000;
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};
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struct arge_softc {
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struct ifnet *arge_ifp; /* interface info */
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device_t arge_dev;
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@ -136,6 +145,7 @@ struct arge_softc {
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device_t arge_miibus;
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device_t arge_miiproxy;
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ar71xx_mii_mode arge_miicfg;
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struct arge_pll_data arge_pllcfg;
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bus_dma_tag_t arge_parent_tag;
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bus_dma_tag_t arge_tag;
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struct mtx arge_mtx;
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