mirror of
https://github.com/freebsd/freebsd-src
synced 2024-09-19 16:23:29 +00:00
Updated pcaudio.c to latest from 1.1.5.1
Enabled timer reprogramming in clock.c (this could use more work). Obtained from: FreeBSD-1.1.5.1
This commit is contained in:
Søren Schmidt
parent
96a1d4decb
commit
336abda6cd
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=3185
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@ -34,14 +34,14 @@
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* SUCH DAMAGE.
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*
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* from: @(#)clock.c 7.2 (Berkeley) 5/12/91
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* $Id: clock.c,v 1.20 1994/09/20 00:31:05 ache Exp $
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* $Id: clock.c,v 1.21 1994/09/20 21:20:46 bde Exp $
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*/
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/*
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* inittodr, settodr and support routines written
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* by Christoph Robitschko <chmr@edvz.tu-graz.ac.at>
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*
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* reintroduced and updated by Chris Stenton <chris@gnome.co.uk> 8/10/94
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/*
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* inittodr, settodr and support routines written
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* by Christoph Robitschko <chmr@edvz.tu-graz.ac.at>
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*
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* reintroduced and updated by Chris Stenton <chris@gnome.co.uk> 8/10/94
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*/
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/*
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@ -82,59 +82,21 @@ static void (*new_function)();
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static u_int new_rate;
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static u_int hardclock_divisor;
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static const u_char daysinmonth[] = {31,28,31,30,31,30,31,31,30,31,30,31};
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static u_char rtc_statusa = RTCSA_DIVIDER | RTCSA_NOPROF;
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#ifdef I586_CPU
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int pentium_mhz = 0;
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#endif
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#if 0
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void
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clkintr(frame)
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struct clockframe frame;
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clkintr(struct clockframe frame)
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{
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hardclock(&frame);
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}
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static u_char rtc_statusa = RTCSA_DIVIDER | RTCSA_NOPROF;
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/*
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* This routine receives statistical clock interrupts from the RTC.
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* As explained above, these occur at 128 interrupts per second.
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* When profiling, we receive interrupts at a rate of 1024 Hz.
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*
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* This does not actually add as much overhead as it sounds, because
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* when the statistical clock is active, the hardclock driver no longer
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* needs to keep (inaccurate) statistics on its own. This decouples
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* statistics gathering from scheduling interrupts.
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*
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* The RTC chip requires that we read status register C (RTC_INTR)
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* to acknowledge an interrupt, before it will generate the next one.
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*/
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#else
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void
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rtcintr(struct clockframe frame)
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{
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u_char stat;
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stat = rtcin(RTC_INTR);
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if(stat & RTCIR_PERIOD) {
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statclock(&frame);
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}
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}
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#ifdef DEBUG
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void
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printrtc(void)
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{
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outb(IO_RTC, RTC_STATUSA);
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printf("RTC status A = %x", inb(IO_RTC+1));
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outb(IO_RTC, RTC_STATUSB);
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printf(", B = %x", inb(IO_RTC+1));
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outb(IO_RTC, RTC_INTR);
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printf(", C = %x\n", inb(IO_RTC+1));
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}
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#endif
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#if 0
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void
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timerintr(struct clockframe frame)
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clkintr(struct clockframe frame)
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{
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timer_func(&frame);
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switch (timer0_state) {
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@ -173,7 +135,6 @@ timerintr(struct clockframe frame)
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break;
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}
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}
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#endif
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int
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@ -181,14 +142,12 @@ acquire_timer0(int rate, void (*function)() )
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{
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if (timer0_state || !function)
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return -1;
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new_function = function;
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new_rate = rate;
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timer0_state = 2;
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return 0;
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}
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int
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acquire_timer2(int mode)
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{
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@ -199,7 +158,6 @@ acquire_timer2(int mode)
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return 0;
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}
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int
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release_timer0()
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{
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@ -209,7 +167,6 @@ release_timer0()
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return 0;
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}
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int
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release_timer2()
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{
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@ -220,6 +177,41 @@ release_timer2()
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return 0;
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}
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/*
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* This routine receives statistical clock interrupts from the RTC.
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* As explained above, these occur at 128 interrupts per second.
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* When profiling, we receive interrupts at a rate of 1024 Hz.
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*
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* This does not actually add as much overhead as it sounds, because
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* when the statistical clock is active, the hardclock driver no longer
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* needs to keep (inaccurate) statistics on its own. This decouples
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* statistics gathering from scheduling interrupts.
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*
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* The RTC chip requires that we read status register C (RTC_INTR)
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* to acknowledge an interrupt, before it will generate the next one.
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*/
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void
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rtcintr(struct clockframe frame)
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{
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u_char stat;
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stat = rtcin(RTC_INTR);
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if(stat & RTCIR_PERIOD) {
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statclock(&frame);
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}
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}
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#ifdef DEBUG
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void
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printrtc(void)
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{
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outb(IO_RTC, RTC_STATUSA);
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printf("RTC status A = %x", inb(IO_RTC+1));
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outb(IO_RTC, RTC_STATUSB);
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printf(", B = %x", inb(IO_RTC+1));
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outb(IO_RTC, RTC_INTR);
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printf(", C = %x\n", inb(IO_RTC+1));
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}
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#endif
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static int
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getit()
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@ -324,17 +316,14 @@ DELAY(int n)
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#endif
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}
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static void
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sysbeepstop(chan)
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void *chan;
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sysbeepstop(void *chan)
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{
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outb(IO_PPI, inb(IO_PPI)&0xFC); /* disable counter2 output to speaker */
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release_timer2();
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beeping = 0;
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}
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int
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sysbeep(int pitch, int period)
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{
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@ -353,7 +342,6 @@ sysbeep(int pitch, int period)
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return 0;
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}
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/*
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* RTC support routines
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*/
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@ -382,7 +370,6 @@ readrtc(int port)
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return(bcd2int(rtcin(port)));
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}
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void
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startrtclock()
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{
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@ -401,21 +388,18 @@ startrtclock()
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outb (IO_RTC+1, rtc_statusa);
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outb (IO_RTC, RTC_STATUSB);
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outb (IO_RTC+1, RTCSB_24HR);
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outb (IO_RTC, RTC_DIAG);
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if (s = inb (IO_RTC+1))
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printf("RTC BIOS diagnostic error %b\n", s, RTCDG_BITS);
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writertc(RTC_DIAG, 0);
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}
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/*
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* Initialize the time of day register, based on the time base which is, e.g.
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* from a filesystem.
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*/
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void
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inittodr(base)
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time_t base;
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inittodr(time_t base)
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{
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unsigned long sec, days;
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int yd;
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@ -467,7 +451,6 @@ time_t base;
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printf("Check and reset the date immediately!\n");
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}
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/*
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* Write system time back to RTC
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*/
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@ -480,7 +463,7 @@ void resettodr()
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tm = time.tv_sec;
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splx(s);
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/* First, disable clock updates */
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/* First, disable clock updates */
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writertc(RTC_STATUSB, RTCSB_HALT | RTCSB_24HR);
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/* Calculate local time to put in CMOS */
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@ -517,7 +500,6 @@ void resettodr()
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writertc(RTC_STATUSB, RTCSB_PINTR | RTCSB_24HR);
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}
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#ifdef garbage
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/*
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* Initialze the time of day register, based on the time base which is, e.g.
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@ -34,14 +34,14 @@
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* SUCH DAMAGE.
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*
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* from: @(#)clock.c 7.2 (Berkeley) 5/12/91
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||||
* $Id: clock.c,v 1.20 1994/09/20 00:31:05 ache Exp $
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* $Id: clock.c,v 1.21 1994/09/20 21:20:46 bde Exp $
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||||
*/
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||||
|
||||
/*
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* inittodr, settodr and support routines written
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||||
* by Christoph Robitschko <chmr@edvz.tu-graz.ac.at>
|
||||
*
|
||||
* reintroduced and updated by Chris Stenton <chris@gnome.co.uk> 8/10/94
|
||||
/*
|
||||
* inittodr, settodr and support routines written
|
||||
* by Christoph Robitschko <chmr@edvz.tu-graz.ac.at>
|
||||
*
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* reintroduced and updated by Chris Stenton <chris@gnome.co.uk> 8/10/94
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*/
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/*
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|
@ -82,59 +82,21 @@ static void (*new_function)();
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static u_int new_rate;
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static u_int hardclock_divisor;
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static const u_char daysinmonth[] = {31,28,31,30,31,30,31,31,30,31,30,31};
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static u_char rtc_statusa = RTCSA_DIVIDER | RTCSA_NOPROF;
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#ifdef I586_CPU
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int pentium_mhz = 0;
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#endif
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#if 0
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void
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clkintr(frame)
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struct clockframe frame;
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clkintr(struct clockframe frame)
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{
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hardclock(&frame);
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}
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static u_char rtc_statusa = RTCSA_DIVIDER | RTCSA_NOPROF;
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|
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/*
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||||
* This routine receives statistical clock interrupts from the RTC.
|
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* As explained above, these occur at 128 interrupts per second.
|
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* When profiling, we receive interrupts at a rate of 1024 Hz.
|
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*
|
||||
* This does not actually add as much overhead as it sounds, because
|
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* when the statistical clock is active, the hardclock driver no longer
|
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* needs to keep (inaccurate) statistics on its own. This decouples
|
||||
* statistics gathering from scheduling interrupts.
|
||||
*
|
||||
* The RTC chip requires that we read status register C (RTC_INTR)
|
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* to acknowledge an interrupt, before it will generate the next one.
|
||||
*/
|
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#else
|
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void
|
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rtcintr(struct clockframe frame)
|
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{
|
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u_char stat;
|
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stat = rtcin(RTC_INTR);
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if(stat & RTCIR_PERIOD) {
|
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statclock(&frame);
|
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}
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}
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#ifdef DEBUG
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void
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printrtc(void)
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{
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outb(IO_RTC, RTC_STATUSA);
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printf("RTC status A = %x", inb(IO_RTC+1));
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outb(IO_RTC, RTC_STATUSB);
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printf(", B = %x", inb(IO_RTC+1));
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outb(IO_RTC, RTC_INTR);
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printf(", C = %x\n", inb(IO_RTC+1));
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}
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#endif
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#if 0
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void
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timerintr(struct clockframe frame)
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clkintr(struct clockframe frame)
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{
|
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timer_func(&frame);
|
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switch (timer0_state) {
|
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|
|
@ -173,7 +135,6 @@ timerintr(struct clockframe frame)
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break;
|
||||
}
|
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}
|
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|
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#endif
|
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|
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int
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|
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@ -181,14 +142,12 @@ acquire_timer0(int rate, void (*function)() )
|
|||
{
|
||||
if (timer0_state || !function)
|
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return -1;
|
||||
|
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new_function = function;
|
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new_rate = rate;
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timer0_state = 2;
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return 0;
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}
|
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|
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|
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int
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acquire_timer2(int mode)
|
||||
{
|
||||
|
|
@ -199,7 +158,6 @@ acquire_timer2(int mode)
|
|||
return 0;
|
||||
}
|
||||
|
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|
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int
|
||||
release_timer0()
|
||||
{
|
||||
|
|
@ -209,7 +167,6 @@ release_timer0()
|
|||
return 0;
|
||||
}
|
||||
|
||||
|
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int
|
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release_timer2()
|
||||
{
|
||||
|
|
@ -220,6 +177,41 @@ release_timer2()
|
|||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* This routine receives statistical clock interrupts from the RTC.
|
||||
* As explained above, these occur at 128 interrupts per second.
|
||||
* When profiling, we receive interrupts at a rate of 1024 Hz.
|
||||
*
|
||||
* This does not actually add as much overhead as it sounds, because
|
||||
* when the statistical clock is active, the hardclock driver no longer
|
||||
* needs to keep (inaccurate) statistics on its own. This decouples
|
||||
* statistics gathering from scheduling interrupts.
|
||||
*
|
||||
* The RTC chip requires that we read status register C (RTC_INTR)
|
||||
* to acknowledge an interrupt, before it will generate the next one.
|
||||
*/
|
||||
void
|
||||
rtcintr(struct clockframe frame)
|
||||
{
|
||||
u_char stat;
|
||||
stat = rtcin(RTC_INTR);
|
||||
if(stat & RTCIR_PERIOD) {
|
||||
statclock(&frame);
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef DEBUG
|
||||
void
|
||||
printrtc(void)
|
||||
{
|
||||
outb(IO_RTC, RTC_STATUSA);
|
||||
printf("RTC status A = %x", inb(IO_RTC+1));
|
||||
outb(IO_RTC, RTC_STATUSB);
|
||||
printf(", B = %x", inb(IO_RTC+1));
|
||||
outb(IO_RTC, RTC_INTR);
|
||||
printf(", C = %x\n", inb(IO_RTC+1));
|
||||
}
|
||||
#endif
|
||||
|
||||
static int
|
||||
getit()
|
||||
|
|
@ -324,17 +316,14 @@ DELAY(int n)
|
|||
#endif
|
||||
}
|
||||
|
||||
|
||||
static void
|
||||
sysbeepstop(chan)
|
||||
void *chan;
|
||||
sysbeepstop(void *chan)
|
||||
{
|
||||
outb(IO_PPI, inb(IO_PPI)&0xFC); /* disable counter2 output to speaker */
|
||||
release_timer2();
|
||||
beeping = 0;
|
||||
}
|
||||
|
||||
|
||||
int
|
||||
sysbeep(int pitch, int period)
|
||||
{
|
||||
|
|
@ -353,7 +342,6 @@ sysbeep(int pitch, int period)
|
|||
return 0;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* RTC support routines
|
||||
*/
|
||||
|
|
@ -382,7 +370,6 @@ readrtc(int port)
|
|||
return(bcd2int(rtcin(port)));
|
||||
}
|
||||
|
||||
|
||||
void
|
||||
startrtclock()
|
||||
{
|
||||
|
|
@ -401,21 +388,18 @@ startrtclock()
|
|||
outb (IO_RTC+1, rtc_statusa);
|
||||
outb (IO_RTC, RTC_STATUSB);
|
||||
outb (IO_RTC+1, RTCSB_24HR);
|
||||
|
||||
outb (IO_RTC, RTC_DIAG);
|
||||
if (s = inb (IO_RTC+1))
|
||||
printf("RTC BIOS diagnostic error %b\n", s, RTCDG_BITS);
|
||||
writertc(RTC_DIAG, 0);
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* Initialize the time of day register, based on the time base which is, e.g.
|
||||
* from a filesystem.
|
||||
*/
|
||||
void
|
||||
inittodr(base)
|
||||
time_t base;
|
||||
inittodr(time_t base)
|
||||
{
|
||||
unsigned long sec, days;
|
||||
int yd;
|
||||
|
|
@ -467,7 +451,6 @@ time_t base;
|
|||
printf("Check and reset the date immediately!\n");
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* Write system time back to RTC
|
||||
*/
|
||||
|
|
@ -480,7 +463,7 @@ void resettodr()
|
|||
tm = time.tv_sec;
|
||||
splx(s);
|
||||
|
||||
/* First, disable clock updates */
|
||||
/* First, disable clock updates */
|
||||
writertc(RTC_STATUSB, RTCSB_HALT | RTCSB_24HR);
|
||||
|
||||
/* Calculate local time to put in CMOS */
|
||||
|
|
@ -517,7 +500,6 @@ void resettodr()
|
|||
writertc(RTC_STATUSB, RTCSB_PINTR | RTCSB_24HR);
|
||||
}
|
||||
|
||||
|
||||
#ifdef garbage
|
||||
/*
|
||||
* Initialze the time of day register, based on the time base which is, e.g.
|
||||
|
|
|
|||
|
|
@ -34,14 +34,14 @@
|
|||
* SUCH DAMAGE.
|
||||
*
|
||||
* from: @(#)clock.c 7.2 (Berkeley) 5/12/91
|
||||
* $Id: clock.c,v 1.20 1994/09/20 00:31:05 ache Exp $
|
||||
* $Id: clock.c,v 1.21 1994/09/20 21:20:46 bde Exp $
|
||||
*/
|
||||
|
||||
/*
|
||||
* inittodr, settodr and support routines written
|
||||
* by Christoph Robitschko <chmr@edvz.tu-graz.ac.at>
|
||||
*
|
||||
* reintroduced and updated by Chris Stenton <chris@gnome.co.uk> 8/10/94
|
||||
/*
|
||||
* inittodr, settodr and support routines written
|
||||
* by Christoph Robitschko <chmr@edvz.tu-graz.ac.at>
|
||||
*
|
||||
* reintroduced and updated by Chris Stenton <chris@gnome.co.uk> 8/10/94
|
||||
*/
|
||||
|
||||
/*
|
||||
|
|
@ -82,59 +82,21 @@ static void (*new_function)();
|
|||
static u_int new_rate;
|
||||
static u_int hardclock_divisor;
|
||||
static const u_char daysinmonth[] = {31,28,31,30,31,30,31,31,30,31,30,31};
|
||||
static u_char rtc_statusa = RTCSA_DIVIDER | RTCSA_NOPROF;
|
||||
|
||||
#ifdef I586_CPU
|
||||
int pentium_mhz = 0;
|
||||
#endif
|
||||
|
||||
#if 0
|
||||
void
|
||||
clkintr(frame)
|
||||
struct clockframe frame;
|
||||
clkintr(struct clockframe frame)
|
||||
{
|
||||
hardclock(&frame);
|
||||
}
|
||||
|
||||
static u_char rtc_statusa = RTCSA_DIVIDER | RTCSA_NOPROF;
|
||||
|
||||
/*
|
||||
* This routine receives statistical clock interrupts from the RTC.
|
||||
* As explained above, these occur at 128 interrupts per second.
|
||||
* When profiling, we receive interrupts at a rate of 1024 Hz.
|
||||
*
|
||||
* This does not actually add as much overhead as it sounds, because
|
||||
* when the statistical clock is active, the hardclock driver no longer
|
||||
* needs to keep (inaccurate) statistics on its own. This decouples
|
||||
* statistics gathering from scheduling interrupts.
|
||||
*
|
||||
* The RTC chip requires that we read status register C (RTC_INTR)
|
||||
* to acknowledge an interrupt, before it will generate the next one.
|
||||
*/
|
||||
#else
|
||||
void
|
||||
rtcintr(struct clockframe frame)
|
||||
{
|
||||
u_char stat;
|
||||
stat = rtcin(RTC_INTR);
|
||||
if(stat & RTCIR_PERIOD) {
|
||||
statclock(&frame);
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef DEBUG
|
||||
void
|
||||
printrtc(void)
|
||||
{
|
||||
outb(IO_RTC, RTC_STATUSA);
|
||||
printf("RTC status A = %x", inb(IO_RTC+1));
|
||||
outb(IO_RTC, RTC_STATUSB);
|
||||
printf(", B = %x", inb(IO_RTC+1));
|
||||
outb(IO_RTC, RTC_INTR);
|
||||
printf(", C = %x\n", inb(IO_RTC+1));
|
||||
}
|
||||
#endif
|
||||
|
||||
#if 0
|
||||
void
|
||||
timerintr(struct clockframe frame)
|
||||
clkintr(struct clockframe frame)
|
||||
{
|
||||
timer_func(&frame);
|
||||
switch (timer0_state) {
|
||||
|
|
@ -173,7 +135,6 @@ timerintr(struct clockframe frame)
|
|||
break;
|
||||
}
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
int
|
||||
|
|
@ -181,14 +142,12 @@ acquire_timer0(int rate, void (*function)() )
|
|||
{
|
||||
if (timer0_state || !function)
|
||||
return -1;
|
||||
|
||||
new_function = function;
|
||||
new_rate = rate;
|
||||
timer0_state = 2;
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
int
|
||||
acquire_timer2(int mode)
|
||||
{
|
||||
|
|
@ -199,7 +158,6 @@ acquire_timer2(int mode)
|
|||
return 0;
|
||||
}
|
||||
|
||||
|
||||
int
|
||||
release_timer0()
|
||||
{
|
||||
|
|
@ -209,7 +167,6 @@ release_timer0()
|
|||
return 0;
|
||||
}
|
||||
|
||||
|
||||
int
|
||||
release_timer2()
|
||||
{
|
||||
|
|
@ -220,6 +177,41 @@ release_timer2()
|
|||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* This routine receives statistical clock interrupts from the RTC.
|
||||
* As explained above, these occur at 128 interrupts per second.
|
||||
* When profiling, we receive interrupts at a rate of 1024 Hz.
|
||||
*
|
||||
* This does not actually add as much overhead as it sounds, because
|
||||
* when the statistical clock is active, the hardclock driver no longer
|
||||
* needs to keep (inaccurate) statistics on its own. This decouples
|
||||
* statistics gathering from scheduling interrupts.
|
||||
*
|
||||
* The RTC chip requires that we read status register C (RTC_INTR)
|
||||
* to acknowledge an interrupt, before it will generate the next one.
|
||||
*/
|
||||
void
|
||||
rtcintr(struct clockframe frame)
|
||||
{
|
||||
u_char stat;
|
||||
stat = rtcin(RTC_INTR);
|
||||
if(stat & RTCIR_PERIOD) {
|
||||
statclock(&frame);
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef DEBUG
|
||||
void
|
||||
printrtc(void)
|
||||
{
|
||||
outb(IO_RTC, RTC_STATUSA);
|
||||
printf("RTC status A = %x", inb(IO_RTC+1));
|
||||
outb(IO_RTC, RTC_STATUSB);
|
||||
printf(", B = %x", inb(IO_RTC+1));
|
||||
outb(IO_RTC, RTC_INTR);
|
||||
printf(", C = %x\n", inb(IO_RTC+1));
|
||||
}
|
||||
#endif
|
||||
|
||||
static int
|
||||
getit()
|
||||
|
|
@ -324,17 +316,14 @@ DELAY(int n)
|
|||
#endif
|
||||
}
|
||||
|
||||
|
||||
static void
|
||||
sysbeepstop(chan)
|
||||
void *chan;
|
||||
sysbeepstop(void *chan)
|
||||
{
|
||||
outb(IO_PPI, inb(IO_PPI)&0xFC); /* disable counter2 output to speaker */
|
||||
release_timer2();
|
||||
beeping = 0;
|
||||
}
|
||||
|
||||
|
||||
int
|
||||
sysbeep(int pitch, int period)
|
||||
{
|
||||
|
|
@ -353,7 +342,6 @@ sysbeep(int pitch, int period)
|
|||
return 0;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* RTC support routines
|
||||
*/
|
||||
|
|
@ -382,7 +370,6 @@ readrtc(int port)
|
|||
return(bcd2int(rtcin(port)));
|
||||
}
|
||||
|
||||
|
||||
void
|
||||
startrtclock()
|
||||
{
|
||||
|
|
@ -401,21 +388,18 @@ startrtclock()
|
|||
outb (IO_RTC+1, rtc_statusa);
|
||||
outb (IO_RTC, RTC_STATUSB);
|
||||
outb (IO_RTC+1, RTCSB_24HR);
|
||||
|
||||
outb (IO_RTC, RTC_DIAG);
|
||||
if (s = inb (IO_RTC+1))
|
||||
printf("RTC BIOS diagnostic error %b\n", s, RTCDG_BITS);
|
||||
writertc(RTC_DIAG, 0);
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* Initialize the time of day register, based on the time base which is, e.g.
|
||||
* from a filesystem.
|
||||
*/
|
||||
void
|
||||
inittodr(base)
|
||||
time_t base;
|
||||
inittodr(time_t base)
|
||||
{
|
||||
unsigned long sec, days;
|
||||
int yd;
|
||||
|
|
@ -467,7 +451,6 @@ time_t base;
|
|||
printf("Check and reset the date immediately!\n");
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* Write system time back to RTC
|
||||
*/
|
||||
|
|
@ -480,7 +463,7 @@ void resettodr()
|
|||
tm = time.tv_sec;
|
||||
splx(s);
|
||||
|
||||
/* First, disable clock updates */
|
||||
/* First, disable clock updates */
|
||||
writertc(RTC_STATUSB, RTCSB_HALT | RTCSB_24HR);
|
||||
|
||||
/* Calculate local time to put in CMOS */
|
||||
|
|
@ -517,7 +500,6 @@ void resettodr()
|
|||
writertc(RTC_STATUSB, RTCSB_PINTR | RTCSB_24HR);
|
||||
}
|
||||
|
||||
|
||||
#ifdef garbage
|
||||
/*
|
||||
* Initialze the time of day register, based on the time base which is, e.g.
|
||||
|
|
|
|||
|
|
@ -34,14 +34,14 @@
|
|||
* SUCH DAMAGE.
|
||||
*
|
||||
* from: @(#)clock.c 7.2 (Berkeley) 5/12/91
|
||||
* $Id: clock.c,v 1.20 1994/09/20 00:31:05 ache Exp $
|
||||
* $Id: clock.c,v 1.21 1994/09/20 21:20:46 bde Exp $
|
||||
*/
|
||||
|
||||
/*
|
||||
* inittodr, settodr and support routines written
|
||||
* by Christoph Robitschko <chmr@edvz.tu-graz.ac.at>
|
||||
*
|
||||
* reintroduced and updated by Chris Stenton <chris@gnome.co.uk> 8/10/94
|
||||
/*
|
||||
* inittodr, settodr and support routines written
|
||||
* by Christoph Robitschko <chmr@edvz.tu-graz.ac.at>
|
||||
*
|
||||
* reintroduced and updated by Chris Stenton <chris@gnome.co.uk> 8/10/94
|
||||
*/
|
||||
|
||||
/*
|
||||
|
|
@ -82,59 +82,21 @@ static void (*new_function)();
|
|||
static u_int new_rate;
|
||||
static u_int hardclock_divisor;
|
||||
static const u_char daysinmonth[] = {31,28,31,30,31,30,31,31,30,31,30,31};
|
||||
static u_char rtc_statusa = RTCSA_DIVIDER | RTCSA_NOPROF;
|
||||
|
||||
#ifdef I586_CPU
|
||||
int pentium_mhz = 0;
|
||||
#endif
|
||||
|
||||
#if 0
|
||||
void
|
||||
clkintr(frame)
|
||||
struct clockframe frame;
|
||||
clkintr(struct clockframe frame)
|
||||
{
|
||||
hardclock(&frame);
|
||||
}
|
||||
|
||||
static u_char rtc_statusa = RTCSA_DIVIDER | RTCSA_NOPROF;
|
||||
|
||||
/*
|
||||
* This routine receives statistical clock interrupts from the RTC.
|
||||
* As explained above, these occur at 128 interrupts per second.
|
||||
* When profiling, we receive interrupts at a rate of 1024 Hz.
|
||||
*
|
||||
* This does not actually add as much overhead as it sounds, because
|
||||
* when the statistical clock is active, the hardclock driver no longer
|
||||
* needs to keep (inaccurate) statistics on its own. This decouples
|
||||
* statistics gathering from scheduling interrupts.
|
||||
*
|
||||
* The RTC chip requires that we read status register C (RTC_INTR)
|
||||
* to acknowledge an interrupt, before it will generate the next one.
|
||||
*/
|
||||
#else
|
||||
void
|
||||
rtcintr(struct clockframe frame)
|
||||
{
|
||||
u_char stat;
|
||||
stat = rtcin(RTC_INTR);
|
||||
if(stat & RTCIR_PERIOD) {
|
||||
statclock(&frame);
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef DEBUG
|
||||
void
|
||||
printrtc(void)
|
||||
{
|
||||
outb(IO_RTC, RTC_STATUSA);
|
||||
printf("RTC status A = %x", inb(IO_RTC+1));
|
||||
outb(IO_RTC, RTC_STATUSB);
|
||||
printf(", B = %x", inb(IO_RTC+1));
|
||||
outb(IO_RTC, RTC_INTR);
|
||||
printf(", C = %x\n", inb(IO_RTC+1));
|
||||
}
|
||||
#endif
|
||||
|
||||
#if 0
|
||||
void
|
||||
timerintr(struct clockframe frame)
|
||||
clkintr(struct clockframe frame)
|
||||
{
|
||||
timer_func(&frame);
|
||||
switch (timer0_state) {
|
||||
|
|
@ -173,7 +135,6 @@ timerintr(struct clockframe frame)
|
|||
break;
|
||||
}
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
int
|
||||
|
|
@ -181,14 +142,12 @@ acquire_timer0(int rate, void (*function)() )
|
|||
{
|
||||
if (timer0_state || !function)
|
||||
return -1;
|
||||
|
||||
new_function = function;
|
||||
new_rate = rate;
|
||||
timer0_state = 2;
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
int
|
||||
acquire_timer2(int mode)
|
||||
{
|
||||
|
|
@ -199,7 +158,6 @@ acquire_timer2(int mode)
|
|||
return 0;
|
||||
}
|
||||
|
||||
|
||||
int
|
||||
release_timer0()
|
||||
{
|
||||
|
|
@ -209,7 +167,6 @@ release_timer0()
|
|||
return 0;
|
||||
}
|
||||
|
||||
|
||||
int
|
||||
release_timer2()
|
||||
{
|
||||
|
|
@ -220,6 +177,41 @@ release_timer2()
|
|||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* This routine receives statistical clock interrupts from the RTC.
|
||||
* As explained above, these occur at 128 interrupts per second.
|
||||
* When profiling, we receive interrupts at a rate of 1024 Hz.
|
||||
*
|
||||
* This does not actually add as much overhead as it sounds, because
|
||||
* when the statistical clock is active, the hardclock driver no longer
|
||||
* needs to keep (inaccurate) statistics on its own. This decouples
|
||||
* statistics gathering from scheduling interrupts.
|
||||
*
|
||||
* The RTC chip requires that we read status register C (RTC_INTR)
|
||||
* to acknowledge an interrupt, before it will generate the next one.
|
||||
*/
|
||||
void
|
||||
rtcintr(struct clockframe frame)
|
||||
{
|
||||
u_char stat;
|
||||
stat = rtcin(RTC_INTR);
|
||||
if(stat & RTCIR_PERIOD) {
|
||||
statclock(&frame);
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef DEBUG
|
||||
void
|
||||
printrtc(void)
|
||||
{
|
||||
outb(IO_RTC, RTC_STATUSA);
|
||||
printf("RTC status A = %x", inb(IO_RTC+1));
|
||||
outb(IO_RTC, RTC_STATUSB);
|
||||
printf(", B = %x", inb(IO_RTC+1));
|
||||
outb(IO_RTC, RTC_INTR);
|
||||
printf(", C = %x\n", inb(IO_RTC+1));
|
||||
}
|
||||
#endif
|
||||
|
||||
static int
|
||||
getit()
|
||||
|
|
@ -324,17 +316,14 @@ DELAY(int n)
|
|||
#endif
|
||||
}
|
||||
|
||||
|
||||
static void
|
||||
sysbeepstop(chan)
|
||||
void *chan;
|
||||
sysbeepstop(void *chan)
|
||||
{
|
||||
outb(IO_PPI, inb(IO_PPI)&0xFC); /* disable counter2 output to speaker */
|
||||
release_timer2();
|
||||
beeping = 0;
|
||||
}
|
||||
|
||||
|
||||
int
|
||||
sysbeep(int pitch, int period)
|
||||
{
|
||||
|
|
@ -353,7 +342,6 @@ sysbeep(int pitch, int period)
|
|||
return 0;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* RTC support routines
|
||||
*/
|
||||
|
|
@ -382,7 +370,6 @@ readrtc(int port)
|
|||
return(bcd2int(rtcin(port)));
|
||||
}
|
||||
|
||||
|
||||
void
|
||||
startrtclock()
|
||||
{
|
||||
|
|
@ -401,21 +388,18 @@ startrtclock()
|
|||
outb (IO_RTC+1, rtc_statusa);
|
||||
outb (IO_RTC, RTC_STATUSB);
|
||||
outb (IO_RTC+1, RTCSB_24HR);
|
||||
|
||||
outb (IO_RTC, RTC_DIAG);
|
||||
if (s = inb (IO_RTC+1))
|
||||
printf("RTC BIOS diagnostic error %b\n", s, RTCDG_BITS);
|
||||
writertc(RTC_DIAG, 0);
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* Initialize the time of day register, based on the time base which is, e.g.
|
||||
* from a filesystem.
|
||||
*/
|
||||
void
|
||||
inittodr(base)
|
||||
time_t base;
|
||||
inittodr(time_t base)
|
||||
{
|
||||
unsigned long sec, days;
|
||||
int yd;
|
||||
|
|
@ -467,7 +451,6 @@ time_t base;
|
|||
printf("Check and reset the date immediately!\n");
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* Write system time back to RTC
|
||||
*/
|
||||
|
|
@ -480,7 +463,7 @@ void resettodr()
|
|||
tm = time.tv_sec;
|
||||
splx(s);
|
||||
|
||||
/* First, disable clock updates */
|
||||
/* First, disable clock updates */
|
||||
writertc(RTC_STATUSB, RTCSB_HALT | RTCSB_24HR);
|
||||
|
||||
/* Calculate local time to put in CMOS */
|
||||
|
|
@ -517,7 +500,6 @@ void resettodr()
|
|||
writertc(RTC_STATUSB, RTCSB_PINTR | RTCSB_24HR);
|
||||
}
|
||||
|
||||
|
||||
#ifdef garbage
|
||||
/*
|
||||
* Initialze the time of day register, based on the time base which is, e.g.
|
||||
|
|
|
|||
|
|
@ -6,7 +6,8 @@
|
|||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* notice, this list of conditions and the following disclaimer
|
||||
* in this position and unchanged.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
|
|
@ -24,7 +25,7 @@
|
|||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
||||
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* $Id: pcaudio.c,v 1.6 1994/08/22 11:11:05 sos Exp $
|
||||
* $Id: pcaudio.c,v 1.7 1994/09/16 13:33:47 davidg Exp $
|
||||
*/
|
||||
|
||||
#include "pca.h"
|
||||
|
|
@ -34,6 +35,8 @@
|
|||
#include <sys/systm.h>
|
||||
#include <sys/uio.h>
|
||||
#include <sys/ioctl.h>
|
||||
#include <sys/file.h>
|
||||
#include <sys/proc.h>
|
||||
#include <machine/pcaudioio.h>
|
||||
#include <i386/isa/isa.h>
|
||||
#include <i386/isa/isa_device.h>
|
||||
|
|
@ -60,6 +63,8 @@ static struct pca_status {
|
|||
char current; /* current buffer */
|
||||
unsigned char oldval; /* old timer port value */
|
||||
char timer_on; /* is playback running */
|
||||
char coll; /* select collision */
|
||||
pid_t wsel; /* pid of select'ing proc */
|
||||
} pca_status;
|
||||
|
||||
static char buffer1[BUF_SIZE];
|
||||
|
|
@ -76,6 +81,7 @@ int pcaclose(dev_t dev, int flag);
|
|||
int pcaopen(dev_t dev, int flag);
|
||||
int pcawrite(dev_t dev, struct uio *uio, int flag);
|
||||
int pcaioctl(dev_t dev, int cmd, caddr_t data, int flag, struct proc *p);
|
||||
int pcaselect(dev_t dev, int rw, struct proc *p);
|
||||
|
||||
struct isa_driver pcadriver = {
|
||||
pcaprobe, pcaattach, "pca",
|
||||
|
|
@ -269,6 +275,10 @@ pcawrite(dev_t dev, struct uio *uio, int flag)
|
|||
return ENXIO;
|
||||
|
||||
while ((count = min(BUF_SIZE, uio->uio_resid)) > 0) {
|
||||
if (pca_status.in_use[0] && pca_status.in_use[1]) {
|
||||
pca_sleep = 1;
|
||||
tsleep((caddr_t)&pca_sleep, PZERO|PCATCH, "pca_wait",0);
|
||||
}
|
||||
which = pca_status.in_use[0] ? 1 : 0;
|
||||
if (count && !pca_status.in_use[which]) {
|
||||
uiomove(pca_status.buf[which], count, uio);
|
||||
|
|
@ -289,10 +299,6 @@ pcawrite(dev_t dev, struct uio *uio, int flag)
|
|||
if (pca_start())
|
||||
return EBUSY;
|
||||
}
|
||||
if (pca_status.in_use[0] && pca_status.in_use[1]) {
|
||||
pca_sleep = 1;
|
||||
tsleep((caddr_t)&pca_sleep, PZERO|PCATCH, "pca_wait",0);
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -301,7 +307,7 @@ pcawrite(dev_t dev, struct uio *uio, int flag)
|
|||
int
|
||||
pcaioctl(dev_t dev, int cmd, caddr_t data, int flag, struct proc *p)
|
||||
{
|
||||
audio_info_t *auptr;
|
||||
audio_info_t *auptr;
|
||||
|
||||
switch(cmd) {
|
||||
|
||||
|
|
@ -365,7 +371,6 @@ void
|
|||
pcaintr(int regs)
|
||||
{
|
||||
if (pca_status.index < pca_status.in_use[pca_status.current]) {
|
||||
#if 1
|
||||
disable_intr();
|
||||
__asm__("outb %0,$0x61\n"
|
||||
"andb $0xFE,%0\n"
|
||||
|
|
@ -376,18 +381,10 @@ pcaintr(int regs)
|
|||
: : "a" ((char)pca_status.buffer[pca_status.index]),
|
||||
"b" ((long)volume_table) );
|
||||
enable_intr();
|
||||
#else
|
||||
disable_intr();
|
||||
outb(IO_PPI, pca_status.oldval);
|
||||
outb(IO_PPI, pca_status.oldval & 0xFE);
|
||||
outb(TIMER_CNTR2,
|
||||
volume_table[pca_status.buffer[pca_status.index]]);
|
||||
enable_intr();
|
||||
#endif
|
||||
pca_status.counter += pca_status.scale;
|
||||
pca_status.index = (pca_status.counter >> 8);
|
||||
}
|
||||
else {
|
||||
if (pca_status.index >= pca_status.in_use[pca_status.current]) {
|
||||
pca_status.index = pca_status.counter = 0;
|
||||
pca_status.in_use[pca_status.current] = 0;
|
||||
pca_status.current ^= 1;
|
||||
|
|
@ -396,7 +393,38 @@ pcaintr(int regs)
|
|||
wakeup((caddr_t)&pca_sleep);
|
||||
pca_sleep = 0;
|
||||
}
|
||||
if (pca_status.wsel) {
|
||||
selwakeup(pca_status.wsel, pca_status.coll);
|
||||
pca_status.wsel = 0;
|
||||
pca_status.coll = 0;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
int
|
||||
pcaselect(dev_t dev, int rw, struct proc *p)
|
||||
{
|
||||
int s = spltty();
|
||||
struct proc *p1;
|
||||
|
||||
switch (rw) {
|
||||
|
||||
case FWRITE:
|
||||
if (!pca_status.in_use[0] || !pca_status.in_use[1]) {
|
||||
splx(s);
|
||||
return(1);
|
||||
}
|
||||
if (pca_status.wsel && (p1 = pfind(pca_status.wsel))
|
||||
&& p1->p_wchan == (caddr_t)&selwait)
|
||||
pca_status.coll = 1;
|
||||
else
|
||||
pca_status.wsel = p->p_pid;
|
||||
splx(s);
|
||||
return 0;
|
||||
default:
|
||||
splx(s);
|
||||
return(0);
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
|
|
|||
116
sys/isa/atrtc.c
116
sys/isa/atrtc.c
|
|
@ -34,14 +34,14 @@
|
|||
* SUCH DAMAGE.
|
||||
*
|
||||
* from: @(#)clock.c 7.2 (Berkeley) 5/12/91
|
||||
* $Id: clock.c,v 1.20 1994/09/20 00:31:05 ache Exp $
|
||||
* $Id: clock.c,v 1.21 1994/09/20 21:20:46 bde Exp $
|
||||
*/
|
||||
|
||||
/*
|
||||
* inittodr, settodr and support routines written
|
||||
* by Christoph Robitschko <chmr@edvz.tu-graz.ac.at>
|
||||
*
|
||||
* reintroduced and updated by Chris Stenton <chris@gnome.co.uk> 8/10/94
|
||||
/*
|
||||
* inittodr, settodr and support routines written
|
||||
* by Christoph Robitschko <chmr@edvz.tu-graz.ac.at>
|
||||
*
|
||||
* reintroduced and updated by Chris Stenton <chris@gnome.co.uk> 8/10/94
|
||||
*/
|
||||
|
||||
/*
|
||||
|
|
@ -82,59 +82,21 @@ static void (*new_function)();
|
|||
static u_int new_rate;
|
||||
static u_int hardclock_divisor;
|
||||
static const u_char daysinmonth[] = {31,28,31,30,31,30,31,31,30,31,30,31};
|
||||
static u_char rtc_statusa = RTCSA_DIVIDER | RTCSA_NOPROF;
|
||||
|
||||
#ifdef I586_CPU
|
||||
int pentium_mhz = 0;
|
||||
#endif
|
||||
|
||||
#if 0
|
||||
void
|
||||
clkintr(frame)
|
||||
struct clockframe frame;
|
||||
clkintr(struct clockframe frame)
|
||||
{
|
||||
hardclock(&frame);
|
||||
}
|
||||
|
||||
static u_char rtc_statusa = RTCSA_DIVIDER | RTCSA_NOPROF;
|
||||
|
||||
/*
|
||||
* This routine receives statistical clock interrupts from the RTC.
|
||||
* As explained above, these occur at 128 interrupts per second.
|
||||
* When profiling, we receive interrupts at a rate of 1024 Hz.
|
||||
*
|
||||
* This does not actually add as much overhead as it sounds, because
|
||||
* when the statistical clock is active, the hardclock driver no longer
|
||||
* needs to keep (inaccurate) statistics on its own. This decouples
|
||||
* statistics gathering from scheduling interrupts.
|
||||
*
|
||||
* The RTC chip requires that we read status register C (RTC_INTR)
|
||||
* to acknowledge an interrupt, before it will generate the next one.
|
||||
*/
|
||||
#else
|
||||
void
|
||||
rtcintr(struct clockframe frame)
|
||||
{
|
||||
u_char stat;
|
||||
stat = rtcin(RTC_INTR);
|
||||
if(stat & RTCIR_PERIOD) {
|
||||
statclock(&frame);
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef DEBUG
|
||||
void
|
||||
printrtc(void)
|
||||
{
|
||||
outb(IO_RTC, RTC_STATUSA);
|
||||
printf("RTC status A = %x", inb(IO_RTC+1));
|
||||
outb(IO_RTC, RTC_STATUSB);
|
||||
printf(", B = %x", inb(IO_RTC+1));
|
||||
outb(IO_RTC, RTC_INTR);
|
||||
printf(", C = %x\n", inb(IO_RTC+1));
|
||||
}
|
||||
#endif
|
||||
|
||||
#if 0
|
||||
void
|
||||
timerintr(struct clockframe frame)
|
||||
clkintr(struct clockframe frame)
|
||||
{
|
||||
timer_func(&frame);
|
||||
switch (timer0_state) {
|
||||
|
|
@ -173,7 +135,6 @@ timerintr(struct clockframe frame)
|
|||
break;
|
||||
}
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
int
|
||||
|
|
@ -181,14 +142,12 @@ acquire_timer0(int rate, void (*function)() )
|
|||
{
|
||||
if (timer0_state || !function)
|
||||
return -1;
|
||||
|
||||
new_function = function;
|
||||
new_rate = rate;
|
||||
timer0_state = 2;
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
int
|
||||
acquire_timer2(int mode)
|
||||
{
|
||||
|
|
@ -199,7 +158,6 @@ acquire_timer2(int mode)
|
|||
return 0;
|
||||
}
|
||||
|
||||
|
||||
int
|
||||
release_timer0()
|
||||
{
|
||||
|
|
@ -209,7 +167,6 @@ release_timer0()
|
|||
return 0;
|
||||
}
|
||||
|
||||
|
||||
int
|
||||
release_timer2()
|
||||
{
|
||||
|
|
@ -220,6 +177,41 @@ release_timer2()
|
|||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* This routine receives statistical clock interrupts from the RTC.
|
||||
* As explained above, these occur at 128 interrupts per second.
|
||||
* When profiling, we receive interrupts at a rate of 1024 Hz.
|
||||
*
|
||||
* This does not actually add as much overhead as it sounds, because
|
||||
* when the statistical clock is active, the hardclock driver no longer
|
||||
* needs to keep (inaccurate) statistics on its own. This decouples
|
||||
* statistics gathering from scheduling interrupts.
|
||||
*
|
||||
* The RTC chip requires that we read status register C (RTC_INTR)
|
||||
* to acknowledge an interrupt, before it will generate the next one.
|
||||
*/
|
||||
void
|
||||
rtcintr(struct clockframe frame)
|
||||
{
|
||||
u_char stat;
|
||||
stat = rtcin(RTC_INTR);
|
||||
if(stat & RTCIR_PERIOD) {
|
||||
statclock(&frame);
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef DEBUG
|
||||
void
|
||||
printrtc(void)
|
||||
{
|
||||
outb(IO_RTC, RTC_STATUSA);
|
||||
printf("RTC status A = %x", inb(IO_RTC+1));
|
||||
outb(IO_RTC, RTC_STATUSB);
|
||||
printf(", B = %x", inb(IO_RTC+1));
|
||||
outb(IO_RTC, RTC_INTR);
|
||||
printf(", C = %x\n", inb(IO_RTC+1));
|
||||
}
|
||||
#endif
|
||||
|
||||
static int
|
||||
getit()
|
||||
|
|
@ -324,17 +316,14 @@ DELAY(int n)
|
|||
#endif
|
||||
}
|
||||
|
||||
|
||||
static void
|
||||
sysbeepstop(chan)
|
||||
void *chan;
|
||||
sysbeepstop(void *chan)
|
||||
{
|
||||
outb(IO_PPI, inb(IO_PPI)&0xFC); /* disable counter2 output to speaker */
|
||||
release_timer2();
|
||||
beeping = 0;
|
||||
}
|
||||
|
||||
|
||||
int
|
||||
sysbeep(int pitch, int period)
|
||||
{
|
||||
|
|
@ -353,7 +342,6 @@ sysbeep(int pitch, int period)
|
|||
return 0;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* RTC support routines
|
||||
*/
|
||||
|
|
@ -382,7 +370,6 @@ readrtc(int port)
|
|||
return(bcd2int(rtcin(port)));
|
||||
}
|
||||
|
||||
|
||||
void
|
||||
startrtclock()
|
||||
{
|
||||
|
|
@ -401,21 +388,18 @@ startrtclock()
|
|||
outb (IO_RTC+1, rtc_statusa);
|
||||
outb (IO_RTC, RTC_STATUSB);
|
||||
outb (IO_RTC+1, RTCSB_24HR);
|
||||
|
||||
outb (IO_RTC, RTC_DIAG);
|
||||
if (s = inb (IO_RTC+1))
|
||||
printf("RTC BIOS diagnostic error %b\n", s, RTCDG_BITS);
|
||||
writertc(RTC_DIAG, 0);
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* Initialize the time of day register, based on the time base which is, e.g.
|
||||
* from a filesystem.
|
||||
*/
|
||||
void
|
||||
inittodr(base)
|
||||
time_t base;
|
||||
inittodr(time_t base)
|
||||
{
|
||||
unsigned long sec, days;
|
||||
int yd;
|
||||
|
|
@ -467,7 +451,6 @@ time_t base;
|
|||
printf("Check and reset the date immediately!\n");
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* Write system time back to RTC
|
||||
*/
|
||||
|
|
@ -480,7 +463,7 @@ void resettodr()
|
|||
tm = time.tv_sec;
|
||||
splx(s);
|
||||
|
||||
/* First, disable clock updates */
|
||||
/* First, disable clock updates */
|
||||
writertc(RTC_STATUSB, RTCSB_HALT | RTCSB_24HR);
|
||||
|
||||
/* Calculate local time to put in CMOS */
|
||||
|
|
@ -517,7 +500,6 @@ void resettodr()
|
|||
writertc(RTC_STATUSB, RTCSB_PINTR | RTCSB_24HR);
|
||||
}
|
||||
|
||||
|
||||
#ifdef garbage
|
||||
/*
|
||||
* Initialze the time of day register, based on the time base which is, e.g.
|
||||
|
|
|
|||
Loading…
Reference in a new issue