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mpi3mr: Adding FreeBSD OS Type to Fault/Reset Reason Code
The driver is modified to add FreeBSD OS type in the upper nibble of the fault/reset reason code for appropriate qualification of the reason code. Reviewed by: imp Approved by: imp Differential revision: https://reviews.freebsd.org/D44427
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@ -83,7 +83,7 @@ static void mpi3mr_port_enable_complete(struct mpi3mr_softc *sc,
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struct mpi3mr_drvr_cmd *drvrcmd);
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static void mpi3mr_flush_io(struct mpi3mr_softc *sc);
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static int mpi3mr_issue_reset(struct mpi3mr_softc *sc, U16 reset_type,
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U32 reset_reason);
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U16 reset_reason);
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static void mpi3mr_dev_rmhs_send_tm(struct mpi3mr_softc *sc, U16 handle,
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struct mpi3mr_drvr_cmd *cmdparam, U8 iou_rc);
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static void mpi3mr_dev_rmhs_complete_iou(struct mpi3mr_softc *sc,
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@ -186,7 +186,7 @@ poll_for_command_completion(struct mpi3mr_softc *sc,
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* Return: None.
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*/
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static void
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mpi3mr_trigger_snapdump(struct mpi3mr_softc *sc, U32 reason_code)
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mpi3mr_trigger_snapdump(struct mpi3mr_softc *sc, U16 reason_code)
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{
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U32 host_diagnostic, timeout = MPI3_SYSIF_DIAG_SAVE_TIMEOUT * 10;
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@ -221,7 +221,7 @@ mpi3mr_trigger_snapdump(struct mpi3mr_softc *sc, U32 reason_code)
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*
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* Return: None.
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*/
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static void mpi3mr_check_rh_fault_ioc(struct mpi3mr_softc *sc, U32 reason_code)
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static void mpi3mr_check_rh_fault_ioc(struct mpi3mr_softc *sc, U16 reason_code)
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{
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U32 ioc_status;
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@ -1167,9 +1167,9 @@ static inline void mpi3mr_clear_resethistory(struct mpi3mr_softc *sc)
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*
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* Return: 0 on success, -1 on failure.
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*/
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static int mpi3mr_mur_ioc(struct mpi3mr_softc *sc, U32 reset_reason)
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static int mpi3mr_mur_ioc(struct mpi3mr_softc *sc, U16 reset_reason)
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{
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U32 ioc_config, timeout, ioc_status;
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U32 ioc_config, timeout, ioc_status, scratch_pad0;
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int retval = -1;
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mpi3mr_dprint(sc, MPI3MR_INFO, "Issuing Message Unit Reset(MUR)\n");
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@ -1178,7 +1178,12 @@ static int mpi3mr_mur_ioc(struct mpi3mr_softc *sc, U32 reset_reason)
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return retval;
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}
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mpi3mr_clear_resethistory(sc);
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mpi3mr_regwrite(sc, MPI3_SYSIF_SCRATCHPAD0_OFFSET, reset_reason);
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scratch_pad0 = ((MPI3MR_RESET_REASON_OSTYPE_FREEBSD <<
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MPI3MR_RESET_REASON_OSTYPE_SHIFT) |
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(sc->facts.ioc_num <<
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MPI3MR_RESET_REASON_IOCNUM_SHIFT) | reset_reason);
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mpi3mr_regwrite(sc, MPI3_SYSIF_SCRATCHPAD0_OFFSET, scratch_pad0);
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ioc_config = mpi3mr_regread(sc, MPI3_SYSIF_IOC_CONFIG_OFFSET);
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ioc_config &= ~MPI3_SYSIF_IOC_CONFIG_ENABLE_IOC;
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mpi3mr_regwrite(sc, MPI3_SYSIF_IOC_CONFIG_OFFSET, ioc_config);
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@ -5761,11 +5766,11 @@ static inline void mpi3mr_set_diagsave(struct mpi3mr_softc *sc)
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* Return: 0 on success, non-zero on failure.
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*/
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static int mpi3mr_issue_reset(struct mpi3mr_softc *sc, U16 reset_type,
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U32 reset_reason)
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U16 reset_reason)
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{
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int retval = -1;
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U8 unlock_retry_count = 0;
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U32 host_diagnostic, ioc_status, ioc_config;
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U32 host_diagnostic, ioc_status, ioc_config, scratch_pad0;
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U32 timeout = MPI3MR_RESET_ACK_TIMEOUT * 10;
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if ((reset_type != MPI3_SYSIF_HOST_DIAG_RESET_ACTION_SOFT_RESET) &&
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@ -5819,7 +5824,11 @@ static int mpi3mr_issue_reset(struct mpi3mr_softc *sc, U16 reset_type,
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unlock_retry_count, host_diagnostic);
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} while (!(host_diagnostic & MPI3_SYSIF_HOST_DIAG_DIAG_WRITE_ENABLE));
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mpi3mr_regwrite(sc, MPI3_SYSIF_SCRATCHPAD0_OFFSET, reset_reason);
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scratch_pad0 = ((MPI3MR_RESET_REASON_OSTYPE_FREEBSD <<
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MPI3MR_RESET_REASON_OSTYPE_SHIFT) |
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(sc->facts.ioc_num <<
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MPI3MR_RESET_REASON_IOCNUM_SHIFT) | reset_reason);
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mpi3mr_regwrite(sc, MPI3_SYSIF_SCRATCHPAD0_OFFSET, scratch_pad0);
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mpi3mr_regwrite(sc, MPI3_SYSIF_HOST_DIAG_OFFSET, host_diagnostic | reset_type);
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if (reset_type == MPI3_SYSIF_HOST_DIAG_RESET_ACTION_SOFT_RESET) {
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@ -5898,7 +5907,7 @@ inline void mpi3mr_cleanup_event_taskq(struct mpi3mr_softc *sc)
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* Return: 0 on success, non-zero on failure.
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*/
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int mpi3mr_soft_reset_handler(struct mpi3mr_softc *sc,
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U32 reset_reason, bool snapdump)
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U16 reset_reason, bool snapdump)
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{
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int retval = 0, i = 0;
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enum mpi3mr_iocstate ioc_state;
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@ -141,6 +141,9 @@
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#define MAX_MGMT_ADAPTERS 8
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#define MPI3MR_WAIT_BEFORE_CTRL_RESET 5
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#define MPI3MR_RESET_REASON_OSTYPE_FREEBSD 0x4
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#define MPI3MR_RESET_REASON_OSTYPE_SHIFT 28
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#define MPI3MR_RESET_REASON_IOCNUM_SHIFT 20
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struct mpi3mr_mgmt_info {
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uint16_t count;
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@ -961,7 +964,7 @@ void mpi3mr_cleanup_event_taskq(struct mpi3mr_softc *sc);
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void
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mpi3mr_hexdump(void *buf, int sz, int format);
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int mpi3mr_soft_reset_handler(struct mpi3mr_softc *sc,
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U32 reset_reason, bool snapdump);
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U16 reset_reason, bool snapdump);
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void
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mpi3mrsas_release_simq_reinit(struct mpi3mr_cam_softc *cam_sc);
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void
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@ -983,6 +986,6 @@ void mpi3mr_set_io_divert_for_all_vd_in_tg(struct mpi3mr_softc *sc,
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enum mpi3mr_iocstate mpi3mr_get_iocstate(struct mpi3mr_softc *sc);
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void mpi3mr_poll_pend_io_completions(struct mpi3mr_softc *sc);
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void int_to_lun(unsigned int lun, U8 *req_lun);
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void trigger_reset_from_watchdog(struct mpi3mr_softc *sc, U8 reset_type, U32 reset_reason);
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void trigger_reset_from_watchdog(struct mpi3mr_softc *sc, U8 reset_type, U16 reset_reason);
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void mpi3mr_alloc_ioctl_dma_memory(struct mpi3mr_softc *sc);
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#endif /*MPI3MR_H_INCLUDED*/
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@ -454,7 +454,7 @@ void mpi3mr_poll_pend_io_completions(struct mpi3mr_softc *sc)
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}
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void
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trigger_reset_from_watchdog(struct mpi3mr_softc *sc, U8 reset_type, U32 reset_reason)
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trigger_reset_from_watchdog(struct mpi3mr_softc *sc, U8 reset_type, U16 reset_reason)
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{
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if (sc->reset_in_progress) {
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mpi3mr_dprint(sc, MPI3MR_INFO, "Another reset is in progress, no need to trigger the reset\n");
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