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ossl: Update arm_arch.h from OpenSSL 1.1.1 to 3.0
Reviewed by: emaste Sponsored by: Arm Ltd Differential Revision: https://reviews.freebsd.org/D41939
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@ -1,7 +1,7 @@
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/*
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* Copyright 2011-2018 The OpenSSL Project Authors. All Rights Reserved.
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* Copyright 2011-2022 The OpenSSL Project Authors. All Rights Reserved.
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*
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* Licensed under the OpenSSL license (the "License"). You may not use
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* Licensed under the Apache License 2.0 (the "License"). You may not use
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* this file except in compliance with the License. You can obtain a copy
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* in the file LICENSE in the source distribution or at
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* https://www.openssl.org/source/license.html
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@ -71,6 +71,8 @@
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# ifndef __ASSEMBLER__
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extern unsigned int OPENSSL_armcap_P;
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extern unsigned int OPENSSL_arm_midr;
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extern unsigned int OPENSSL_armv8_rsa_neonized;
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# endif
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# define ARMV7_NEON (1<<0)
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@ -80,5 +82,48 @@ extern unsigned int OPENSSL_armcap_P;
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# define ARMV8_SHA256 (1<<4)
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# define ARMV8_PMULL (1<<5)
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# define ARMV8_SHA512 (1<<6)
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# define ARMV8_CPUID (1<<7)
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/*
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* MIDR_EL1 system register
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*
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* 63___ _ ___32_31___ _ ___24_23_____20_19_____16_15__ _ __4_3_______0
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* | | | | | | |
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* |RES0 | Implementer | Variant | Arch | PartNum |Revision|
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* |____ _ _____|_____ _ _____|_________|_______ _|____ _ ___|________|
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*
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*/
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# define ARM_CPU_IMP_ARM 0x41
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# define ARM_CPU_PART_CORTEX_A72 0xD08
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# define ARM_CPU_PART_N1 0xD0C
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# define MIDR_PARTNUM_SHIFT 4
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# define MIDR_PARTNUM_MASK (0xfffU << MIDR_PARTNUM_SHIFT)
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# define MIDR_PARTNUM(midr) \
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(((midr) & MIDR_PARTNUM_MASK) >> MIDR_PARTNUM_SHIFT)
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# define MIDR_IMPLEMENTER_SHIFT 24
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# define MIDR_IMPLEMENTER_MASK (0xffU << MIDR_IMPLEMENTER_SHIFT)
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# define MIDR_IMPLEMENTER(midr) \
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(((midr) & MIDR_IMPLEMENTER_MASK) >> MIDR_IMPLEMENTER_SHIFT)
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# define MIDR_ARCHITECTURE_SHIFT 16
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# define MIDR_ARCHITECTURE_MASK (0xfU << MIDR_ARCHITECTURE_SHIFT)
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# define MIDR_ARCHITECTURE(midr) \
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(((midr) & MIDR_ARCHITECTURE_MASK) >> MIDR_ARCHITECTURE_SHIFT)
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# define MIDR_CPU_MODEL_MASK \
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(MIDR_IMPLEMENTER_MASK | \
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MIDR_PARTNUM_MASK | \
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MIDR_ARCHITECTURE_MASK)
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# define MIDR_CPU_MODEL(imp, partnum) \
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(((imp) << MIDR_IMPLEMENTER_SHIFT) | \
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(0xfU << MIDR_ARCHITECTURE_SHIFT) | \
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((partnum) << MIDR_PARTNUM_SHIFT))
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# define MIDR_IS_CPU_MODEL(midr, imp, partnum) \
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(((midr) & MIDR_CPU_MODEL_MASK) == MIDR_CPU_MODEL(imp, partnum))
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#endif
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