qlnxe: Fix multiple locking issues

Multiple issues are reported with WITNESS and code inspection of the
locking and lock initialization.

PR:		278084
MFC after:	1 week
This commit is contained in:
Keith Reynolds 2024-05-27 23:13:10 -07:00 committed by Kevin Bowling
parent e3ec564ecb
commit 29684d08fa
6 changed files with 16 additions and 14 deletions

View file

@ -72,7 +72,7 @@ extern void qlnx_dma_free_coherent(void *ecore_dev, void *v_addr,
bus_addr_t phys, uint32_t size);
extern void qlnx_link_update(void *p_hwfn);
extern void qlnx_barrier(void *p_hwfn);
extern void qlnx_barrier(void *p_dev);
extern void *qlnx_zalloc(uint32_t size);
@ -213,14 +213,14 @@ typedef struct osal_list_t
#define OSAL_SPIN_LOCK_ALLOC(p_hwfn, mutex)
#define OSAL_SPIN_LOCK_DEALLOC(mutex) mtx_destroy(mutex)
#define OSAL_SPIN_LOCK_INIT(lock) {\
mtx_init(lock, __func__, MTX_NETWORK_LOCK, MTX_SPIN); \
mtx_init(lock, __func__, "OSAL spin lock", MTX_SPIN); \
}
#define OSAL_SPIN_UNLOCK(lock) {\
mtx_unlock(lock); \
mtx_unlock_spin(lock); \
}
#define OSAL_SPIN_LOCK(lock) {\
mtx_lock(lock); \
mtx_lock_spin(lock); \
}
#define OSAL_MUTEX_ALLOC(p_hwfn, mutex)

View file

@ -790,6 +790,7 @@ struct ecore_dev {
u8 dp_level;
char name[NAME_SIZE];
void *dp_ctx;
void *ha;
enum ecore_dev_type type;
/* Translate type/revision combo into the proper conditions */

View file

@ -51,10 +51,10 @@ struct ecore_mcp_info {
/* List for mailbox commands which were sent and wait for a response */
osal_list_t cmd_list;
/* Spinlock used for protecting the access to the mailbox commands list
/* Lock used for protecting the access to the mailbox commands list
* and the sending of the commands.
*/
osal_spinlock_t cmd_lock;
osal_mutex_t cmd_lock;
/* Flag to indicate whether sending a MFW mailbox command is blocked */
bool b_block_cmd;
@ -62,7 +62,7 @@ struct ecore_mcp_info {
/* Spinlock used for syncing SW link-changes and link-changes
* originating from attention context.
*/
osal_spinlock_t link_lock;
osal_mutex_t link_lock;
/* Address of the MCP public area */
u32 public_base;

View file

@ -391,7 +391,7 @@ struct qlnx_host {
int msix_count;
struct mtx hw_lock;
struct sx hw_lock;
/* debug */

View file

@ -763,7 +763,7 @@ qlnx_pci_attach(device_t dev)
ha->pci_dev = dev;
mtx_init(&ha->hw_lock, "qlnx_hw_lock", MTX_NETWORK_LOCK, MTX_DEF);
sx_init(&ha->hw_lock, "qlnx_hw_lock");
ha->flags.lock_init = 1;
@ -1207,6 +1207,7 @@ qlnx_init_hw(qlnx_host_t *ha)
int rval = 0;
struct ecore_hw_prepare_params params;
ha->cdev.ha = ha;
ecore_init_struct(&ha->cdev);
/* ha->dp_module = ECORE_MSG_PROBE |
@ -1351,7 +1352,7 @@ qlnx_release(qlnx_host_t *ha)
pci_release_msi(dev);
if (ha->flags.lock_init) {
mtx_destroy(&ha->hw_lock);
sx_destroy(&ha->hw_lock);
}
if (ha->pci_reg)
@ -5396,11 +5397,11 @@ qlnx_zalloc(uint32_t size)
}
void
qlnx_barrier(void *p_hwfn)
qlnx_barrier(void *p_dev)
{
qlnx_host_t *ha;
ha = (qlnx_host_t *)((struct ecore_hwfn *)p_hwfn)->p_dev;
ha = ((struct ecore_dev *) p_dev)->ha;
bus_barrier(ha->pci_reg, 0, 0, BUS_SPACE_BARRIER_WRITE);
}

View file

@ -130,8 +130,8 @@ MALLOC_DECLARE(M_QLNXBUF);
/*
* Locks
*/
#define QLNX_LOCK(ha) mtx_lock(&ha->hw_lock)
#define QLNX_UNLOCK(ha) mtx_unlock(&ha->hw_lock)
#define QLNX_LOCK(ha) sx_xlock(&ha->hw_lock)
#define QLNX_UNLOCK(ha) sx_xunlock(&ha->hw_lock)
/*
* structure encapsulating a DMA buffer