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Switch off explicit broadcasting of the TLB flush operations for PJ4B CPU
Since CPU_MV_PJ4B describes ARMv7 compliant CPU there is no need for sending an IPI each time when TLB is flushed in any way. Tested by: kevlo
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Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=257282
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@ -188,7 +188,7 @@ extern u_int cputype;
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#else
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void tlb_broadcast(int);
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#ifdef CPU_CORTEXA
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#if defined(CPU_CORTEXA) || defined(CPU_MV_PJ4B)
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#define TLB_BROADCAST /* No need to explicitely send an IPI */
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#else
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#define TLB_BROADCAST tlb_broadcast(7)
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