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powerpc64: add missing TLB invalidations to radix
Radix MMU code was missing TLB invalidations when some Level 3 PDEs were modified. This caused TLB multi-hit machine check interrupts when superpages were enabled. Reviewed by: jhibbits MFC after: 2 weeks Sponsored by: Eldorado Research Institute (eldorado.org.br) Differential Revision: https://reviews.freebsd.org/D29511
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@ -3184,6 +3184,7 @@ pmap_enter_l3e(pmap_t pmap, vm_offset_t va, pml3_entry_t newpde, u_int flags,
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* a reserved PT page could be freed.
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*/
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(void)pmap_remove_l3e(pmap, l3e, va, &free, lockp);
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pmap_invalidate_l3e_page(pmap, va, oldl3e);
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} else {
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if (pmap_remove_ptes(pmap, va, va + L3_PAGE_SIZE, l3e,
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&free, lockp))
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@ -3242,6 +3243,7 @@ pmap_enter_l3e(pmap_t pmap, vm_offset_t va, pml3_entry_t newpde, u_int flags,
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* be any lingering 4KB page mappings in the TLB.)
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*/
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pte_store(l3e, newpde);
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ptesync();
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atomic_add_long(&pmap_l3e_mappings, 1);
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CTR2(KTR_PMAP, "pmap_enter_pde: success for va %#lx"
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@ -4943,7 +4945,7 @@ pmap_demote_l3e_locked(pmap_t pmap, pml3_entry_t *l3e, vm_offset_t va,
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* the read above and the store below.
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*/
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pde_store(l3e, mptepa);
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ptesync();
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pmap_invalidate_l3e_page(pmap, trunc_2mpage(va), oldpde);
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/*
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* Demote the PV entry.
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*/
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@ -5224,6 +5226,7 @@ mmu_radix_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
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*/
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if (sva + L3_PAGE_SIZE == va_next && eva >= va_next) {
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pmap_remove_l3e(pmap, l3e, sva, &free, &lock);
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anyvalid = true;
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continue;
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} else if (!pmap_demote_l3e_locked(pmap, l3e, sva,
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&lock)) {
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