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hwpmc: Add Intel Core register defines up to version 5.
MFC after: 1 month
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@ -88,19 +88,19 @@ struct pmc_md_iap_op_pmcallocate {
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* Bit Position Use
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* 63 - 12 Reserved (do not touch)
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* 11 Ctr 2 PMI
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* 10 Reserved (do not touch)
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* 10 Ctr 2 Any Thread (v3)
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* 9-8 Ctr 2 Enable
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* 7 Ctr 1 PMI
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* 6 Reserved (do not touch)
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* 6 Ctr 1 Any Thread (v3)
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* 5-4 Ctr 1 Enable
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* 3 Ctr 0 PMI
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* 2 Reserved (do not touch)
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* 2 Ctr 0 Any Thread (v3)
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* 1-0 Ctr 0 Enable (3: All Levels, 2: User, 1: OS, 0: Disable)
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*/
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#define IAF_OFFSET 32
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#define IAF_CTRL 0x38D
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#define IAF_CTRL_MASK 0x0000000000000bbb
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#define IAF_CTRL_MASK 0x0000000000000fff
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/*
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* Programmable counters.
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@ -117,7 +117,7 @@ struct pmc_md_iap_op_pmcallocate {
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* 31-24 Counter Mask
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* 23 Invert
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* 22 Enable
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* 21 Reserved (do not touch)
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* 21 Any Thread (v3)
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* 20 APIC Interrupt Enable
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* 19 Pin Control
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* 18 Edge Detect
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@ -127,7 +127,7 @@ struct pmc_md_iap_op_pmcallocate {
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* 7-0 Event Select
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*/
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#define IAP_EVSEL_MASK 0x00000000ffdfffff
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#define IAP_EVSEL_MASK 0x00000000ffffffff
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#define IAP_EVSEL0 0x186
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/*
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@ -159,9 +159,18 @@ struct pmc_md_iap_op_pmcallocate {
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#define IA_GLOBAL_CTRL_MASK 0x00000007ffffffff
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#define IA_GLOBAL_OVF_CTRL 0x390
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#define IA_GLOBAL_STATUS_RESET 0x390
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#define IA_GLOBAL_STATUS_SET 0x391 /* v4 */
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#define IA_GLOBAL_STATUS_FLAG_CONDCHG (1ULL << 63)
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#define IA_GLOBAL_STATUS_FLAG_OVFBUF (1ULL << 62)
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#define IA_GLOBAL_STATUS_FLAG_OVFUNCORE (1ULL << 61) /* v3 */
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#define IA_GLOBAL_STATUS_FLAG_ASCI (1ULL << 60) /* v4 */
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#define IA_GLOBAL_STATUS_FLAG_CTR_FRZ (1ULL << 59) /* v4 */
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#define IA_GLOBAL_STATUS_FLAG_LBP_FRZ (1ULL << 58) /* v4 */
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#define IA_GLOBAL_STATUS_FLAG_TRACETOPAPMI (1ULL << 55) /* v4 */
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#define IA_GLOBAL_INUSE 0x392 /* v4 */
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/*
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* Offcore response configuration.
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